1 /*
2 * Copyright (c) 2021 Chipsea Technologies (Shenzhen) Corp., Ltd. All rights reserved.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at
6 *
7 * http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
14 */
15 /**
16 ****************************************************************************************
17 *
18 * @file gpadc_api.c
19 *
20 * @brief GPADC API functions
21 *
22 ****************************************************************************************
23 */
24
25 /*
26 * INCLUDE FILES
27 ****************************************************************************************
28 */
29 #include "gpio_api.h"
30 #include "gpadc_api.h"
31 #include "arch.h"
32 #if PLF_PMIC
33 #include "pmic_api.h"
34
gpadc_init(int gpbidx)35 void gpadc_init(int gpbidx)
36 {
37 if (((gpbidx >= 0) && (gpbidx <= 5)) || (gpbidx == 13)) {
38 #if PLF_PMIC_VER_LITE
39 // sw mode
40 PMIC_MEM_WRITE((unsigned int)(&cs1000liteMsadc->cfg_msadc_mode), 0);
41 // mux_en
42 if ((gpbidx <= 1) || (gpbidx == 13)) {
43 PMIC_MEM_MASK_WRITE((unsigned int)(&cs1000liteAnalogReg->gpio_ctrl1),
44 (0x01 << gpbidx), (0x01 << gpbidx));//CS1000LITE_ANALOG_REG_CFG_ANA_GPIO01_MUX0_EN,CS1000LITE_ANALOG_REG_CFG_ANA_GPIO8D_MUX0_EN
45 } else {
46 PMIC_MEM_MASK_WRITE((unsigned int)(&cs1000liteRtcCore->rtc_rg_por_ctrl_cfg2),
47 CS1000LITE_RTC_CORE_RTC_RG_GPIO27_MUX0_EN(0x01 << (gpbidx - 2)),
48 CS1000LITE_RTC_CORE_RTC_RG_GPIO27_MUX0_EN(0x01 << (gpbidx - 2)));
49 }
50 #endif
51 // mux gpio
52 gpiob_init(gpbidx);
53 gpiob_dir_in(gpbidx);
54 #if PLF_PMIC_VER_LITE
55 PMIC_MEM_MASK_WRITE((unsigned int)(&cs1000liteIomux->GPCFG[gpbidx]),
56 (CS1000LITE_IOMUX_PAD_GPIO_PULL_FRC),
57 (CS1000LITE_IOMUX_PAD_GPIO_PULL_FRC));
58 #endif
59 }
60 }
61
gpadc_samplerate_set(int rate)62 void gpadc_samplerate_set(int rate)
63 {
64 #if PLF_PMIC_VER_LITE
65 PMIC_MEM_WRITE((unsigned int)(&cs1000liteSysctrl->msadc_clk_div),
66 CS1000LITE_SYS_CTRL_CFG_CLK_MSADC_DIV_DENOM(rate) | CS1000LITE_SYS_CTRL_CFG_CLK_MSADC_DIV_UPDATE);
67 #endif
68 }
69
gpadc_free(int gpbidx)70 void gpadc_free(int gpbidx)
71 {
72 if (((gpbidx >= 0) && (gpbidx <= 5)) || (gpbidx == 13)) {
73 #if PLF_PMIC_VER_LITE
74 // mux_en
75 if ((gpbidx <= 1) || (gpbidx == 13)) {
76 PMIC_MEM_MASK_WRITE((unsigned int)(&cs1000liteAnalogReg->gpio_ctrl1),
77 0, (0x01 << gpbidx));//CS1000LITE_ANALOG_REG_CFG_ANA_GPIO01_MUX0_EN,CS1000LITE_ANALOG_REG_CFG_ANA_GPIO8D_MUX0_EN
78 } else {
79 PMIC_MEM_MASK_WRITE((unsigned int)(&cs1000liteRtcCore->rtc_rg_por_ctrl_cfg2),
80 0, CS1000LITE_RTC_CORE_RTC_RG_GPIO27_MUX0_EN(0x01 << (gpbidx - 2)));
81 }
82 #endif
83 gpiob_deinit(gpbidx);
84 }
85 }
86
gpadc_read(int gpbidx)87 int gpadc_read(int gpbidx)
88 {
89 int volt_mv = 0;
90 if (((gpbidx >= 0) && (gpbidx <= 5)) || (gpbidx == 13)) {
91 int neg_flag = gpbidx & 0x01;
92 unsigned int mux_bit = 7 - (gpbidx >> 1);
93 unsigned int rdata;
94 #if PLF_PMIC_VER_LITE
95 PMIC_MEM_MASK_WRITE((unsigned int)(&cs1000liteMsadc->cfg_msadc_ana_ctrl0),
96 ((neg_flag ? 0 : CS1000LITE_MSADC_CFG_ANA_MSADC_CHNP_SEL) |
97 CS1000LITE_MSADC_CFG_ANA_MSADC_SDM_MODE | CS1000LITE_MSADC_CFG_ANA_MSADC_SDM_GAIN_BIT |
98 CS1000LITE_MSADC_CFG_ANA_MSADC_ADC_FF_EN),
99 (CS1000LITE_MSADC_CFG_ANA_MSADC_CHNP_SEL | CS1000LITE_MSADC_CFG_ANA_MSADC_TS_MODE |
100 CS1000LITE_MSADC_CFG_ANA_MSADC_SDM_MODE | CS1000LITE_MSADC_CFG_ANA_MSADC_SDM_GAIN_BIT |
101 CS1000LITE_MSADC_CFG_ANA_MSADC_ADC_FF_EN)); // channel p sel or not
102 PMIC_MEM_MASK_WRITE((unsigned int)(&cs1000liteMsadc->cfg_msadc_sw_ctrl1),
103 (CS1000LITE_MSADC_CFG_MSADC_SW_MUX_BITS(mux_bit) | 0),
104 (CS1000LITE_MSADC_CFG_MSADC_SW_MUX_BITS(0xF) | CS1000LITE_MSADC_CFG_MSADC_SW_DIFF_MODE));
105 PMIC_MEM_WRITE((unsigned int)(&cs1000liteMsadc->cfg_msadc_sw_ctrl0),
106 CS1000LITE_MSADC_CFG_MSADC_SW_START_PULSE);
107 while(PMIC_MEM_READ((unsigned int)(&cs1000liteMsadc->cfg_msadc_int_raw)) != 0x1);
108 PMIC_MEM_WRITE((unsigned int)(&cs1000liteMsadc->cfg_msadc_int_raw), 0x1);
109 rdata = PMIC_MEM_READ((unsigned int)(&cs1000liteMsadc->cfg_msadc_ro_acc));
110 #endif
111 volt_mv = ((int)rdata * 1175 / 32896 - 1175) * (neg_flag ? -1 : 1);
112 }
113 return volt_mv;
114 }
115
gpadc_measure(int type)116 int gpadc_measure(int type)
117 {
118 int ret = 0;
119 if (type == GPADC_TYPE_VBAT) {
120 unsigned int rdata;
121 #if PLF_PMIC_VER_LITE
122 //PU VBAT sense and VRTC sense
123 PMIC_MEM_MASK_WRITE((unsigned int)(&cs1000liteRtcCore->rtc_rg_por_ctrl_cfg1),
124 (CS1000LITE_RTC_CORE_RTC_RG_PU_VRTC_SENSE | CS1000LITE_RTC_CORE_RTC_RG_PU_VBAT_SENSE),
125 (CS1000LITE_RTC_CORE_RTC_RG_PU_VRTC_SENSE | CS1000LITE_RTC_CORE_RTC_RG_PU_VBAT_SENSE));
126 PMIC_MEM_MASK_WRITE((unsigned int)(&cs1000liteMsadc->cfg_msadc_sw_ctrl1),
127 (CS1000LITE_MSADC_CFG_MSADC_SW_MUX_BITS(0xD) | CS1000LITE_MSADC_CFG_MSADC_SW_DIFF_MODE),
128 (CS1000LITE_MSADC_CFG_MSADC_SW_MUX_BITS(0xF) | CS1000LITE_MSADC_CFG_MSADC_SW_DIFF_MODE));
129 PMIC_MEM_MASK_WRITE((unsigned int)(&cs1000liteMsadc->cfg_msadc_ana_ctrl0),
130 (0 | 0 | CS1000LITE_MSADC_CFG_ANA_MSADC_SDM_MODE | CS1000LITE_MSADC_CFG_ANA_MSADC_SDM_GAIN_BIT |
131 CS1000LITE_MSADC_CFG_ANA_MSADC_ADC_FF_EN),
132 (CS1000LITE_MSADC_CFG_ANA_MSADC_CHNP_SEL | CS1000LITE_MSADC_CFG_ANA_MSADC_TS_MODE |
133 CS1000LITE_MSADC_CFG_ANA_MSADC_SDM_MODE | CS1000LITE_MSADC_CFG_ANA_MSADC_SDM_GAIN_BIT |
134 CS1000LITE_MSADC_CFG_ANA_MSADC_ADC_FF_EN));
135 PMIC_MEM_WRITE((unsigned int)(&cs1000liteMsadc->cfg_msadc_sw_ctrl0),
136 CS1000LITE_MSADC_CFG_MSADC_SW_START_PULSE);
137 while(PMIC_MEM_READ((unsigned int)(&cs1000liteMsadc->cfg_msadc_int_raw)) != 0x1);
138 PMIC_MEM_WRITE((unsigned int)(&cs1000liteMsadc->cfg_msadc_int_raw), 0x1);
139 rdata = PMIC_MEM_READ((unsigned int)(&cs1000liteMsadc->cfg_msadc_ro_acc));
140 #endif
141 #if PLF_PMIC_VER_AUD
142 //PU VBAT sense and VRTC sense
143 rdata = PMIC_MEM_READ((unsigned int)(&cs1000audRtcCore->rtc_rg_por_ctrl_cfg1));
144 PMIC_MEM_WRITE((unsigned int)(&cs1000audRtcCore->rtc_rg_por_ctrl_cfg1),
145 rdata | CS1000AUD_RTC_CORE_RTC_RG_PU_VRTC_SENSE | CS1000AUD_RTC_CORE_RTC_RG_PU_VBAT_SENSE);
146 PMIC_MEM_WRITE((unsigned int)(&cs1000audMsadc->cfg_msadc_mode), 0);
147
148 rdata = PMIC_MEM_READ((unsigned int)(&cs1000audMsadc->cfg_msadc_sw_ctrl1));
149 PMIC_MEM_WRITE((unsigned int)(&cs1000audMsadc->cfg_msadc_sw_ctrl1),
150 rdata | CS1000AUD_MSADC_CFG_MSADC_SW_DIFF_MODE | CS1000AUD_MSADC_CFG_MSADC_SW_MUX_BITS(0xF));
151
152 rdata = PMIC_MEM_READ((unsigned int)(&cs1000audMsadc->cfg_msadc_sw_ctrl1));
153 rdata = 0xfffffff0 & rdata;
154 PMIC_MEM_WRITE((unsigned int)(&cs1000audMsadc->cfg_msadc_sw_ctrl1),
155 rdata | CS1000AUD_MSADC_CFG_MSADC_SW_DIFF_MODE | CS1000AUD_MSADC_CFG_MSADC_SW_MUX_BITS(0xc));
156 PMIC_MEM_WRITE((unsigned int)(&cs1000audMsadc->cfg_msadc_sw_ctrl0),
157 CS1000AUD_MSADC_CFG_MSADC_SW_START_PULSE);
158 while(PMIC_MEM_READ((unsigned int)(&cs1000audMsadc->cfg_msadc_int_raw)) != 0x1);
159 PMIC_MEM_WRITE((unsigned int)(&cs1000audMsadc->cfg_msadc_int_raw), 0x1);
160 rdata = PMIC_MEM_READ((unsigned int)(&cs1000audMsadc->cfg_msadc_ro_acc));
161 #endif
162 ret = ((int)rdata * 1175 / 32896 - 1175) * 42 / 10;// Convert to mV
163 } else if (type == GPADC_TYPE_VIO) {
164 (void)0; //TODO:
165 } else if (type == GPADC_TYPE_TEMP0) {
166 unsigned int rdata;
167 #if PLF_PMIC_VER_LITE
168 PMIC_MEM_MASK_WRITE((unsigned int)(&cs1000liteMsadc->cfg_msadc_sw_ctrl1),
169 (CS1000LITE_MSADC_CFG_MSADC_SW_MUX_BITS(0x0) | CS1000LITE_MSADC_CFG_MSADC_SW_DIFF_MODE),
170 (CS1000LITE_MSADC_CFG_MSADC_SW_MUX_BITS(0xF) | CS1000LITE_MSADC_CFG_MSADC_SW_DIFF_MODE));
171 PMIC_MEM_MASK_WRITE((unsigned int)(&cs1000liteMsadc->cfg_msadc_ana_ctrl0),
172 (0 | CS1000LITE_MSADC_CFG_ANA_MSADC_TS_MODE | 0 | 0 | 0),
173 (CS1000LITE_MSADC_CFG_ANA_MSADC_CHNP_SEL | CS1000LITE_MSADC_CFG_ANA_MSADC_TS_MODE |
174 CS1000LITE_MSADC_CFG_ANA_MSADC_SDM_MODE | CS1000LITE_MSADC_CFG_ANA_MSADC_SDM_GAIN_BIT |
175 CS1000LITE_MSADC_CFG_ANA_MSADC_ADC_FF_EN));
176 PMIC_MEM_WRITE((unsigned int)(&cs1000liteMsadc->cfg_msadc_sw_ctrl0),
177 CS1000LITE_MSADC_CFG_MSADC_SW_START_PULSE);
178 while(PMIC_MEM_READ((unsigned int)(&cs1000liteMsadc->cfg_msadc_int_raw)) != 0x1);
179 PMIC_MEM_WRITE((unsigned int)(&cs1000liteMsadc->cfg_msadc_int_raw), 0x1);
180 rdata = PMIC_MEM_READ((unsigned int)(&cs1000liteMsadc->cfg_msadc_ro_acc));
181 #endif
182 ret = (int)rdata * 659 / 65792 - 281;
183 }
184 return ret;
185 }
186 #endif
187