1 /*
2 * Copyright (c) 2021 Chipsea Technologies (Shenzhen) Corp., Ltd. All rights reserved.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at
6 *
7 * http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
14 */
15 #ifndef _REG_IOMUX_H_
16 #define _REG_IOMUX_H_
17
18 #include "chip.h"
19
20 /* ================================================================================ */
21 /* ================ IOMUX ================ */
22 /* ================================================================================ */
23 typedef struct {
24 __IO uint32_t GPCFG[16]; /* 0x000: GPIO Config 0 ~ 15 */
25 __IO uint32_t AGPCFG[16]; /* 0x040: AGPIO Config 0 ~ 15 */
26 } CS_IOMUX_TypeDef;
27
28 static CS_IOMUX_TypeDef * const CS_IOMUX = ((CS_IOMUX_TypeDef *)CS_IOMUX_BASE);
29
30 /**
31 * IOMUX GPIO CFG
32 */
33
34 #define IOMUX_GPIO_CONFIG_SEL_LSB (0)
35 #define IOMUX_GPIO_CONFIG_SEL_WIDTH (4)
36 #define IOMUX_GPIO_CONFIG_SEL_MASK (((1 << IOMUX_GPIO_CONFIG_SEL_WIDTH) - 1) << IOMUX_GPIO_CONFIG_SEL_LSB)
37 #define IOMUX_GPIO_CONFIG_PULL_DN_LSB (8)
38 #define IOMUX_GPIO_CONFIG_PULL_DN_WIDTH (1)
39 #define IOMUX_GPIO_CONFIG_PULL_DN_MASK (((1 << IOMUX_GPIO_CONFIG_PULL_DN_WIDTH) - 1) << IOMUX_GPIO_CONFIG_PULL_DN_LSB)
40 #define IOMUX_GPIO_CONFIG_PULL_UP_LSB (9)
41 #define IOMUX_GPIO_CONFIG_PULL_UP_WIDTH (1)
42 #define IOMUX_GPIO_CONFIG_PULL_UP_MASK (((1 << IOMUX_GPIO_CONFIG_PULL_UP_WIDTH) - 1) << IOMUX_GPIO_CONFIG_PULL_UP_LSB)
43 #define IOMUX_GPIO_CONFIG_PULL_FRC_LSB (16)
44 #define IOMUX_GPIO_CONFIG_PULL_FRC_WIDTH (1)
45 #define IOMUX_GPIO_CONFIG_PULL_FRC_MASK (((1 << IOMUX_GPIO_CONFIG_PULL_FRC_WIDTH) - 1) << IOMUX_GPIO_CONFIG_PULL_FRC_LSB)
46
47 #define IOMUX_AGPIO_CONFIG_SEL_LSB (0)
48 #define IOMUX_AGPIO_CONFIG_SEL_WIDTH (4)
49 #define IOMUX_AGPIO_CONFIG_SEL_MASK (((1 << IOMUX_AGPIO_CONFIG_SEL_WIDTH) - 1) << IOMUX_AGPIO_CONFIG_SEL_LSB)
50 #define IOMUX_AGPIO_CONFIG_PULL_DN_LSB (8)
51 #define IOMUX_AGPIO_CONFIG_PULL_DN_WIDTH (1)
52 #define IOMUX_AGPIO_CONFIG_PULL_DN_MASK (((1 << IOMUX_AGPIO_CONFIG_PULL_DN_WIDTH) - 1) << IOMUX_AGPIO_CONFIG_PULL_DN_LSB)
53 #define IOMUX_AGPIO_CONFIG_PULL_UP_LSB (9)
54 #define IOMUX_AGPIO_CONFIG_PULL_UP_WIDTH (1)
55 #define IOMUX_AGPIO_CONFIG_PULL_UP_MASK (((1 << IOMUX_AGPIO_CONFIG_PULL_UP_WIDTH) - 1) << IOMUX_AGPIO_CONFIG_PULL_UP_LSB)
56 #define IOMUX_AGPIO_CONFIG_PULL_FRC_LSB (16)
57 #define IOMUX_AGPIO_CONFIG_PULL_FRC_WIDTH (1)
58 #define IOMUX_AGPIO_CONFIG_PULL_FRC_MASK (((1 << IOMUX_AGPIO_CONFIG_PULL_FRC_WIDTH) - 1) << IOMUX_AGPIO_CONFIG_PULL_FRC_LSB)
59
iomux_gpio_config_sel_getf(int gp_idx)60 __STATIC_INLINE uint8_t iomux_gpio_config_sel_getf(int gp_idx)
61 {
62 return ((CS_IOMUX->GPCFG[gp_idx] & IOMUX_GPIO_CONFIG_SEL_MASK) >> IOMUX_GPIO_CONFIG_SEL_LSB);
63 }
64
iomux_gpio_config_sel_setf(int gp_idx,uint8_t sel_val)65 __STATIC_INLINE void iomux_gpio_config_sel_setf(int gp_idx, uint8_t sel_val)
66 {
67 uint32_t local_val = CS_IOMUX->GPCFG[gp_idx] & ~IOMUX_GPIO_CONFIG_SEL_MASK;
68 CS_IOMUX->GPCFG[gp_idx] = local_val | ((sel_val << IOMUX_GPIO_CONFIG_SEL_LSB) & IOMUX_GPIO_CONFIG_SEL_MASK);
69 }
70
iomux_gpio_config_pull_dn_getf(int gp_idx)71 __STATIC_INLINE uint8_t iomux_gpio_config_pull_dn_getf(int gp_idx)
72 {
73 return ((CS_IOMUX->GPCFG[gp_idx] & IOMUX_GPIO_CONFIG_PULL_DN_MASK) >> IOMUX_GPIO_CONFIG_PULL_DN_LSB);
74 }
75
iomux_gpio_config_pull_dn_setf(int gp_idx,uint8_t sel_val)76 __STATIC_INLINE void iomux_gpio_config_pull_dn_setf(int gp_idx, uint8_t sel_val)
77 {
78 uint32_t local_val = CS_IOMUX->GPCFG[gp_idx] & ~IOMUX_GPIO_CONFIG_PULL_DN_MASK;
79 CS_IOMUX->GPCFG[gp_idx] = local_val | ((sel_val << IOMUX_GPIO_CONFIG_PULL_DN_LSB) & IOMUX_GPIO_CONFIG_PULL_DN_MASK);
80 }
81
iomux_gpio_config_pull_up_getf(int gp_idx)82 __STATIC_INLINE uint8_t iomux_gpio_config_pull_up_getf(int gp_idx)
83 {
84 return ((CS_IOMUX->GPCFG[gp_idx] & IOMUX_GPIO_CONFIG_PULL_UP_MASK) >> IOMUX_GPIO_CONFIG_PULL_UP_LSB);
85 }
86
iomux_gpio_config_pull_up_setf(int gp_idx,uint8_t sel_val)87 __STATIC_INLINE void iomux_gpio_config_pull_up_setf(int gp_idx, uint8_t sel_val)
88 {
89 uint32_t local_val = CS_IOMUX->GPCFG[gp_idx] & ~IOMUX_GPIO_CONFIG_PULL_UP_MASK;
90 CS_IOMUX->GPCFG[gp_idx] = local_val | ((sel_val << IOMUX_GPIO_CONFIG_PULL_UP_LSB) & IOMUX_GPIO_CONFIG_PULL_UP_MASK);
91 }
92
iomux_gpio_config_pull_frc_getf(int gp_idx)93 __STATIC_INLINE uint8_t iomux_gpio_config_pull_frc_getf(int gp_idx)
94 {
95 return ((CS_IOMUX->GPCFG[gp_idx] & IOMUX_GPIO_CONFIG_PULL_FRC_MASK) >> IOMUX_GPIO_CONFIG_PULL_FRC_LSB);
96 }
97
iomux_gpio_config_pull_frc_setf(int gp_idx,uint8_t sel_val)98 __STATIC_INLINE void iomux_gpio_config_pull_frc_setf(int gp_idx, uint8_t sel_val)
99 {
100 uint32_t local_val = CS_IOMUX->GPCFG[gp_idx] & ~IOMUX_GPIO_CONFIG_PULL_FRC_MASK;
101 CS_IOMUX->GPCFG[gp_idx] = local_val | ((sel_val << IOMUX_GPIO_CONFIG_PULL_FRC_LSB) & IOMUX_GPIO_CONFIG_PULL_FRC_MASK);
102 }
103
iomux_agpio_config_sel_getf(int agp_idx)104 __STATIC_INLINE uint8_t iomux_agpio_config_sel_getf(int agp_idx)
105 {
106 return ((CS_IOMUX->AGPCFG[agp_idx] & IOMUX_AGPIO_CONFIG_SEL_MASK) >> IOMUX_AGPIO_CONFIG_SEL_LSB);
107 }
108
iomux_agpio_config_sel_setf(int agp_idx,uint8_t sel_val)109 __STATIC_INLINE void iomux_agpio_config_sel_setf(int agp_idx, uint8_t sel_val)
110 {
111 uint32_t local_val = CS_IOMUX->AGPCFG[agp_idx] & ~IOMUX_AGPIO_CONFIG_SEL_MASK;
112 CS_IOMUX->AGPCFG[agp_idx] = local_val | ((sel_val << IOMUX_AGPIO_CONFIG_SEL_LSB) & IOMUX_AGPIO_CONFIG_SEL_MASK);
113 }
114
iomux_agpio_config_pull_dn_getf(int gp_idx)115 __STATIC_INLINE uint8_t iomux_agpio_config_pull_dn_getf(int gp_idx)
116 {
117 return ((CS_IOMUX->AGPCFG[gp_idx] & IOMUX_AGPIO_CONFIG_PULL_DN_MASK) >> IOMUX_AGPIO_CONFIG_PULL_DN_LSB);
118 }
119
iomux_agpio_config_pull_dn_setf(int gp_idx,uint8_t sel_val)120 __STATIC_INLINE void iomux_agpio_config_pull_dn_setf(int gp_idx, uint8_t sel_val)
121 {
122 uint32_t local_val = CS_IOMUX->AGPCFG[gp_idx] & ~IOMUX_AGPIO_CONFIG_PULL_DN_MASK;
123 CS_IOMUX->AGPCFG[gp_idx] = local_val | ((sel_val << IOMUX_AGPIO_CONFIG_PULL_DN_LSB) & IOMUX_AGPIO_CONFIG_PULL_DN_MASK);
124 }
125
iomux_agpio_config_pull_up_getf(int gp_idx)126 __STATIC_INLINE uint8_t iomux_agpio_config_pull_up_getf(int gp_idx)
127 {
128 return ((CS_IOMUX->AGPCFG[gp_idx] & IOMUX_AGPIO_CONFIG_PULL_UP_MASK) >> IOMUX_AGPIO_CONFIG_PULL_UP_LSB);
129 }
130
iomux_agpio_config_pull_up_setf(int gp_idx,uint8_t sel_val)131 __STATIC_INLINE void iomux_agpio_config_pull_up_setf(int gp_idx, uint8_t sel_val)
132 {
133 uint32_t local_val = CS_IOMUX->AGPCFG[gp_idx] & ~IOMUX_AGPIO_CONFIG_PULL_UP_MASK;
134 CS_IOMUX->AGPCFG[gp_idx] = local_val | ((sel_val << IOMUX_AGPIO_CONFIG_PULL_UP_LSB) & IOMUX_AGPIO_CONFIG_PULL_UP_MASK);
135 }
136
iomux_agpio_config_pull_frc_getf(int gp_idx)137 __STATIC_INLINE uint8_t iomux_agpio_config_pull_frc_getf(int gp_idx)
138 {
139 return ((CS_IOMUX->AGPCFG[gp_idx] & IOMUX_AGPIO_CONFIG_PULL_FRC_MASK) >> IOMUX_AGPIO_CONFIG_PULL_FRC_LSB);
140 }
141
iomux_agpio_config_pull_frc_setf(int gp_idx,uint8_t sel_val)142 __STATIC_INLINE void iomux_agpio_config_pull_frc_setf(int gp_idx, uint8_t sel_val)
143 {
144 uint32_t local_val = CS_IOMUX->AGPCFG[gp_idx] & ~IOMUX_AGPIO_CONFIG_PULL_FRC_MASK;
145 CS_IOMUX->AGPCFG[gp_idx] = local_val | ((sel_val << IOMUX_AGPIO_CONFIG_PULL_FRC_LSB) & IOMUX_AGPIO_CONFIG_PULL_FRC_MASK);
146 }
147
148 #endif // _REG_IOMUX_H_
149