1/**************************************************************************//** 2 * @file startup_gr55xx.s 3 * @brief CMSIS Cortex-M ARMv7-M based Core Device Startup File for 4 * Device GR55xx 5 * @version V1.00 6 * @date 10. September 2021 7 * 8 * @note 9 * 10 ******************************************************************************/ 11/* 12 * Copyright (c) 2021 GOODIX. 13 * Licensed under the Apache License, Version 2.0 (the "License"); 14 * you may not use this file except in compliance with the License. 15 * You may obtain a copy of the License at 16 * 17 * http://www.apache.org/licenses/LICENSE-2.0 18 * 19 * Unless required by applicable law or agreed to in writing, software 20 * distributed under the License is distributed on an "AS IS" BASIS, 21 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 22 * See the License for the specific language governing permissions and 23 * limitations under the License. 24 */ 25 26 .syntax unified 27 .cpu cortex-m4 28 .fpu softvfp 29 .thumb 30 31.global g_pfnVectors 32.global Default_Handler 33 34.global SystemInit 35.global main_init 36 37/* stack used for SystemInit_ExtMemCtl; always internal RAM used */ 38 39/** 40 * @brief This is the code that gets called when the processor first 41 * starts execution following a reset event. Only the absolutely 42 * necessary set is performed, after which the application 43 * supplied main() routine is called. 44 * @param None 45 * @retval : None 46*/ 47 48 .section .text.Reset_Handler 49 .weak Reset_Handler 50 .type Reset_Handler, %function 51Reset_Handler: 52 ldr sp, =_estack /* set stack pointer */ 53 bl SystemInit 54 55/* Call the application's entry point.*/ 56 bl main_init 57 bx lr 58.size Reset_Handler, .-Reset_Handler 59 60/** 61 * @brief This is the code that gets called when the processor receives an 62 * unexpected interrupt. This simply enters an infinite loop, preserving 63 * the system state for examination by a debugger. 64 * @param None 65 * @retval None 66*/ 67 .section .text.Default_Handler,"ax",%progbits 68Default_Handler: 69Infinite_Loop: 70 b Infinite_Loop 71 .size Default_Handler, .-Default_Handler 72/****************************************************************************** 73* 74* The minimal vector table for a Cortex M3. Note that the proper constructs 75* must be placed on this to ensure that it ends up at physical address 76* 0x0000.0000. 77* 78*******************************************************************************/ 79 .section .isr_vector,"a",%progbits 80 .type g_pfnVectors, %object 81 .size g_pfnVectors, .-g_pfnVectors 82 83g_pfnVectors: 84 .word _estack 85 .word Reset_Handler 86 .word NMI_Handler 87 .word HardFault_Handler 88 .word MemManage_Handler 89 .word BusFault_Handler 90 .word UsageFault_Handler 91 .word 0 92 .word 0 93 .word 0 94 .word 0 95 .word SVC_Handler 96 .word DebugMon_Handler 97 .word 0 98 .word PendSV_Handler 99 .word SysTick_Handler 100 101 /* External Interrupts */ 102 .word WDT_IRQHandler 103 .word BLE_SDK_Handler 104 .word BLE_IRQHandler 105 .word DMA_IRQHandler 106 .word SPI_M_IRQHandler 107 .word SPI_S_IRQHandler 108 .word EXT0_IRQHandler 109 .word EXT1_IRQHandler 110 .word TIMER0_IRQHandler 111 .word TIMER1_IRQHandler 112 .word DUAL_TIMER_IRQHandler 113 .word QSPI0_IRQHandler 114 .word UART0_IRQHandler 115 .word UART1_IRQHandler 116 .word I2C0_IRQHandler 117 .word I2C1_IRQHandler 118 .word AES_IRQHandler 119 .word HMAC_IRQHandler 120 .word EXT2_IRQHandler 121 .word RNG_IRQHandler 122 .word PMU_IRQHandler 123 .word PKC_IRQHandler 124 .word XQSPI_IRQHandler 125 .word QSPI1_IRQHandler 126 .word PWR_CMD_IRQHandler 127 .word BLESLP_IRQHandler 128 .word SLPTIMER_IRQHandler 129 .word COMP_IRQHandler 130 .word AON_WDT_IRQHandler 131 .word I2S_M_IRQHandler 132 .word I2S_S_IRQHandler 133 .word ISO7816_IRQHandler 134 .word PRESENT_IRQHandler 135 .word CALENDAR_IRQHandler 136 137/******************************************************************************* 138* 139* Provide weak aliases for each Exception handler to the Default_Handler. 140* As they are weak aliases, any function with the same name will override 141* this definition. 142* 143*******************************************************************************/ 144 .weak NMI_Handler 145 .thumb_set NMI_Handler,Default_Handler 146 147 .weak HardFault_Handler 148 .thumb_set HardFault_Handler,Default_Handler 149 150 .weak MemManage_Handler 151 .thumb_set MemManage_Handler,Default_Handler 152 153 .weak BusFault_Handler 154 .thumb_set BusFault_Handler,Default_Handler 155 156 .weak UsageFault_Handler 157 .thumb_set UsageFault_Handler,Default_Handler 158 159 .weak DebugMon_Handler 160 .thumb_set DebugMon_Handler,Default_Handler 161 162 .weak PendSV_Handler 163 .thumb_set PendSV_Handler,Default_Handler 164 165 .weak SysTick_Handler 166 .thumb_set SysTick_Handler,Default_Handler 167 168 .weak WDT_IRQHandler 169 .thumb_set WDT_IRQHandler,Default_Handler 170 171 .weak BLE_SDK_Handler 172 .thumb_set BLE_SDK_Handler,Default_Handler 173 174 .weak BLE_IRQHandler 175 .thumb_set BLE_IRQHandler,Default_Handler 176 177 .weak DMA_IRQHandler 178 .thumb_set DMA_IRQHandler,Default_Handler 179 180 .weak SPI_M_IRQHandler 181 .thumb_set SPI_M_IRQHandler,Default_Handler 182 183 .weak SPI_S_IRQHandler 184 .thumb_set SPI_S_IRQHandler,Default_Handler 185 186 .weak EXT0_IRQHandler 187 .thumb_set EXT0_IRQHandler,Default_Handler 188 189 .weak EXT1_IRQHandler 190 .thumb_set EXT1_IRQHandler,Default_Handler 191 192 .weak TIMER0_IRQHandler 193 .thumb_set TIMER0_IRQHandler,Default_Handler 194 195 .weak TIMER1_IRQHandler 196 .thumb_set TIMER1_IRQHandler,Default_Handler 197 198 .weak DUAL_TIMER_IRQHandler 199 .thumb_set DUAL_TIMER_IRQHandler,Default_Handler 200 201 .weak QSPI0_IRQHandler 202 .thumb_set QSPI0_IRQHandler,Default_Handler 203 204 .weak UART0_IRQHandler 205 .thumb_set UART0_IRQHandler,Default_Handler 206 207 .weak UART1_IRQHandler 208 .thumb_set UART1_IRQHandler,Default_Handler 209 210 .weak I2C0_IRQHandler 211 .thumb_set I2C0_IRQHandler,Default_Handler 212 213 .weak I2C1_IRQHandler 214 .thumb_set I2C1_IRQHandler,Default_Handler 215 216 .weak AES_IRQHandler 217 .thumb_set AES_IRQHandler,Default_Handler 218 219 .weak HMAC_IRQHandler 220 .thumb_set HMAC_IRQHandler,Default_Handler 221 222 .weak EXT2_IRQHandler 223 .thumb_set EXT2_IRQHandler,Default_Handler 224 225 .weak RNG_IRQHandler 226 .thumb_set RNG_IRQHandler,Default_Handler 227 228 .weak PMU_IRQHandler 229 .thumb_set PMU_IRQHandler,Default_Handler 230 231 .weak PKC_IRQHandler 232 .thumb_set PKC_IRQHandler,Default_Handler 233 234 .weak XQSPI_IRQHandler 235 .thumb_set XQSPI_IRQHandler,Default_Handler 236 237 .weak QSPI1_IRQHandler 238 .thumb_set QSPI1_IRQHandler,Default_Handler 239 240 .weak PWR_CMD_IRQHandler 241 .thumb_set PWR_CMD_IRQHandler,Default_Handler 242 243 .weak BLESLP_IRQHandler 244 .thumb_set BLESLP_IRQHandler,Default_Handler 245 246 .weak SLPTIMER_IRQHandler 247 .thumb_set SLPTIMER_IRQHandler,Default_Handler 248 249 .weak COMP_IRQHandler 250 .thumb_set COMP_IRQHandler,Default_Handler 251 252 .weak AON_WDT_IRQHandler 253 .thumb_set AON_WDT_IRQHandler,Default_Handler 254 255 .weak I2S_M_IRQHandler 256 .thumb_set I2S_M_IRQHandler,Default_Handler 257 258 .weak I2S_S_IRQHandler 259 .thumb_set I2S_S_IRQHandler,Default_Handler 260 261 .weak ISO7816_IRQHandler 262 .thumb_set ISO7816_IRQHandler,Default_Handler 263 264 .weak PRESENT_IRQHandler 265 .thumb_set PRESENT_IRQHandler,Default_Handler 266 267 .weak CALENDAR_IRQHandler 268 .thumb_set CALENDAR_IRQHandler,Default_Handler 269 270 .global SVC_handler_proc 271 .section .ramfunc 272 .type SVC_Handler, %function 273 .global SVC_Handler 274SVC_Handler: 275 TST R14,$4 276 IT NE 277 MRSNE R12,PSP 278 IT EQ 279 MOVEQ R12,SP 280 PUSH {R0-R3,LR} 281 MOV R0, R12 282 BL SVC_handler_proc 283 MOV R12, R0 284 POP {R0-R3,LR} 285 CMP R12,$0 286 IT NE 287 BLXNE R12 288 BX LR 289 290/*****END OF FILE****/ 291 292 293