1 /*
2 * Copyright (C) 2021 HiSilicon (Shanghai) Technologies CO., LIMITED.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version 2
7 * of the License, or (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
17 */
18
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/version.h>
22 #ifndef __HuaweiLite__
23 #include <linux/of_platform.h>
24 #endif
25 #include <linux/types.h>
26 #include <asm/io.h>
27 #include "hi_osal.h"
28 #include "securec.h"
29
30 #define VO_BT1120_EN 0
31 #define VO_BT656_EN 0
32 #define VO_MIPI_TX_EN 0
33 #define VO_LCD_8BIT_EN 0
34 #define VO_LCD_24BIT_EN 0
35
36 #define I2S0_EN 0
37
38 #define SENSOR_LIST_CMDLINE_LEN 256
39 #define SENSOR_NAME_LEN 64
40 #define SENSOR_MAX_NUM 2
41 #define CHIP_NAME_LEN 64
42 #define SENSOR_INDEX_MAX_LEN 10
43 #define sys_config_unused(x) (void)(x)
44
45 #define sys_writel(addr, value) ((*(volatile unsigned int *)(addr)) = value)
46 #define sys_read(addr) (*((volatile int *)(addr)))
47
48 #ifdef __HuaweiLite__
49 #define ARRAY_SIZE(a) ((sizeof(a) / sizeof(a[0])))
50 #endif
51
52 static char* g_reg_crg_base = 0;
53 static char* g_reg_ddr_base = 0;
54 static char* g_reg_misc_base = 0;
55 static char* g_reg_sysctl_base = 0;
56 static char* g_reg_iocfg_base = 0;
57 static char* g_reg_iocfg1_base = 0;
58 static char* g_reg_iocfg2_base = 0;
59 static char* g_reg_gpio_base = 0;
60
61 #ifndef __HuaweiLite__
62 static int g_online_flag = 0;
63 static int g_cmos_yuv_flag = 0; /* vi: 0--RAW, 1--BT1120/DC, 2--BT656 */
64 /* imx335 imx327 imx327_2l imx307 imx307_2l imx307_2l_slave imx415
65 os05a imx290 imx377 imx458 ov12870 imx206 imx34220 ov2775 ov9284 */
66 static char g_sensor_list[SENSOR_LIST_CMDLINE_LEN] = "sns0=imx327,sns1=imx327";
67 static char g_chip_list[CHIP_NAME_LEN] = "hi3516dv300"; /* hi3516cv500 hi3516dv300 hi3516av300 */
68
69 module_param(g_online_flag, int, S_IRUGO);
70 module_param(g_cmos_yuv_flag, int, 0600);
71 module_param_string(sensors, g_sensor_list, SENSOR_LIST_CMDLINE_LEN, 0600);
72 module_param_string(chip, g_chip_list, CHIP_NAME_LEN, 0600);
73
74 MODULE_PARM_DESC(sensors, "sns0=imx327,sns1=imx327");
75 #endif
76
77 typedef enum {
78 BUS_TYPE_I2C = 0,
79 BUS_TYPE_SPI = 1,
80 } bus_type;
81
parse_sensor_index(char * s)82 int parse_sensor_index(char *s)
83 {
84 char tmp[SENSOR_INDEX_MAX_LEN];
85 int i;
86 char* line = NULL;
87 int index = -1;
88
89 line = strsep(&s, "=");
90 if (line == NULL) {
91 osal_printk("FUNC:%s line:%d err sensor index: [%s] \n", __FUNCTION__, __LINE__, s);
92 return index;
93 }
94
95 if (sizeof(tmp) <= sizeof("sns0")) {
96 return index;
97 }
98
99 for (i = 0; i < SENSOR_MAX_NUM; i++) {
100 (void)snprintf_s(tmp, SENSOR_INDEX_MAX_LEN, sizeof(tmp) - 1, "sns%d", i);
101
102 if (strncmp(tmp, line, sizeof(tmp)) == 0) {
103 index = i;
104 return index;
105 }
106 }
107
108 osal_printk("FUNC:%s line:%d SNS prefix:[%s] is not supported !\n", __FUNCTION__, __LINE__, line);
109
110 return index;
111 }
112
parse_sensor_name(char * s,char * name,unsigned int name_len)113 int parse_sensor_name(char *s, char *name, unsigned int name_len)
114 {
115 unsigned int len;
116 char *line = NULL;
117 errno_t err;
118
119 if (name_len > SENSOR_NAME_LEN) {
120 return -1;
121 }
122
123 line = strsep(&s, "=");
124 if (line == NULL) {
125 return -1;
126 }
127
128 line = strsep(&s, "="); /* sensor0 & sensor1, need strsep twice */
129 if (line == NULL) {
130 return -1;
131 }
132
133 len = strlen(line);
134 if (len >= SENSOR_NAME_LEN) {
135 osal_printk("FUNC:%s line:%d name:[%s] is too long, can not longer than %d\n",
136 __FUNCTION__, __LINE__, line, SENSOR_NAME_LEN);
137 return -1;
138 }
139
140 err = strncpy_s(name, SENSOR_NAME_LEN, line, SENSOR_NAME_LEN - 1);
141 if (err != EOK) {
142 return -1;
143 }
144
145 return 0;
146 }
147
reg_write32(unsigned long value,unsigned long mask,const void * addr)148 static inline void reg_write32(unsigned long value, unsigned long mask, const void *addr)
149 {
150 unsigned long t;
151
152 t = sys_read((const volatile void *)addr);
153 t &= ~mask;
154 t |= value & mask;
155 sys_writel((volatile void *)addr, t);
156 }
157
158
sensor_clock_config(unsigned int index,unsigned int clock)159 void sensor_clock_config(unsigned int index, unsigned int clock)
160 {
161 reg_write32(clock << ((6 * index) + 2), 0xF << ((6 * index) + 2), /* 2 -- Sns0_clk [5:2], 6 -- Sns1[11:8] */
162 g_reg_crg_base + 0x00F0);
163 }
164
set_cmos_flag(unsigned int index)165 void set_cmos_flag(unsigned int index)
166 {
167 reg_write32(index << 5, 0x1 << 5, g_reg_misc_base + 0x0018); /* 5 -- pt1_sel: mipi or cmos */
168 }
169
parse_sensor_bus_type(const char * name)170 bus_type parse_sensor_bus_type(const char *name)
171 {
172 unsigned int len;
173 bus_type type;
174
175 len = SENSOR_NAME_LEN;
176
177 if ((strncmp("imx290", name, len) == 0) ||
178 (strncmp("imx327", name, len) == 0) ||
179 (strncmp("imx327_2l", name, len) == 0) ||
180 (strncmp("imx390", name, len) == 0) ||
181 (strncmp("sc4210", name, len) == 0) ||
182 (strncmp("imx34220", name, len) == 0) ||
183 (strncmp("imx377", name, len) == 0) ||
184 (strncmp("imx307", name, len) == 0) ||
185 (strncmp("imx307_2l", name, len) == 0) ||
186 (strncmp("imx307_2l_slave", name, len) == 0) ||
187 (strncmp("imx458", name, len) == 0) ||
188 (strncmp("ov12870", name, len) == 0) ||
189 (strncmp("imx415", name, len) == 0) ||
190 (strncmp("imx415_wdr2to1", name, len) == 0) ||
191 (strncmp("imx335", name, len) == 0) ||
192 (strncmp("gc2053", name, len) == 0) ||
193 (strncmp("os08a10", name, len) == 0) ||
194 (strncmp("os04b10", name, len) == 0) ||
195 (strncmp("os05a", name, len) == 0) ||
196 (strncmp("ov9284", name, len) == 0) ||
197 (strncmp("ps5260", name, len) == 0) ||
198 (strncmp("ov2775", name, len) == 0)) {
199 type = BUS_TYPE_I2C;
200 } else if (strncmp("imx206", name, len) == 0) {
201 type = BUS_TYPE_SPI;
202 } else {
203 osal_printk("FUNC:%s line:%d SNS:[%s] is not supported !\n", __FUNCTION__, __LINE__, name);
204 type = BUS_TYPE_I2C;
205 }
206
207 return type;
208 }
209
210 /*
211 * 0x0: 74.25MHz; 0x1: 72MHz;0x2: 54MHz;0x3: 50MHz;0x4/0x5/0x6: 24MHz;
212 * 0x8: 37.125MHz;0x9: 36MHz;0xA: 27MHz;0xB: 25MHz;0xC/0xD/0xE/0xF: 12MHz;
213 */
parse_sensor_clock(const char * name)214 unsigned int parse_sensor_clock(const char *name)
215 {
216 unsigned int clock = 0x0;
217 unsigned int len;
218
219 len = SENSOR_NAME_LEN;
220
221 if ((strncmp("imx290", name, len) == 0) ||
222 (strncmp("imx327", name, len) == 0) ||
223 (strncmp("imx327_2l", name, len) == 0) ||
224 (strncmp("imx307", name, len) == 0) ||
225 (strncmp("imx307_2l", name, len) == 0) ||
226 (strncmp("imx307_2l_slave", name, len) == 0) ||
227 (strncmp("imx415", name, len) == 0) ||
228 (strncmp("imx34220", name, len) == 0) ||
229 (strncmp("imx335", name, len) == 0)) {
230 clock = 0x8;
231 } else if ((strncmp("imx458", name, len) == 0) ||
232 (strncmp("imx377", name, len) == 0) ||
233 (strncmp("ov12870", name, len) == 0) ||
234 (strncmp("os08a10", name, len) == 0) ||
235 (strncmp("os04b10", name, len) == 0) ||
236 (strncmp("os05a", name, len) == 0) ||
237 (strncmp("ov9284", name, len) == 0) ||
238 (strncmp("imx415_wdr2to1", name, len) == 0) ||
239 (strncmp("ov2775", name, len) == 0)) {
240 clock = 0x4;
241 } else if ((strncmp("sc4210", name, len) == 0) ||
242 (strncmp("gc2053", name, len) == 0) ||
243 (strncmp("ps5260", name, len) == 0) ||
244 (strncmp("imx390", name, len) == 0)) {
245 clock = 0xA;
246 } else if (strncmp("imx206", name, len) == 0) {
247 clock = 0x1;
248 } else {
249 osal_printk("FUNC:%s line:%d SNS:[%s] is not supported !\n", __FUNCTION__, __LINE__, name);
250 }
251
252 return clock;
253 }
254
is_coms(const char * name)255 int is_coms(const char *name)
256 {
257 unsigned int len;
258
259 len = SENSOR_NAME_LEN;
260
261 if ((strncmp("bt1120", name, len) == 0) ||
262 (strncmp("bt656", name, len) == 0) ||
263 (strncmp("bt601", name, len) == 0)) {
264 return 1;
265 } else {
266 return 0;
267 }
268 }
269
set_hi3516av300_clk(int cmos_yuv_flag)270 static void set_hi3516av300_clk(int cmos_yuv_flag)
271 {
272 sys_writel(g_reg_crg_base + 0x00A0, 0x00582c00);
273
274 if (cmos_yuv_flag > 0) {
275 sys_writel(g_reg_crg_base + 0x00F4, 0x025d03ff);
276 } else {
277 sys_writel(g_reg_crg_base + 0x00F4, 0x024903ff);
278 }
279
280 sys_writel(g_reg_crg_base + 0x0100, 0x00f00492);
281 sys_writel(g_reg_crg_base + 0x00FC, 0x10);
282 }
283
set_hi3516dv300_clk(int cmos_yuv_flag)284 static void set_hi3516dv300_clk(int cmos_yuv_flag)
285 {
286 sys_writel(g_reg_crg_base + 0x00A0, 0x00582c00);
287
288 if (cmos_yuv_flag > 0) {
289 sys_writel(g_reg_crg_base + 0x00F4, 0x027d83FF);
290 } else {
291 sys_writel(g_reg_crg_base + 0x00F4, 0x026d83FF);
292 }
293
294 sys_writel(g_reg_crg_base + 0x0100, 0x00F006DB);
295 sys_writel(g_reg_crg_base + 0x00FC, 0x11);
296 }
297
set_hi3559v200_clk(int cmos_yuv_flag)298 static void set_hi3559v200_clk(int cmos_yuv_flag)
299 {
300 sys_writel(g_reg_crg_base + 0x00A0, 0x00582000);
301
302 if (cmos_yuv_flag > 0) {
303 sys_writel(g_reg_crg_base + 0x00F4, 0x025d03ff);
304 } else {
305 sys_writel(g_reg_crg_base + 0x00F4, 0x024903ff);
306 }
307
308 sys_writel(g_reg_crg_base + 0x0100, 0x00f00492);
309 sys_writel(g_reg_crg_base + 0x00FC, 0x10);
310 }
311
set_hi3556v200_clk(int cmos_yuv_flag)312 static void set_hi3556v200_clk(int cmos_yuv_flag)
313 {
314 sys_writel(g_reg_crg_base + 0x00A0, 0x007828f0);
315
316 if (cmos_yuv_flag > 0) {
317 sys_writel(g_reg_crg_base + 0x00F4, 0x025d03ff);
318 } else {
319 sys_writel(g_reg_crg_base + 0x00F4, 0x024903ff);
320 }
321
322 sys_writel(g_reg_crg_base + 0x0100, 0x00f00492);
323 sys_writel(g_reg_crg_base + 0x00FC, 0x10);
324 }
325
set_hi3516cv500_clk(int cmos_yuv_flag)326 static void set_hi3516cv500_clk(int cmos_yuv_flag)
327 {
328 sys_writel(g_reg_crg_base + 0x00A0, 0x00782cf0);
329
330 if (cmos_yuv_flag > 0) {
331 sys_writel(g_reg_crg_base + 0x00F4, 0x029e03ff);
332 } else {
333 sys_writel(g_reg_crg_base + 0x00F4, 0x29203ff);
334 }
335
336 sys_writel(g_reg_crg_base + 0x0100, 0x00f00924);
337 sys_writel(g_reg_crg_base + 0x00FC, 0x12);
338 }
339
clk_cfg_on_chip(const char * s,int cmos_yuv_flag)340 void clk_cfg_on_chip(const char *s, int cmos_yuv_flag)
341 {
342 if (strncmp("hi3516av300", s, CHIP_NAME_LEN) == 0) {
343 set_hi3516av300_clk(cmos_yuv_flag);
344 } else if (strncmp("hi3516dv300", s, CHIP_NAME_LEN) == 0) {
345 set_hi3516dv300_clk(cmos_yuv_flag);
346 } else if (strncmp("hi3559v200", s, CHIP_NAME_LEN) == 0) {
347 set_hi3559v200_clk(cmos_yuv_flag);
348 } else if (strncmp("hi3556v200", s, CHIP_NAME_LEN) == 0) {
349 set_hi3556v200_clk(cmos_yuv_flag);
350 } else {
351 set_hi3516cv500_clk(cmos_yuv_flag);
352 }
353 }
354
clkcfg(char * s,int cmos_yuv_flag)355 int clkcfg(char *s, int cmos_yuv_flag)
356 {
357 osal_printk("\n==========chip: %s==========", s);
358
359 sys_writel(g_reg_crg_base + 0x01B8, 0x0007f81f);
360 sys_writel(g_reg_crg_base + 0x00F0, 0x00000861);
361 sys_writel(g_reg_crg_base + 0x00F8, 0x0000000F);
362
363 clk_cfg_on_chip(s, cmos_yuv_flag);
364
365 if (cmos_yuv_flag > 0) {
366 set_cmos_flag(1);
367 } else {
368 set_cmos_flag(0);
369 }
370
371 sys_writel(g_reg_misc_base + 0x0034, 0x1);
372 sys_writel(g_reg_misc_base + 0x0000, 0x0);
373
374 return 0;
375 }
376
set_vi_workmode(int online_flag,int vpss_online_flag)377 void set_vi_workmode(int online_flag, int vpss_online_flag)
378 {
379 if (online_flag == 1) { /* vi_online_vpss_ */
380 /* 30:28 26:24 22:20 18:16 14:12 10:8 6:4 2:0 */
381 /* nnie_l_wqos nnie_h_wqos gdc_wqos viproc_wqos vpss_wqos aio_wqos vdp_wqos vicap_wqos */
382 if (vpss_online_flag == 1) {
383 sys_writel(g_reg_misc_base + 0x0080, 0x46577777);
384 } else {
385 sys_writel(g_reg_misc_base + 0x0080, 0x46576777);
386 }
387 /* scd_wqos spacc_wqos fmc_wqos emmc_wqos sdio0_wqos edma_wqos usb_wqos eth_wqos */
388 sys_writel(g_reg_misc_base + 0x0084, 0x33333376);
389 /* ddrt_wqos gzip_wqos tde_wqos ive_wqos jpge_wqos vgs_wqos vedu_wqos cpu_wqos */
390 sys_writel(g_reg_misc_base + 0x0088, 0x03444455);
391 /* --- --- --- --- --- --- sdio1_wqos jpgd_wqos */
392 sys_writel(g_reg_misc_base + 0x008c, 0x00000033);
393
394 /* nnie_l_rqos nnie_h_rqos gdc_rqos viproc_rqos vpss_rqos aio_rqos vdp_rqos vicap_rqos */
395 if (vpss_online_flag == 1) {
396 sys_writel(g_reg_misc_base + 0x0090, 0x46577777);
397 } else {
398 sys_writel(g_reg_misc_base + 0x0090, 0x46576777);
399 }
400 /* scd_rqos spacc_rqos fmc_rqos emmc_rqos sdio0_rqos edma_rqos usb_rqos eth_rqos */
401 sys_writel(g_reg_misc_base + 0x0094, 0x33333376);
402 /* ddrt_rqos gzip_rqos tde_rqos ive_rqos jpge_rqos vgs_rqos vedu_rqos cpu_rqos */
403 sys_writel(g_reg_misc_base + 0x0098, 0x03444456);
404 /* --- --- --- --- --- --- sdio1_rqos jpgd_rqos */
405 sys_writel(g_reg_misc_base + 0x009c, 0x00000033);
406 } else { /* vi_offline_vpss_ */
407 /* 30:28 26:24 22:20 18:16 14:12 10:8 6:4 2:0 */
408 /* nnie_l_wqos nnie_h_wqos gdc_wqos viproc_wqos vpss_wqos aio_wqos vdp_wqos vicap_wqos */
409 sys_writel(g_reg_misc_base + 0x0080, 0x46565667);
410 /* scd_wqos spacc_wqos fmc_wqos emmc_wqos sdio0_wqos edma_wqos usb_wqos eth_wqos */
411 sys_writel(g_reg_misc_base + 0x0084, 0x33333376);
412 /* ddrt_wqos gzip_wqos tde_wqos ive_wqos jpge_wqos vgs_wqos vedu_wqos cpu_wqos */
413 sys_writel(g_reg_misc_base + 0x0088, 0x03444455);
414 /* --- --- --- --- --- --- sdio1_wqos jpgd_wqos */
415 sys_writel(g_reg_misc_base + 0x008c, 0x00000033);
416
417 /* nnie_l_rqos nnie_h_rqos gdc_rqos viproc_rqos vpss_rqos aio_rqos vdp_rqos vicap_rqos */
418 sys_writel(g_reg_misc_base + 0x0090, 0x46575677);
419 /* scd_rqos spacc_rqos fmc_rqos emmc_rqos sdio0_rqos edma_rqos usb_rqos eth_rqos */
420 sys_writel(g_reg_misc_base + 0x0094, 0x33333376);
421 /* ddrt_rqos gzip_rqos tde_rqos ive_rqos jpge_rqos vgs_rqos vedu_rqos cpu_rqos */
422 sys_writel(g_reg_misc_base + 0x0098, 0x03445556);
423 /* --- --- --- --- --- --- sdio1_rqos jpgd_rqos */
424 sys_writel(g_reg_misc_base + 0x009c, 0x00000033);
425 }
426 }
427
set_vi_vpss_mode(int vi_vpss_mode)428 void set_vi_vpss_mode(int vi_vpss_mode)
429 {
430 int vi_online_flag;
431 int vpss_online_flag;
432
433 if ((vi_vpss_mode == 2) || (vi_vpss_mode == 3)) { /* 2:VI_ONLINE_VPSS_OFFLINE/ 3:VI_ONLINE_VPSS_ONLINE */
434 vi_online_flag = 1;
435 } else {
436 vi_online_flag = 0;
437 }
438
439 if (vi_vpss_mode == 1 || vi_vpss_mode == 3) { /* 1:VI_OFFLINE_VPSS_ONLINE/ 3:VI_ONLINE_VPSS_ONLINE */
440 vpss_online_flag = 1;
441 } else {
442 vpss_online_flag = 0;
443 }
444
445 set_vi_workmode(vi_online_flag, vpss_online_flag);
446 }
447
448 EXPORT_SYMBOL(set_vi_vpss_mode);
449
set_ddr_axi_qos(void)450 static void set_ddr_axi_qos(void)
451 {
452 /* set axi qos map mode */
453 sys_writel(g_reg_ddr_base + 0x0200, 0x00110000);
454 sys_writel(g_reg_ddr_base + 0x0210, 0x00110000);
455 sys_writel(g_reg_ddr_base + 0x0220, 0x00110000);
456 sys_writel(g_reg_ddr_base + 0x0230, 0x00110000);
457 sys_writel(g_reg_ddr_base + 0x0240, 0x00110000);
458 sys_writel(g_reg_ddr_base + 0x0250, 0x00110000);
459 sys_writel(g_reg_ddr_base + 0x0260, 0x00110000);
460 sys_writel(g_reg_ddr_base + 0x0270, 0x00110000);
461 sys_writel(g_reg_ddr_base + 0x0280, 0x00110000);
462 sys_writel(g_reg_ddr_base + 0x0290, 0x00110000);
463 sys_writel(g_reg_ddr_base + 0x02a0, 0x00110000);
464 sys_writel(g_reg_ddr_base + 0x02b0, 0x00110000);
465
466 /* set axi qos write priority map table */
467 sys_writel(g_reg_ddr_base + 0x0204, 0x01234567);
468 sys_writel(g_reg_ddr_base + 0x0214, 0x01234567);
469 sys_writel(g_reg_ddr_base + 0x0224, 0x01234567);
470 sys_writel(g_reg_ddr_base + 0x0234, 0x01234567);
471 sys_writel(g_reg_ddr_base + 0x0244, 0x01234567);
472 sys_writel(g_reg_ddr_base + 0x0254, 0x01234567);
473 sys_writel(g_reg_ddr_base + 0x0264, 0x01234567);
474 sys_writel(g_reg_ddr_base + 0x0274, 0x01234567);
475 sys_writel(g_reg_ddr_base + 0x0284, 0x01234567);
476 sys_writel(g_reg_ddr_base + 0x0294, 0x01234567);
477 sys_writel(g_reg_ddr_base + 0x02a4, 0x01234567);
478 sys_writel(g_reg_ddr_base + 0x02b4, 0x01234567);
479
480 /* set axi qos read priority map table */
481 sys_writel(g_reg_ddr_base + 0x0208, 0x01234567);
482 sys_writel(g_reg_ddr_base + 0x0218, 0x01234567);
483 sys_writel(g_reg_ddr_base + 0x0228, 0x01234567);
484 sys_writel(g_reg_ddr_base + 0x0238, 0x01234567);
485 sys_writel(g_reg_ddr_base + 0x0248, 0x01234567);
486 sys_writel(g_reg_ddr_base + 0x0258, 0x01234567);
487 sys_writel(g_reg_ddr_base + 0x0268, 0x01234567);
488 sys_writel(g_reg_ddr_base + 0x0278, 0x01234567);
489 sys_writel(g_reg_ddr_base + 0x0288, 0x01234567);
490 sys_writel(g_reg_ddr_base + 0x0298, 0x01234567);
491 sys_writel(g_reg_ddr_base + 0x02a8, 0x01234567);
492 sys_writel(g_reg_ddr_base + 0x02b8, 0x01234567);
493 }
494
set_ddr_qos_buf(void)495 static void set_ddr_qos_buf(void)
496 {
497 sys_writel(g_reg_ddr_base + 0x4000, 0x00000002);
498 sys_writel(g_reg_ddr_base + 0x410c, 0x0000000b);
499 sys_writel(g_reg_ddr_base + 0x4110, 0x0000000b);
500 sys_writel(g_reg_ddr_base + 0x408c, 0x90b20906);
501 sys_writel(g_reg_ddr_base + 0x4090, 0x90620906);
502 sys_writel(g_reg_ddr_base + 0x40f4, 0x00000033);
503 sys_writel(g_reg_ddr_base + 0x40ec, 0x00000011);
504 sys_writel(g_reg_ddr_base + 0x40f0, 0x00001111);
505 sys_writel(g_reg_ddr_base + 0x41f4, 0x00000000);
506
507 sys_writel(g_reg_ddr_base + 0x41f0, 0x1);
508 sys_writel(g_reg_ddr_base + 0x40ac, 0x00000080);
509 sys_writel(g_reg_ddr_base + 0x41f8, 0x800002);
510 sys_writel(g_reg_ddr_base + 0x4068, 0x51);
511 sys_writel(g_reg_ddr_base + 0x406c, 0x51);
512
513 sys_writel(g_reg_ddr_base + 0x4300, 0x20040);
514 reg_write32(0 << 2, 0x1 << 2, g_reg_ddr_base + 0x4088); /* 2 register offset. */
515 }
516
sys_ctl(int online_flag)517 void sys_ctl(int online_flag)
518 {
519 set_vi_workmode(online_flag, 0);
520
521 set_ddr_axi_qos();
522 set_ddr_qos_buf();
523 }
524
525 #ifdef CONFIG_HI_MOTIONFUSION_SUPPORT
526 /* spi 2 pin mux for motion sensor */
motionsensor_cfg_mux(void)527 void motionsensor_cfg_mux(void)
528 {
529 sys_writel(g_reg_crg_base + 0x01bc, 0x01807882);
530 sys_writel(g_reg_iocfg_base + 0x0050, 0x474);
531 sys_writel(g_reg_iocfg_base + 0x0054, 0x474);
532 sys_writel(g_reg_iocfg_base + 0x0058, 0x474);
533 sys_writel(g_reg_iocfg_base + 0x005c, 0x474);
534 }
535 #endif
536
i2c0_pin_mux(void)537 void i2c0_pin_mux(void)
538 {
539 sys_writel(g_reg_iocfg_base + 0x0074, 0x422);
540 sys_writel(g_reg_iocfg_base + 0x0078, 0x422);
541 }
542
i2c1_pin_mux(void)543 void i2c1_pin_mux(void)
544 {
545 sys_writel(g_reg_iocfg_base + 0x007C, 0x422);
546 sys_writel(g_reg_iocfg_base + 0x0080, 0x522);
547 }
548
i2c2_pin_mux(void)549 void i2c2_pin_mux(void)
550 {
551 sys_writel(g_reg_iocfg1_base + 0x0018, 0x521);
552 sys_writel(g_reg_iocfg1_base + 0x001C, 0x521);
553 }
554
i2c3_pin_mux(void)555 void i2c3_pin_mux(void)
556 {
557 sys_writel(g_reg_iocfg2_base + 0x0090, 0x521);
558 sys_writel(g_reg_iocfg2_base + 0x008C, 0x521);
559 sys_writel(g_reg_iocfg2_base + 0x0034, 0x470);
560 }
561
i2c6_pin_mux(void)562 void i2c6_pin_mux(void)
563 {
564 sys_writel(g_reg_iocfg_base + 0x0048, 0x423);
565 sys_writel(g_reg_iocfg_base + 0x004C, 0x423);
566 }
567
i2c3_reset(void)568 void i2c3_reset(void)
569 {
570 sys_writel(g_reg_gpio_base + 0x0400, 0xff);
571 sys_writel(g_reg_gpio_base + 0x03fc, 0xff);
572 }
spi0_pin_mux(void)573 void spi0_pin_mux(void)
574 {
575 sys_writel(g_reg_iocfg_base + 0x0074, 0x451);
576 sys_writel(g_reg_iocfg_base + 0x0078, 0x411);
577 sys_writel(g_reg_iocfg_base + 0x007C, 0x411);
578 sys_writel(g_reg_iocfg_base + 0x0080, 0x541);
579 }
580
spi1_pin_mux(void)581 void spi1_pin_mux(void)
582 {
583 reg_write32(0x1 << 13, 0x1 << 13, g_reg_crg_base + 0x01BC); /* 13 Register bit */
584 sys_writel(g_reg_iocfg2_base + 0x0020, 0x651);
585 sys_writel(g_reg_iocfg2_base + 0x0024, 0x611);
586 sys_writel(g_reg_iocfg2_base + 0x002c, 0x411);
587 sys_writel(g_reg_iocfg2_base + 0x0028, 0x541);
588 }
589
spi2_pin_mux(void)590 void spi2_pin_mux(void)
591 {
592 sys_writel(g_reg_iocfg2_base + 0x0050, 0x454);
593 sys_writel(g_reg_iocfg2_base + 0x0054, 0x414);
594 sys_writel(g_reg_iocfg2_base + 0x0058, 0x414);
595 sys_writel(g_reg_iocfg2_base + 0x005c, 0x444);
596 }
597
sensor_cfg_mux(void)598 void sensor_cfg_mux(void)
599 {
600 sys_writel(g_reg_iocfg_base + 0x006C, 0x461);
601 sys_writel(g_reg_iocfg_base + 0x0070, 0x671);
602
603 sys_writel(g_reg_iocfg_base + 0x0060, 0x662);
604 sys_writel(g_reg_iocfg_base + 0x0064, 0x672);
605 }
606
vi_mipi_rx_mux(void)607 void vi_mipi_rx_mux(void)
608 {
609 sys_writel(g_reg_iocfg_base + 0x0028, 0x400);
610 sys_writel(g_reg_iocfg_base + 0x002C, 0x400);
611 sys_writel(g_reg_iocfg_base + 0x0030, 0x400);
612 sys_writel(g_reg_iocfg_base + 0x0034, 0x400);
613 sys_writel(g_reg_iocfg_base + 0x0038, 0x400);
614 sys_writel(g_reg_iocfg_base + 0x003C, 0x400);
615 sys_writel(g_reg_iocfg_base + 0x0018, 0x400);
616 sys_writel(g_reg_iocfg_base + 0x001C, 0x400);
617 sys_writel(g_reg_iocfg_base + 0x0020, 0x400);
618 sys_writel(g_reg_iocfg_base + 0x0024, 0x400);
619 }
620
vi_bt1120_mode_mux(void)621 void vi_bt1120_mode_mux(void)
622 {
623 osal_printk("\n==== vi_bt1120_mode_mux.");
624 sys_writel(g_reg_iocfg_base + 0x0010, 0x401);
625 sys_writel(g_reg_iocfg_base + 0x0014, 0x401);
626 sys_writel(g_reg_iocfg_base + 0x0018, 0x401);
627 sys_writel(g_reg_iocfg_base + 0x001C, 0x401);
628 sys_writel(g_reg_iocfg_base + 0x0020, 0x401);
629 sys_writel(g_reg_iocfg_base + 0x0024, 0x401);
630 sys_writel(g_reg_iocfg_base + 0x0028, 0x401);
631 sys_writel(g_reg_iocfg_base + 0x002C, 0x401);
632 sys_writel(g_reg_iocfg_base + 0x0040, 0x471);
633 sys_writel(g_reg_iocfg_base + 0x0044, 0x471);
634 sys_writel(g_reg_iocfg_base + 0x0048, 0x471);
635 sys_writel(g_reg_iocfg_base + 0x004C, 0x471);
636 sys_writel(g_reg_iocfg_base + 0x0050, 0x471);
637 sys_writel(g_reg_iocfg_base + 0x0054, 0x471);
638 sys_writel(g_reg_iocfg_base + 0x0058, 0x471);
639 sys_writel(g_reg_iocfg_base + 0x005C, 0x471);
640 sys_writel(g_reg_iocfg_base + 0x0060, 0x471);
641 sys_writel(g_reg_iocfg_base + 0x0064, 0x471);
642 sys_writel(g_reg_iocfg_base + 0x0068, 0x461);
643 }
644
vi_bt656_mode_mux(void)645 void vi_bt656_mode_mux(void)
646 {
647 osal_printk("\n==== vi_bt656_mode_mux.");
648 sys_writel(g_reg_iocfg_base + 0x0040, 0x471);
649 sys_writel(g_reg_iocfg_base + 0x0044, 0x471);
650 sys_writel(g_reg_iocfg_base + 0x0048, 0x471);
651 sys_writel(g_reg_iocfg_base + 0x004C, 0x471);
652 sys_writel(g_reg_iocfg_base + 0x0050, 0x471);
653 sys_writel(g_reg_iocfg_base + 0x0054, 0x471);
654 sys_writel(g_reg_iocfg_base + 0x0058, 0x471);
655 sys_writel(g_reg_iocfg_base + 0x005C, 0x471);
656 sys_writel(g_reg_iocfg_base + 0x0068, 0x461);
657 sys_writel(g_reg_gpio_base + 0x4400, 0xff);
658 sys_writel(g_reg_gpio_base + 0x43fc, 0xff);
659 }
660
vi_slave_mode0_mux(void)661 void vi_slave_mode0_mux(void)
662 {
663 sys_writel(g_reg_iocfg_base + 0x0060, 0x474);
664 sys_writel(g_reg_iocfg_base + 0x0064, 0x474);
665 }
666
vi_slave_mode1_mux(void)667 void vi_slave_mode1_mux(void)
668 {
669 sys_writel(g_reg_iocfg_base + 0x007C, 0x474);
670 sys_writel(g_reg_iocfg_base + 0x0080, 0x474);
671 }
672
vo_bt656_mode_mux(void)673 void vo_bt656_mode_mux(void)
674 {
675 sys_writel(g_reg_iocfg_base + 0x0068, 0x462);
676 sys_writel(g_reg_iocfg_base + 0x0040, 0x472);
677 sys_writel(g_reg_iocfg_base + 0x0044, 0x472);
678 sys_writel(g_reg_iocfg_base + 0x0048, 0x472);
679 sys_writel(g_reg_iocfg_base + 0x004C, 0x472);
680 sys_writel(g_reg_iocfg_base + 0x0050, 0x472);
681 sys_writel(g_reg_iocfg_base + 0x0054, 0x472);
682 sys_writel(g_reg_iocfg_base + 0x0058, 0x472);
683 sys_writel(g_reg_iocfg_base + 0x005C, 0x472);
684 }
685
vo_bt1120_mode_mux(void)686 void vo_bt1120_mode_mux(void)
687 {
688 sys_writel(g_reg_iocfg2_base + 0x0034, 0x063);
689 sys_writel(g_reg_iocfg2_base + 0x0060, 0x463);
690 sys_writel(g_reg_iocfg2_base + 0x0050, 0x623);
691 sys_writel(g_reg_iocfg2_base + 0x0038, 0x423);
692 sys_writel(g_reg_iocfg2_base + 0x003c, 0x623);
693 sys_writel(g_reg_iocfg2_base + 0x005c, 0x663);
694 sys_writel(g_reg_iocfg2_base + 0x0044, 0x623);
695 sys_writel(g_reg_iocfg2_base + 0x0040, 0x623);
696 sys_writel(g_reg_iocfg2_base + 0x0048, 0x423);
697
698 sys_writel(g_reg_iocfg2_base + 0x0070, 0x463);
699 sys_writel(g_reg_iocfg2_base + 0x006c, 0x463);
700 sys_writel(g_reg_iocfg2_base + 0x0078, 0x463);
701 sys_writel(g_reg_iocfg2_base + 0x0074, 0x463);
702 sys_writel(g_reg_iocfg2_base + 0x0080, 0x463);
703 sys_writel(g_reg_iocfg2_base + 0x007c, 0x463);
704 sys_writel(g_reg_iocfg2_base + 0x0088, 0x663);
705 sys_writel(g_reg_iocfg2_base + 0x0084, 0x663);
706 }
707
mipi_tx_lcd_mux(int lane_num)708 void mipi_tx_lcd_mux(int lane_num)
709 {
710 int i;
711
712 for (i = 0; i < lane_num; i++) {
713 switch (i) {
714 case 0: /* 0 -- lane0 */
715 sys_writel(g_reg_iocfg2_base + 0x0088, 0x670);
716 sys_writel(g_reg_iocfg2_base + 0x0084, 0x670);
717 break;
718
719 case 1: /* 1 -- lane1 */
720 sys_writel(g_reg_iocfg2_base + 0x007C, 0x470);
721 sys_writel(g_reg_iocfg2_base + 0x0080, 0x470);
722 break;
723
724 case 2: /* 2 -- lane2 */
725 sys_writel(g_reg_iocfg2_base + 0x006C, 0x470);
726 sys_writel(g_reg_iocfg2_base + 0x0070, 0x470);
727 break;
728
729 case 3: /* 3 -- lane3 */
730 sys_writel(g_reg_iocfg2_base + 0x0068, 0x670);
731 sys_writel(g_reg_iocfg2_base + 0x0064, 0x670);
732 break;
733
734 default:
735 break;
736 }
737 }
738
739 sys_writel(g_reg_iocfg2_base + 0x0074, 0x460);
740 sys_writel(g_reg_iocfg2_base + 0x0078, 0x460);
741 }
742
mipi_tx_set_rest(void)743 void mipi_tx_set_rest(void)
744 {
745 sys_writel(g_reg_gpio_base + 0x0080, 0x20);
746 sys_writel(g_reg_gpio_base + 0x0400, 0x20);
747 sys_writel(g_reg_gpio_base + 0x0080, 0x00);
748 sys_writel(g_reg_gpio_base + 0x0080, 0x20);
749 }
750
hdmi_pin_mux(void)751 void hdmi_pin_mux(void)
752 {
753 sys_writel(g_reg_iocfg_base + 0x0000, 0x431);
754 sys_writel(g_reg_iocfg_base + 0x0004, 0x431);
755 sys_writel(g_reg_iocfg_base + 0x0008, 0x631);
756 sys_writel(g_reg_iocfg_base + 0x000C, 0x621);
757 }
758
vo_6bit_lcd_mux(void)759 static void vo_6bit_lcd_mux(void)
760 {
761 sys_writel(g_reg_iocfg2_base + 0x0068, 0x674);
762 sys_writel(g_reg_iocfg2_base + 0x0084, 0x674);
763 sys_writel(g_reg_iocfg2_base + 0x007c, 0x474);
764 sys_writel(g_reg_iocfg2_base + 0x0088, 0x674);
765 sys_writel(g_reg_iocfg2_base + 0x0080, 0x474);
766 sys_writel(g_reg_iocfg2_base + 0x0074, 0x474);
767 sys_writel(g_reg_iocfg2_base + 0x0078, 0x474);
768 sys_writel(g_reg_iocfg2_base + 0x006C, 0x474);
769 sys_writel(g_reg_iocfg2_base + 0x0070, 0x474);
770 sys_writel(g_reg_iocfg2_base + 0x0064, 0x674);
771 }
772
vo_8bit_lcd_reset(void)773 void vo_8bit_lcd_reset(void)
774 {
775 sys_writel(g_reg_iocfg2_base + 0x009C, 0x600);
776 sys_writel(g_reg_iocfg2_base + 0x009C, 0x500);
777 }
778
vo_8bit_lcd_mux(void)779 void vo_8bit_lcd_mux(void)
780 {
781 sys_writel(g_reg_iocfg2_base + 0x0034, 0x422);
782 sys_writel(g_reg_iocfg2_base + 0x0058, 0x462);
783 sys_writel(g_reg_iocfg2_base + 0x004c, 0x462);
784 sys_writel(g_reg_iocfg2_base + 0x0054, 0x462);
785 sys_writel(g_reg_iocfg2_base + 0x0048, 0x422);
786 sys_writel(g_reg_iocfg2_base + 0x0040, 0x622);
787 sys_writel(g_reg_iocfg2_base + 0x0044, 0x622);
788 sys_writel(g_reg_iocfg2_base + 0x005C, 0x622);
789 sys_writel(g_reg_iocfg2_base + 0x003c, 0x622);
790 sys_writel(g_reg_iocfg2_base + 0x0038, 0x422);
791 sys_writel(g_reg_iocfg2_base + 0x0050, 0x622);
792 sys_writel(g_reg_iocfg2_base + 0x0060, 0x462);
793 }
794
795
vo_24bit_lcd_mux(void)796 void vo_24bit_lcd_mux(void)
797 {
798 sys_writel(g_reg_iocfg_base + 0x004c, 0x470);
799
800 sys_writel(g_reg_gpio_base + 0x3400, 0x08);
801 sys_writel(g_reg_gpio_base + 0x3020, 0x00);
802 sys_writel(g_reg_gpio_base + 0x3020, 0x08);
803
804 sys_writel(g_reg_iocfg2_base + 0x0034, 0x462);
805 sys_writel(g_reg_iocfg2_base + 0x0058, 0x432);
806 sys_writel(g_reg_iocfg2_base + 0x004C, 0x462);
807 sys_writel(g_reg_iocfg2_base + 0x0054, 0x432);
808 sys_writel(g_reg_iocfg2_base + 0x0048, 0x432);
809 sys_writel(g_reg_iocfg2_base + 0x0040, 0x632);
810 sys_writel(g_reg_iocfg2_base + 0x0044, 0x632);
811 sys_writel(g_reg_iocfg2_base + 0x005C, 0x632);
812 sys_writel(g_reg_iocfg2_base + 0x003C, 0x632);
813 sys_writel(g_reg_iocfg2_base + 0x0038, 0x432);
814 sys_writel(g_reg_iocfg2_base + 0x0050, 0x632);
815 sys_writel(g_reg_iocfg2_base + 0x0060, 0x462);
816 sys_writel(g_reg_iocfg2_base + 0x0084, 0x672);
817 sys_writel(g_reg_iocfg2_base + 0x0088, 0x672);
818 sys_writel(g_reg_iocfg2_base + 0x007C, 0x472);
819 sys_writel(g_reg_iocfg2_base + 0x0080, 0x472);
820 sys_writel(g_reg_iocfg2_base + 0x0074, 0x472);
821 sys_writel(g_reg_iocfg2_base + 0x0078, 0x472);
822 sys_writel(g_reg_iocfg2_base + 0x006C, 0x472);
823 sys_writel(g_reg_iocfg2_base + 0x0070, 0x462);
824 sys_writel(g_reg_iocfg2_base + 0x0064, 0x672);
825 sys_writel(g_reg_iocfg2_base + 0x0068, 0x672);
826 sys_writel(g_reg_iocfg2_base + 0x0094, 0x532);
827 sys_writel(g_reg_iocfg2_base + 0x0090, 0x532);
828 sys_writel(g_reg_iocfg2_base + 0x008C, 0x532);
829 sys_writel(g_reg_iocfg2_base + 0x0098, 0x632);
830 sys_writel(g_reg_iocfg2_base + 0x009C, 0x632);
831 sys_writel(g_reg_iocfg2_base + 0x0030, 0x532);
832 }
833
i2s0_pin_mux(void)834 void i2s0_pin_mux(void)
835 {
836 sys_writel(g_reg_iocfg2_base + 0x0020, 0x663);
837 sys_writel(g_reg_iocfg2_base + 0x0024, 0x673);
838 sys_writel(g_reg_iocfg2_base + 0x0028, 0x573);
839 sys_writel(g_reg_iocfg2_base + 0x002C, 0x473);
840 sys_writel(g_reg_iocfg2_base + 0x0030, 0x433);
841 }
842
pinmux(const char * s,int cmos_yuv_flag)843 int pinmux(const char *s, int cmos_yuv_flag)
844 {
845 i2c0_pin_mux();
846 i2c1_pin_mux();
847 i2c6_pin_mux();
848 sensor_cfg_mux();
849 #ifdef CONFIG_HI_MOTIONFUSION_SUPPORT
850 motionsensor_cfg_mux();
851 #endif
852 vi_mipi_rx_mux();
853
854 if (cmos_yuv_flag == 1) { /* 1 -- BT1120 */
855 vi_bt1120_mode_mux();
856 } else if (cmos_yuv_flag == 2) { /* 2 -- BT656 */
857 vi_bt656_mode_mux();
858 } else {
859 }
860
861 #if VO_BT1120_EN
862 vo_bt1120_mode_mux();
863 #endif
864
865 #if VO_BT656_EN
866 vo_bt656_mode_mux();
867 #endif
868
869 #if VO_MIPI_TX_EN
870 mipi_tx_lcd_mux(4); /* 4lanes */
871 #endif
872
873 hdmi_pin_mux();
874
875 #if VO_LCD_24BIT_EN
876 vo_24bit_lcd_mux();
877 #endif
878
879 #if VO_MIPI_TX_EN
880 mipi_tx_set_rest();
881 #endif
882
883 spi1_pin_mux();
884 vo_6bit_lcd_mux();
885
886 #if VO_LCD_8BIT_EN
887 vo_8bit_lcd_reset();
888 vo_8bit_lcd_mux();
889 #endif
890
891 #if I2S0_EN
892 i2s0_pin_mux();
893 #endif
894 return 0;
895 }
896
897
sensor_bus_pin_mux(int index,bus_type type,const char * name)898 void sensor_bus_pin_mux(int index, bus_type type, const char *name)
899 {
900 unsigned int len;
901
902 len = SENSOR_NAME_LEN;
903
904 /* if sensor is slave, please set vi_slave_mode0_mux. */
905 if (strncmp("imx206", name, len) == 0) {
906 vi_slave_mode0_mux();
907 }
908 if (strncmp("imx307_2l_slave", name, len) == 0) {
909 vi_slave_mode1_mux();
910 }
911
912 if (type == BUS_TYPE_I2C) {
913 if (index == 0) {
914 } else if (index == 1) {
915 }
916 } else if (type == BUS_TYPE_SPI) {
917 if (index == 0) {
918 sys_writel(g_reg_misc_base + 0x0018, 0x1);
919 spi0_pin_mux();
920 } else if (index == 1) {
921 sys_writel(g_reg_misc_base + 0x0018, 0x5);
922 spi1_pin_mux();
923 }
924 }
925 }
926
sensor_clk_config(char * s)927 static void sensor_clk_config(char *s)
928 {
929 int ret;
930 int index;
931 unsigned int clock;
932 bus_type type;
933 char sensor_name[SENSOR_NAME_LEN];
934
935 ret = parse_sensor_name(s, sensor_name, SENSOR_NAME_LEN);
936 if (ret >= 0) {
937 index = parse_sensor_index(s);
938 if (index >= 0) {
939 osal_printk("\n==========sensor%d: %s==========", index, sensor_name);
940
941 clock = parse_sensor_clock(sensor_name);
942 type = parse_sensor_bus_type(sensor_name);
943
944 if (is_coms(sensor_name) == 0) {
945 sensor_bus_pin_mux(index, type, sensor_name);
946 sensor_clock_config(index, clock);
947 }
948 }
949 }
950 }
951
sensor_config(char * s)952 int sensor_config(char *s)
953 {
954 char *line;
955
956 line = strsep(&s, ":");
957 while (line != NULL) {
958 int i;
959 char *argv[8]; /* 8 -- accept string length of 'sns0' */
960
961 for (i = 0; (argv[i] = strsep(&line, ",")) != NULL;) {
962 sensor_clk_config(argv[i]);
963
964 if (++i == ARRAY_SIZE(argv)) {
965 break;
966 }
967 }
968 line = strsep(&s, ":");
969 }
970
971 return 0;
972 }
973
ampunmute(void)974 static int ampunmute(void)
975 {
976 sys_writel(g_reg_iocfg1_base + 0x34, 0x00000431);
977
978 sys_writel(g_reg_gpio_base + 0xa3fc, 0x000000ff);
979 sys_writel(g_reg_gpio_base + 0xa400, 0x000000ff);
980 sys_writel(g_reg_gpio_base + 0xa3fc, 0x000000ff);
981
982 return 0;
983 }
984
hi_exit_unmap_comm_reg(void)985 static void hi_exit_unmap_comm_reg(void)
986 {
987 /* when set pipe mode, system will call set_vi_workmode, so misc can't iounmap */
988 if (g_reg_crg_base != NULL) {
989 osal_iounmap(g_reg_crg_base, 0x10000);
990 g_reg_crg_base = 0;
991 }
992
993 if (g_reg_ddr_base != NULL) {
994 osal_iounmap(g_reg_ddr_base, 0x10000);
995 g_reg_ddr_base = 0;
996 }
997
998 if (g_reg_sysctl_base != NULL) {
999 osal_iounmap(g_reg_sysctl_base, 0x10000);
1000 g_reg_sysctl_base = 0;
1001 }
1002
1003 if (g_reg_iocfg_base != NULL) {
1004 osal_iounmap(g_reg_iocfg_base, 0x10000);
1005 g_reg_iocfg_base = 0;
1006 }
1007
1008 if (g_reg_iocfg1_base != NULL) {
1009 osal_iounmap(g_reg_iocfg1_base, 0x10000);
1010 g_reg_iocfg1_base = 0;
1011 }
1012
1013 if (g_reg_iocfg2_base != NULL) {
1014 osal_iounmap(g_reg_iocfg2_base, 0x10000);
1015 g_reg_iocfg2_base = 0;
1016 }
1017
1018 if (g_reg_gpio_base != NULL) {
1019 osal_iounmap(g_reg_gpio_base, 0x10000);
1020 g_reg_gpio_base = 0;
1021 }
1022 }
1023
hi_init_map_reg(void)1024 static int hi_init_map_reg(void)
1025 {
1026 g_reg_crg_base = (void*)osal_ioremap(0x12010000, 0x10000);
1027 if (g_reg_crg_base == NULL) {
1028 return -1;
1029 }
1030
1031 g_reg_misc_base = (void*)osal_ioremap(0x12030000, 0x10000);
1032 if (g_reg_misc_base == NULL) {
1033 return -1;
1034 }
1035
1036 g_reg_sysctl_base = (void*)osal_ioremap(0x12040000, 0x10000);
1037 if (g_reg_sysctl_base == NULL) {
1038 return -1;
1039 }
1040
1041 g_reg_ddr_base = (void*)osal_ioremap(0x12060000, 0x10000);
1042 if (g_reg_ddr_base == NULL) {
1043 return -1;
1044 }
1045
1046 g_reg_iocfg_base = (void*)osal_ioremap(0x114F0000, 0x10000);
1047 if (g_reg_iocfg_base == NULL) {
1048 return -1;
1049 }
1050
1051 g_reg_iocfg1_base = (void*)osal_ioremap(0x111F0000, 0x10000);
1052 if (g_reg_iocfg1_base == NULL) {
1053 return -1;
1054 }
1055
1056 g_reg_iocfg2_base = (void*)osal_ioremap(0x112F0000, 0x10000);
1057 if (g_reg_iocfg2_base == NULL) {
1058 return -1;
1059 }
1060
1061 g_reg_gpio_base = (void*)osal_ioremap(0x120D0000, 0x10000);
1062 if (g_reg_gpio_base == NULL) {
1063 return -1;
1064 }
1065
1066 return 0;
1067 }
1068
hi_sysconfig_init(int cmos_yuv_flag,int online_flag,char * chip_list,char * sensor_list)1069 int hi_sysconfig_init(int cmos_yuv_flag, int online_flag, char* chip_list, char* sensor_list)
1070 {
1071 int ret;
1072
1073 ret = hi_init_map_reg();
1074 if (ret != 0) {
1075 goto end;
1076 }
1077
1078 pinmux(chip_list, cmos_yuv_flag);
1079
1080 clkcfg(chip_list, cmos_yuv_flag);
1081
1082 sys_ctl(online_flag);
1083
1084 ampunmute();
1085
1086 sensor_config(sensor_list);
1087
1088 end:
1089 hi_exit_unmap_comm_reg();
1090
1091 return 0;
1092 }
1093
hi_sysconfig_exit(void)1094 void hi_sysconfig_exit(void)
1095 {
1096 if (g_reg_misc_base != NULL) {
1097 iounmap(g_reg_misc_base);
1098 g_reg_misc_base = 0;
1099 }
1100
1101 hi_exit_unmap_comm_reg();
1102
1103 return;
1104 }
1105
1106 #ifndef __HuaweiLite__
sys_config_probe(struct platform_device * pdev)1107 static int sys_config_probe(struct platform_device* pdev)
1108 {
1109 osal_platform_get_module_param(pdev, "g_online_flag", int, &g_online_flag);
1110 osal_platform_get_module_param(pdev, "g_cmos_yuv_flag", int, &g_cmos_yuv_flag);
1111 osal_platform_get_modparam_string(pdev, "sensors", SENSOR_LIST_CMDLINE_LEN, g_sensor_list);
1112 osal_platform_get_modparam_string(pdev, "chip", CHIP_NAME_LEN, g_chip_list);
1113
1114 return hi_sysconfig_init(g_cmos_yuv_flag, g_online_flag, g_chip_list, g_sensor_list);
1115 }
1116
sys_config_remove(struct platform_device * pdev)1117 static int sys_config_remove(struct platform_device* pdev)
1118 {
1119 sys_config_unused(pdev);
1120 hi_sysconfig_exit();
1121 return 0;
1122 }
1123
1124 static const struct of_device_id g_sys_config_match[] = {
1125 { .compatible = "hisilicon,sys_config" },
1126 {},
1127 };
1128 MODULE_DEVICE_TABLE(of, g_sys_config_match);
1129
1130 static struct platform_driver g_sys_config_driver = {
1131 .probe = sys_config_probe,
1132 .remove = sys_config_remove,
1133 .driver = {
1134 .name = "sys_config",
1135 .of_match_table = g_sys_config_match,
1136 },
1137 };
1138
1139 osal_module_platform_driver(g_sys_config_driver);
1140 #endif
1141
1142 #ifndef __HuaweiLite__
1143 MODULE_LICENSE("GPL");
1144 MODULE_AUTHOR("Hisilicon");
1145 #endif
1146