1 /* 2 * Copyright (c) 2022 HiSilicon (Shanghai) Technologies CO., LIMITED. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 */ 15 16 #ifndef __HI_COMM_ISP_H__ 17 #define __HI_COMM_ISP_H__ 18 19 #include "hi_type.h" 20 #include "hi_errno.h" 21 #include "hi_common.h" 22 #include "hi_isp_debug.h" 23 #include "hi_comm_video.h" 24 #include "hi_isp_defines.h" 25 26 #ifdef __cplusplus 27 #if __cplusplus 28 extern "C" { 29 #endif 30 #endif /* End of #ifdef __cplusplus */ 31 32 /* MACRO DEFINITION */ 33 #define res_width_max(dev) (isp_get_max_width(dev)) 34 #define RES_WIDTH_MIN 120 35 #define res_height_max(dev) (isp_get_max_height(dev)) 36 #define RES_HEIGHT_MIN 120 37 #define ISP_ALIGN_WIDTH 4 38 #define ISP_ALIGN_HEIGHT 4 39 #define FRAME_RATE_MAX 65535.0 40 41 #define ISP_BE_BUF_NUM_MAX 9 42 #define ISP_BE_BUF_NUM_MIN 2 43 44 #define VREG_MAX_NUM 16 45 46 #define AWB_ZONE_ORIG_ROW 32 47 #define AWB_ZONE_ORIG_COLUMN 32 48 #define AWB_ZONE_BIN_MAX 4 49 #define AE_ZONE_ROW 15 50 #define AE_ZONE_COLUMN 17 51 #define AE_PLANE_NUM 4 52 #define MG_ZONE_ROW 15 53 #define MG_ZONE_COLUMN 17 54 #define AWB_ZONE_NUM (AWB_ZONE_ORIG_ROW * AWB_ZONE_ORIG_COLUMN * AWB_ZONE_BIN) 55 #define AWB_ZONE_STITCH_MAX (AWB_ZONE_NUM * ISP_MAX_STITCH_NUM) 56 #define AF_ZONE_ROW 15 57 #define AF_ZONE_COLUMN 17 58 #define LIGHTSOURCE_NUM 4 59 #define MAX_AWB_LIB_NUM (AWB_LIB_NUM) 60 #define MAX_AE_LIB_NUM (AE_LIB_NUM) 61 62 #define AE_MIN_WIDTH 256 63 #define AE_MIN_HEIGHT 120 64 #define AWB_MIN_WIDTH 60 65 #define AWB_MIN_HEIGHT 14 66 #define AF_MIN_WIDTH 256 67 #define AF_MIN_HEIGHT 120 68 #define AF_ALIGN_WIDTH 8 69 #define AF_ALIGN_HEIGHT 2 70 #define AF_PLGS_NUM 2 71 72 #define GAMMA_NODE_NUM 1025 73 #define PREGAMMA_NODE_NUM 257 74 75 #define LCAC_STRENGTH_NUM 16 76 77 #define ISP_AUTO_ISO_STRENGTH_NUM 16 78 #define ISP_SHARPEN_LUMA_NUM 32 79 #define ISP_SHARPEN_GAIN_NUM 32 80 81 #define ISP_MAX_SNS_REGS 32 82 #define ISP_MAX_SNS_EXP_ADDR_NUM 3 83 84 #define HI_ISP_RLSC_POINTS 129 85 #define HI_ISP_RLSC_DEFAULT_RADIAL_STR 4096 86 #define HI_ISP_RLSC_DEFAULT_SCALE 3 87 #define HI_ISP_RLSC_DEFAULT_MANUAL_WEIGHT 256 88 #define HI_ISP_RLSC_DEFAULT_WBGAIN 256 89 #define HI_ISP_RLSC_DEFAULT_LIGHT 0 90 #define HI_ISP_RLSC_WEIGHT_Q_BITS 8 91 #define HI_ISP_RLSC_GAIN_LUT_NUM 3 92 #define HI_ISP_RLSC_SCALE_NUM 14 93 #define HI_ISP_MLSC_X_HALF_GRID_NUM ((HI_ISP_LSC_GRID_COL - 1) / 2) 94 #define HI_ISP_MLSC_Y_HALF_GRID_NUM ((HI_ISP_LSC_GRID_ROW - 1) / 2) 95 #define HI_ISP_MLSC_GAIN_LUT_NUM 2 96 #define HI_ISP_ACS_LIGHT_NUM 32 97 #define HI_ISP_ACS_CCT_NUM 3 98 #define HI_ISP_ACS_HIST_NUM 10 99 #define HI_ISP_ACS_CHN_NUM 2 100 101 #define ISP_VREG_SIZE_BIN 0x20000 102 #define ALG_LIB_VREG_SIZE_BIN 0x1000 103 #define WDR_MAX_FRAME_NUM 4 104 105 #define ISP_HRS_NUM 6 106 107 #define ISP_CSC_DC_NUM 3 108 #define ISP_CSC_COEF_NUM 9 109 110 #define BAYER_CALIBTAION_MAX_NUM 50 111 #define HI_ISP_BAYERNR_STRENGTH_DIVISOR 100 112 #define HI_ISP_BAYERNR_CORINGLOW_STRENGTH_DIVISOR 10000 113 #define AI_MAX_STEP_FNO_NUM 1024 114 115 #define ISP_BAS_TAPS_ROW_NUM 17 116 #define ISP_BAS_TAPS_COL_6 6 117 #define ISP_BAS_TAPS_COL_4 4 118 #define HI_ISP_BAYERNR_LUT_LENGTH 33 119 #define HI_ISP_BAYERNR_LMTLUTNUM 129 120 #define PRO_MAX_FRAME_NUM 8 121 #define ISP_RGB_CHN_NUM 3 122 123 #define HI_ISP_DEMOSAIC_LUT_LENGTH 17 124 #define ISP_BAYER_CHN_NUM 4 125 #define BAYER_CHN_R 0 126 #define BAYER_CHN_GR 1 127 #define BAYER_CHN_GB 2 128 #define BAYER_CHN_B 3 129 #define LDCI_LPF_LUT_SIZE 9 130 #define LDCI_HE_LUT_SIZE 33 131 #define LDCI_DE_USM_LUT_SIZE 33 132 #define LDCI_COLOR_GAIN_LUT_SIZE 65 133 #define LDCI_DE_LPF_H_COEF_NUM 3 134 #define LDCI_DE_LPF_V_COEF_NUM 2 135 #define LDCI_POLY_LUT_NUM 65 136 #define LDCI_PF_SFT_NUM 4 137 #define LDCI_PF_PARA_NUM 2 138 #define LDCI_SM_WIDTH_NUM 3 139 140 #define NOISESET_ELENUM 7 141 142 #define HI_ISP_DRC_CUBIC_POINT_NUM 5 143 #define HI_ISP_DRC_CC_NODE_NUM 33 144 #define HI_ISP_DRC_TM_NODE_NUM 200 145 #define HI_ISP_DRC_TM_SEG_NUM 8 146 #define HI_ISP_DRC_DT_CURVE_NODE_NUM 16 147 #define HI_ISP_DRC_BIN_MIX_NODE_NUM 8 148 #define HI_ISP_DRC_EXP_COMP_SAMPLE_NUM 8 149 #define HI_ISP_DRC_SHP_LOG_CONFIG_NUM 16 150 #define WDR_SIGMA_GAIN_NUM 3 151 152 #define LOG_LUT_SIZE 1025 153 #define PRE_LOG_LUT_SIZE 1025 154 #define DEHAZE_LUT_SIZE 256 155 156 #define HI_ISP_DE_LUMA_GAIN_LUT_N 17 157 #define ISP_EXP_RATIO_STRENGTH_NUM 16 158 #define ISP_LCAC_DET_NUM 3 159 160 #define ISP_DO_NOT_NEED_SWITCH_IMAGEMODE (-2) 161 162 /* DEFAULT VALUE OF GLOBAL REGISTERS DEFINED HERE */ 163 /* AE */ 164 #define HI_ISP_TOP_RGGB_START_R_GR_GB_B 0 165 #define HI_ISP_TOP_RGGB_START_GR_R_B_GB 1 166 #define HI_ISP_TOP_RGGB_START_GB_B_R_GR 2 167 #define HI_ISP_TOP_RGGB_START_B_GB_GR_R 3 168 169 #define HI_ISP_TOP_AE_SELECT_AFTER_DG 0 170 #define HI_ISP_TOP_AE_SELECT_AFTER_WB 1 171 #define HI_ISP_TOP_AE_SELECT_AFTER_DRC 2 172 173 #define HI_ISP_AE_FOUR_PLANE_MODE_DISABLE 0 174 #define HI_ISP_AE_FOUR_PLANE_MODE_ENABLE 1 175 176 /* AWB */ 177 #define HI_ISP_AWB_OFFSET_COMP_DEF 0 178 #define HI_ISP_CCM_COLORTONE_EN_DEFAULT 1 179 #define HI_ISP_CCM_COLORTONE_RGAIN_DEFAULT 256 180 #define HI_ISP_CCM_COLORTONE_BGAIN_DEFAULT 256 181 #define HI_ISP_CCM_COLORTONE_GGAIN_DEFAULT 256 182 183 #define HI_ISP_CCM_PROT_EN_DEFAULT 0 184 #define HI_ISP_CCM_CC_THD0_DEFAULT 0 185 #define HI_ISP_CCM_CC_THD1_DEFAULT 0x1E 186 #define HI_ISP_CCM_CC_PROT_RATIO_DEFAULT 10 187 #define HI_ISP_CCM_RR_THD0_DEFAULT 0x1E 188 #define HI_ISP_CCM_RR_THD1_DEFAULT 0x64 189 #define HI_ISP_CCM_GG_THD0_DEFAULT 0x6 190 #define HI_ISP_CCM_GG_THD1_DEFAULT 0x3C 191 #define HI_ISP_CCM_BB_THD0_DEFAULT 0x1E 192 #define HI_ISP_CCM_BB_THD1_DEFAULT 0x64 193 #define HI_ISP_CCM_MAX_RGB_DEFAULT 0xC8 194 #define HI_ISP_CCM_RGB_PROT_RATIO_DEFAULT 10 195 #define HI_ISP_CCM_RECOVER_EN_DEFAULT 1 196 #define HI_ISP_CCM_LUM_RATIO_DEFAULT 256 197 #define HI_ISP_CCM_HUE_RATIO_DEFAULT 256 198 199 #define ccm_convert_pre(value) (((value) & 0x8000) | ((value) << 2)) 200 #define ccm_convert(value) (((value) & 0x8000) ? ((~((value) & 0x7FFF)) + 1) : (value)) 201 202 /* GENERAL STRUCTURES */ 203 /* 204 * ISP Error Code 205 * 0x40 : ISP_NOT_INIT 206 * 0x41 : ISP_MEM_NOT_INIT 207 * 0x42 : ISP_ATTR_NOT_CFG 208 * 0x43 : ISP_SNS_UNREGISTER 209 * 0x44 : ISP_INVALID_ADDR 210 * 0x45 : ISP_NOMEM 211 * 0x46 : ISP_NO_INT 212 */ 213 typedef enum hiISP_ERR_CODE_E { 214 ERR_ISP_NOT_INIT = 0x40, /* ISP not init */ 215 ERR_ISP_MEM_NOT_INIT = 0x41, /* ISP memory not init */ 216 ERR_ISP_ATTR_NOT_CFG = 0x42, /* ISP attribute not cfg */ 217 ERR_ISP_SNS_UNREGISTER = 0x43, /* ISP sensor unregister */ 218 ERR_ISP_INVALID_ADDR = 0x44, /* ISP invalid address */ 219 ERR_ISP_NOMEM = 0x45, /* ISP nomem */ 220 ERR_ISP_NO_INT = 0x46, /* ISP */ 221 } ISP_ERR_CODE_E; 222 223 #define HI_ERR_ISP_NULL_PTR HI_DEF_ERR(HI_ID_ISP, EN_ERR_LEVEL_ERROR, EN_ERR_NULL_PTR) 224 #define HI_ERR_ISP_ILLEGAL_PARAM HI_DEF_ERR(HI_ID_ISP, EN_ERR_LEVEL_ERROR, EN_ERR_ILLEGAL_PARAM) 225 #define HI_ERR_ISP_NOT_SUPPORT HI_DEF_ERR(HI_ID_ISP, EN_ERR_LEVEL_ERROR, EN_ERR_NOT_SUPPORT) 226 227 #define HI_ERR_ISP_NOT_INIT HI_DEF_ERR(HI_ID_ISP, EN_ERR_LEVEL_ERROR, ERR_ISP_NOT_INIT) 228 #define HI_ERR_ISP_MEM_NOT_INIT HI_DEF_ERR(HI_ID_ISP, EN_ERR_LEVEL_ERROR, ERR_ISP_MEM_NOT_INIT) 229 #define HI_ERR_ISP_ATTR_NOT_CFG HI_DEF_ERR(HI_ID_ISP, EN_ERR_LEVEL_ERROR, ERR_ISP_ATTR_NOT_CFG) 230 #define HI_ERR_ISP_SNS_UNREGISTER HI_DEF_ERR(HI_ID_ISP, EN_ERR_LEVEL_ERROR, ERR_ISP_SNS_UNREGISTER) 231 #define HI_ERR_ISP_INVALID_ADDR HI_DEF_ERR(HI_ID_ISP, EN_ERR_LEVEL_ERROR, ERR_ISP_INVALID_ADDR) 232 #define HI_ERR_ISP_NOMEM HI_DEF_ERR(HI_ID_ISP, EN_ERR_LEVEL_ERROR, ERR_ISP_NOMEM) 233 #define HI_ERR_ISP_NO_INT HI_DEF_ERR(HI_ID_ISP, EN_ERR_LEVEL_ERROR, ERR_ISP_NO_INT) 234 235 /* Defines the structure of ISP module parameters. */ 236 typedef struct hiISP_MOD_PARAM_S { 237 HI_U32 u32IntBotHalf; /* RW;Range:[0, 1]; Format:32.0; Indicate ISP interrupt bottom half,No distinction vipipe */ 238 HI_U32 u32QuickStart; /* RW;Range:[0, 1]; Format:32.0; Indicate ISP Quick Start No distinction vipipe. 239 Only used for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 240 HI_BOOL bLongFrmIntEn; /* when wdr mode enable/disable long frame pipe interrupt. */ 241 /* Only used for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 242 } ISP_MOD_PARAM_S; 243 244 /* Defines the structure of ISP control parameters. */ 245 typedef struct hiISP_CTRL_PARAM_S { 246 HI_U8 u8BeBufNum; /* RW;Range:[2, 9]; offline be cfg buffer number(Only used for offline mode). 247 Not support changed after isp init */ 248 HI_U32 u32ProcParam; /* RW;Format:32.0; Indicate the update frequency of ISP_PROC information, 249 No distinction vipipe */ 250 HI_U32 u32StatIntvl; /* RW;Range:(0, 0xffffffff];Format:32.0; 251 Indicate the time interval of ISP statistic information */ 252 HI_U32 u32UpdatePos; /* RW;Range:[0, 1]; Format:32.0; Indicate the location of the configuration register of 253 ISP interrupt */ 254 HI_U32 u32IntTimeOut; /* RW;Format:32.0; Indicate the time(unit:ms) of interrupt timeout */ 255 HI_U32 u32PwmNumber; /* R;Format:32.0; Indicate PWM number */ 256 HI_U32 u32PortIntDelay; /* RW;Format:32.0; Port intertupt delay value, unit:clk */ 257 HI_BOOL bLdciTprFltEn; /* R;Indicate Enable LDCI temporal filter. Not support changed after isp init */ 258 } ISP_CTRL_PARAM_S; 259 260 /* Defines the working mode of ISP : 0 = automatic mode, 1 = manual mode */ 261 typedef enum hiISP_OP_TYPE_E { 262 OP_TYPE_AUTO = 0, 263 OP_TYPE_MANUAL = 1, 264 OP_TYPE_BUTT 265 } ISP_OP_TYPE_E; 266 267 /* 268 * Defines the prior frame of ISP 269 * 0 = long frame 270 * 1 = short frame 271 */ 272 typedef enum hiISP_PRIOR_FRAME_E { 273 LONG_FRAME = 0, 274 SHORT_FRAME = 1, 275 PRIOR_FRAME_BUTT 276 } ISP_PRIOR_FRAME_E; 277 278 /* 279 * Defines the ISP correction or detection status 280 * 0 = initial status, no calibration 281 * 1 = The static defect pixel calibration ends normally 282 * 2 = The static defect pixel calibration ends due to timeout. 283 */ 284 typedef enum hiISP_STATE_E { 285 ISP_STATE_INIT = 0, 286 ISP_STATE_SUCCESS = 1, 287 ISP_STATE_TIMEOUT = 2, 288 ISP_STATE_BUTT 289 } ISP_STATUS_E; 290 291 typedef struct hiISP_PIPE_DIFF_ATTR_S { 292 HI_S32 as32Offset[ISP_BAYER_CHN_NUM]; /* RW;Range:[-4095, 4095];Format:12.0; Black level differences between the 293 offset value */ 294 HI_U32 au32Gain[ISP_BAYER_CHN_NUM]; /* RW;Range:[0x80, 0x400];Format:4.8; The gain difference ratio */ 295 HI_U16 au16ColorMatrix[CCM_MATRIX_SIZE]; /* RW;Range:[0x0, 0xFFFF];Format:8.8; 296 Color correction matrix variance ratio */ 297 } ISP_PIPE_DIFF_ATTR_S; 298 299 /* Defines the format of the input Bayer image */ 300 typedef enum hiISP_BAYER_FORMAT_E { 301 BAYER_RGGB = 0, 302 BAYER_GRBG = 1, 303 BAYER_GBRG = 2, 304 BAYER_BGGR = 3, 305 BAYER_BUTT 306 } ISP_BAYER_FORMAT_E; 307 308 /* Defines the bitwidth of the input Bayer image, used for lsc online calibration */ 309 typedef enum hiISP_BAYER_RAWBIT_E { 310 BAYER_RAWBIT_8BIT = 8, 311 BAYER_RAWBIT_10BIT = 10, 312 BAYER_RAWBIT_12BIT = 12, 313 BAYER_RAWBIT_14BIT = 14, 314 BAYER_RAWBIT_16BIT = 16, 315 BAYER_RAWBIT_BUTT 316 } ISP_BAYER_RAWBIT_E; 317 318 /* ISP public attribute, contains the public image attribute */ 319 typedef struct hiISP_PUB_ATTR_S { 320 RECT_S stWndRect; /* RW; Start position of the cropping window, image width, and image height */ 321 SIZE_S stSnsSize; /* RW; Width and height of the image output from the sensor */ 322 HI_FLOAT f32FrameRate; /* RW; Range: [0, 0xFFFF]; For frame rate */ 323 ISP_BAYER_FORMAT_E enBayer; /* RW; Range:[0,3];Format:2.0;the format of the input Bayer image */ 324 WDR_MODE_E enWDRMode; /* RW; WDR mode select */ 325 HI_U8 u8SnsMode; /* RW; Range: [0, 0xFF]; Format: 8.0; For special sensor mode switches */ 326 } ISP_PUB_ATTR_S; 327 328 /* Slave mode sensor sync signal generate module */ 329 typedef struct hiISP_SLAVE_SNS_SYNC_S { 330 union { 331 struct { 332 HI_U32 bit16Rsv : 16; 333 HI_U32 bitHInv : 1; 334 HI_U32 bitVInv : 1; 335 HI_U32 bit12Rsv : 12; 336 HI_U32 bitHEnable : 1; 337 HI_U32 bitVEnable : 1; 338 } stBits; 339 HI_U32 u32Bytes; 340 } unCfg; 341 342 HI_U32 u32VsTime; 343 HI_U32 u32HsTime; 344 HI_U32 u32VsCyc; 345 HI_U32 u32HsCyc; 346 HI_U32 u32HsDlyCyc; 347 HI_U32 u32SlaveModeTime; 348 } ISP_SLAVE_SNS_SYNC_S; 349 350 /* Defines the ISP stitch attribute. */ 351 /* 352 * Defines the ISP firmware status 353 * 0 = Running status 354 * 1 = Frozen status 355 */ 356 typedef enum hiISP_FMW_STATE_E { 357 ISP_FMW_STATE_RUN = 0, 358 ISP_FMW_STATE_FREEZE, 359 ISP_FMW_STATE_BUTT 360 } ISP_FMW_STATE_E; 361 362 /* Defines the WDR mode of the ISP */ 363 typedef struct hiISP_WDR_MODE_S { 364 WDR_MODE_E enWDRMode; 365 } ISP_WDR_MODE_S; 366 367 typedef union hiISP_MODULE_CTRL_U { 368 HI_U64 u64Key; 369 struct { 370 HI_U64 bitBypassISPDGain : 1; /* RW;[0] */ 371 HI_U64 bitBypassAntiFC : 1; /* RW;[1] */ 372 HI_U64 bitBypassCrosstalkR : 1; /* RW;[2] */ 373 HI_U64 bitBypassDPC : 1; /* RW;[3] */ 374 HI_U64 bitBypassNR : 1; /* RW;[4] */ 375 HI_U64 bitBypassDehaze : 1; /* RW;[5] */ 376 HI_U64 bitBypassWBGain : 1; /* RW;[6] */ 377 HI_U64 bitBypassMeshShading : 1; /* RW;[7] */ 378 HI_U64 bitBypassDRC : 1; /* RW;[8] */ 379 HI_U64 bitBypassDemosaic : 1; /* RW;[9] */ 380 HI_U64 bitBypassColorMatrix : 1; /* RW;[10] */ 381 HI_U64 bitBypassGamma : 1; /* RW;[11] */ 382 HI_U64 bitBypassFSWDR : 1; /* RW;[12] */ 383 HI_U64 bitBypassCA : 1; /* RW;[13] */ 384 HI_U64 bitBypassCsConv : 1; /* RW;[14] */ 385 HI_U64 bitBypassRadialCrop : 1; /* RW;[15]; Not support for Hi3516CV500/Hi3516DV300/Hi3516AV300/ 386 Hi3559V200/Hi3556V200 */ 387 HI_U64 bitBypassSharpen : 1; /* RW;[16] */ 388 HI_U64 bitBypassLCAC : 1; /* RW;[17] */ 389 HI_U64 bitBypassGCAC : 1; /* RW;[18]; Not support for Hi3516EV200/ 390 Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 391 HI_U64 bit2ChnSelect : 2; /* RW;[19:20] */ 392 HI_U64 bitBypassLdci : 1; /* RW;[21] */ 393 HI_U64 bitBypassPreGamma : 1; /* RW;[22] */ 394 HI_U64 bitBypassRadialShading : 1; /* RW;[23]; Only used for Hi3559AV100/Hi3519AV100 */ 395 HI_U64 bitBypassAEStatFE : 1; /* RW;[24] */ 396 HI_U64 bitBypassAEStatBE : 1; /* RW;[25] */ 397 HI_U64 bitBypassMGStat : 1; /* RW;[26] */ 398 HI_U64 bitBypassDE : 1; /* RW;[27]; Only used for Hi3516CV500/Hi3516DV300/Hi3516AV300/ 399 Hi3559V200/Hi3556V200 */ 400 HI_U64 bitBypassAFStatFE : 1; /* RW;[28]; Only used for Hi3559AV100/Hi3519AV100 */ 401 HI_U64 bitBypassAFStatBE : 1; /* RW;[29]; */ 402 HI_U64 bitBypassAWBStat : 1; /* RW;[30]; */ 403 HI_U64 bitBypassCLUT : 1; /* RW;[31]; Not support for Hi3516EV200/Hi3516EV300/Hi3518EV300/ 404 Hi3516DV200 */ 405 HI_U64 bitBypassHLC : 1; /* RW;[32]; Not support for Hi3559AV100/Hi3516EV200/ 406 Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 407 HI_U64 bitBypassEdgeMark : 1; /* RW;[33]; Not support for Hi3516EV200/Hi3516EV300/ 408 Hi3518EV300/Hi3516DV200 */ 409 HI_U64 bitBypassRGBIR : 1; /* RW;[34]; Only used for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 410 HI_U64 bitRsv29 : 29; /* H; [35:63] */ 411 }; 412 } ISP_MODULE_CTRL_U; 413 414 /* 415 * Defines the RAW stream Position from the ISP 416 * 0 = the raw data is writing out before the DEMOSAIC module. 417 * Only used for Hi3559AV100 418 */ 419 typedef enum hiISP_RAW_POS_E { 420 RAW_POS_DEMOSAIC = 0, 421 RAW_POS_BUTT 422 } ISP_RAW_POS_E; 423 424 /* 425 * Defines the RAW stream Position from the ISP and whether the function of geting raw data is enable. 426 * Only used for Hi3559AV100 427 */ 428 typedef struct hiISP_RAW_POS { 429 ISP_RAW_POS_E enRawPos; 430 HI_BOOL bEnable; 431 } ISP_RAW_POS; 432 433 /* 434 * Defines the ISP FSWDR attributes in combination mode. 435 * 0 = Short exposure data is used when combining 436 * 1 = Long exposure data is used when combining 437 */ 438 typedef enum hiISP_COMBINE_MODE_E { 439 FS_WDR_COMBINE_SHORT_FIRST = 0, 440 FS_WDR_COMBINE_LONG_FIRST = 1, 441 FS_WDR_COMBINE_BUTT 442 } ISP_COMBINE_MODE_E; 443 444 /* 445 * Defines the ISP WDR merge mode. 446 * 0 = WDR mode is used 447 * 1 = Fusion mode is used 448 */ 449 typedef enum hiISP_WDR_MERGE_MODE_E { 450 MERGE_WDR_MODE = 0, 451 MERGE_FUSION_MODE = 1, 452 MERGE_BUTT 453 } ISP_WDR_MERGE_MODE_E; 454 455 /* 456 * 0 = The function of bnr is off 457 * 1 = The function of bnr is on 458 */ 459 typedef enum hiISP_BNR_MODE_E { 460 BNR_OFF_MODE = 0, 461 BNR_ON_MODE = 1, 462 BNR_BUTT 463 } ISP_BNR_MODE_E; 464 465 typedef enum hiISP_WDR_WBGAIN_POSITION_E { 466 WDR_WBGAIN_IN_DG1 = 0, 467 WDR_WBGAIN_IN_WB = 1, 468 WDR_WBGAIN_POSITION_BUTT 469 } ISP_WDR_WBGAIN_POSITION_E; 470 471 typedef struct hiISP_FSWDR_MANUAL_ATTR_S { 472 HI_U8 u8MdThrLowGain; 473 HI_U8 u8MdThrHigGain; 474 } ISP_FSWDR_MANUAL_ATTR_S; 475 476 typedef struct hiISP_FSWDR_AUTO_ATTR_S { 477 HI_U8 au8MdThrLowGain[ISP_AUTO_ISO_STRENGTH_NUM]; 478 HI_U8 au8MdThrHigGain[ISP_AUTO_ISO_STRENGTH_NUM]; 479 } ISP_FSWDR_AUTO_ATTR_S; 480 481 typedef struct hiISP_MDT_ATTR_S { 482 HI_BOOL bShortExpoChk; /* RW;Range:[0x0,0x1];Format:1.0; */ 483 HI_U16 u16ShortCheckThd; /* RW;Range:[0x0,0xFFF];Format:12.0 */ 484 HI_BOOL bMDRefFlicker; 485 HI_U8 u8MdtStillThd; /* RW;Range:[0x0,0xFE];Format:8.0 */ 486 HI_U8 u8MdtFullThd; /* RW;Range:[0x0,0xFE];Format:8.0,Only used for Hi3559AV100 */ 487 HI_U8 u8MdtLongBlend; /* RW;Range:[0x0,0xFE] */ 488 ISP_OP_TYPE_E enOpType; 489 ISP_FSWDR_MANUAL_ATTR_S stManual; 490 ISP_FSWDR_AUTO_ATTR_S stAuto; 491 } ISP_FSWDR_MDT_ATTR_S; 492 493 typedef struct hiISP_WDR_COMBINE_ATTR_S { 494 HI_BOOL bMotionComp; /* RW;Range:[0, 0x1];Format:1.0; enable/disable motion compensation */ 495 HI_U16 u16ShortThr; /* RW;Range:[0, 0xFFF];Format:12.0; Data above this threshold will be taken from 496 short exposure only. */ 497 HI_U16 u16LongThr; /* RW;Range:[0, 0xFFF];Format:12.0; limited range :[0, u16ShortThr], Data below this 498 threshold will be taken from long exposure only. */ 499 HI_BOOL bForceLong; /* RW;Range:[0, 1];Format:1.0; enable/disable Force Long, 500 Not support for Hi3559AV100 */ 501 HI_U16 u16ForceLongLowThr; /* RW;Range:[0, 0xFFF];Format:12.0; Data above this threshold will Force to choose 502 long frame only, Not support for Hi3559AV100 */ 503 HI_U16 u16ForceLongHigThr; /* RW;Range:[0, 0xFFF];Format:12.0; Data below this threshold will Force to choose 504 long frame only, Not support for Hi3559AV100 */ 505 ISP_FSWDR_MDT_ATTR_S stWDRMdt; 506 } ISP_WDR_COMBINE_ATTR_S; 507 508 typedef struct hiISP_FUSION_ATTR_S { 509 HI_U16 au16FusionThr[WDR_MAX_FRAME_NUM]; /* RW;Range:[0x0, 0x3FFF];Format:14.0;The threshold of the 4 frame */ 510 } ISP_FUSION_ATTR_S; 511 512 typedef struct hiISP_WDR_BNR_ATTR_S { 513 ISP_BNR_MODE_E enBnrMode; /* RW;Range:[0, 1];Format:1.0; enable/disable the bnr of wdr */ 514 HI_BOOL bShortFrameNR; /* RW;Range:[0, 1];Format:1.0; enable/disable the bnr of short frame; 515 Only used for Hi3519AV100 */ 516 HI_U8 u8ShortFrameNRStr; /* RW;Range:[0, 0x3F];Format:8.0;the Level 2 short frame sigma weight of G channel, 517 Only used for Hi3519AV100 */ 518 HI_U8 u8FusionBnrStr; /* RW;Range:[0,0x3F];Format:3.3,Only used for Hi3519AV100 */ 519 HI_U8 au8NoiseFloor[NOISESET_ELENUM]; /* RW;Range:[0x0, 0xFF];Format:8.0,Only used for Hi3559AV100/Hi3519AV100 */ 520 HI_U8 u8FullMdtSigGWgt; /* RW;Range:[0, 0x1F];Format:8.0,Only used for Hi3519AV100 */ 521 HI_U8 u8FullMdtSigRBWgt; /* RW;Range:[0, 0x1F];Format:8.0,Only used for Hi3519AV100 */ 522 HI_U8 u8FullMdtSigWgt; /* RW;Range:[0, 0x1F];Format:8.0,Only used for Hi3559AV100 */ 523 HI_U8 au8GsigmaGain[3]; /* RW;Range:[0, 0xFF];Format:8.0,Only used for Hi3559AV100/Hi3519AV100 */ 524 HI_U8 au8RBsigmaGain[3]; /* RW;Range:[0, 0xFF];Format:8.0,Only used for Hi3559AV100/Hi3519AV100 */ 525 } ISP_WDR_BNR_ATTR_S; 526 527 typedef struct hiISP_WDR_FS_ATTR_S { 528 ISP_WDR_MERGE_MODE_E enWDRMergeMode; 529 ISP_WDR_COMBINE_ATTR_S stWDRCombine; 530 ISP_WDR_BNR_ATTR_S stBnr; /* Only used for Hi3559AV100/Hi3519AV100 */ 531 ISP_FUSION_ATTR_S stFusion; 532 ISP_WDR_WBGAIN_POSITION_E enWDRWbgainPosition; /* RW; Range: [0x0, 0x1]; WDR Gain with or without WB Gain. 533 Only used for Hi3559AV100 */ 534 } ISP_WDR_FS_ATTR_S; 535 536 typedef struct hiISP_DRC_CUBIC_POINT_ATTR_S { 537 HI_U16 u16X; /* RW; Range:[0, 1000]; Format:10.0; x position of the characteristic point of the cubic curve; 538 Only used for Hi3559AV100 */ 539 HI_U16 u16Y; /* RW; Range:[0, 1000]; Format:10.0; y position of the characteristic point of the cubic curve; 540 Only used for Hi3559AV100 */ 541 HI_U16 u16Slope; /* RW; Range:[0, 10000]; Format:14.0; slope of the characteristic point of the cubic curve; 542 Only used for Hi3559AV100 */ 543 } ISP_DRC_CUBIC_POINT_ATTR_S; 544 545 typedef struct hiISP_DRC_ASYMMETRY_CURVE_ATTR_S { 546 HI_U8 u8Asymmetry; /* RW; Range:[0x1, 0x1E]; Format:5.0; The parameter0 of DRC asymmetry tone mapping curve */ 547 HI_U8 u8SecondPole; /* RW; Range:[0x96,0xD2]; Format:8.0; The parameter1 of DRC asymmetry tone mapping curve */ 548 HI_U8 u8Stretch; /* RW; Range:[0x1E,0x3C]; Format:6.0; The parameter2 of DRC asymmetry tone mapping curve */ 549 HI_U8 u8Compress; /* RW; Range:[0x64,0xC8]; Format:8.0; The parameter3 of DRC asymmetry tone mapping curve */ 550 } ISP_DRC_ASYMMETRY_CURVE_ATTR_S; 551 552 typedef struct hiISP_DRC_MANUAL_ATTR_S { 553 HI_U16 u16Strength; /* RW; Range:Hi3559AV100 = [0x0, 0xFF] | Hi3519AV100 = [0x0, 0x3FF] | 554 Hi3516CV500 = [0x0, 0x3FF] | Hi3516DV300 = [0x0, 0x3FF] | Hi3516AV300 = [0x0, 0x3FF] | 555 Hi3559V200 = [0x0, 0x3FF] | Hi3556V200 = [0x0, 0x3FF] | Hi3516EV200 = [0x0, 0x3FF] | 556 Hi3516EV300 = [0x0, 0x3FF] | Hi3518EV300 = [0x0, 0x3FF] | Hi3516DV200 = [0x0, 0x3FF]; 557 Strength of dynamic range compression. Higher values lead to higher differential gain 558 between shadows and highlights. */ 559 } ISP_DRC_MANUAL_ATTR_S; 560 561 typedef struct hiISP_DRC_AUTO_ATTR_S { 562 HI_U16 u16Strength; /* RW; Range:Hi3559AV100 = [0x0, 0xFF] | Hi3519AV100 = [0x0, 0x3FF] | 563 Hi3516CV500 = [0x0, 0x3FF]| Hi3516DV300 = [0x0, 0x3FF] |Hi3516AV300 = [0x0, 0x3FF] | 564 Hi3559V200 = [0x0, 0x3FF]| Hi3556V200 = [0x0, 0x3FF] | Hi3516EV200 = [0x0, 0x3FF] | 565 Hi3516EV300 = [0x0, 0x3FF]|Hi3518EV300 = [0x0, 0x3FF]|Hi3516DV200 = [0x0, 0x3FF]; 566 It is the base strength. The strength used in ISP is generated by firmware. 567 n linear mode, strength = f1(u16Strength, histogram) 568 In sensor WDR mode: strength = f2(u16Strength, histogram) 569 In 2to1 WDR mode: strength = f3(ExpRatio) */ 570 571 HI_U16 u16StrengthMax; /* RW; Range: Hi3559AV100 = [0x0, 0xFF] | Hi3519AV100 = [0x0, 0x3FF] | 572 Hi3516CV500 = [0x0, 0x3FF] | Hi3516DV300 = [0x0, 0x3FF] | Hi3516AV300 = [0x0, 0x3FF] | 573 Hi3559V200 = [0x0, 0x3FF] | Hi3556V200 = [0x0, 0x3FF] | Hi3516EV200 = [0x0, 0x3FF]| 574 Hi3516EV300 = [0x0, 0x3FF] | Hi3518EV300 = [0x0, 0x3FF]| Hi3516DV200 = [0x0, 0x3FF]; 575 Maximum DRC strength in Auto mode */ 576 HI_U16 u16StrengthMin; /* RW; Range: Hi3559AV100 = [0x0, 0xFF] | Hi3519AV100 = [0x0, 0x3FF] | 577 Hi3516CV500 = [0x0, 0x3FF] | Hi3516DV300 = [0x0, 0x3FF] | Hi3516AV300 = [0x0, 0x3FF] | 578 Hi3559V200 = [0x0, 0x3FF] | Hi3556V200 = [0x0, 0x3FF]| Hi3516EV200 = [0x0, 0x3FF] | 579 Hi3516EV300 = [0x0, 0x3FF]|Hi3518EV300 = [0x0, 0x3FF]|Hi3516DV200 = [0x0, 0x3FF]; 580 Minimum DRC strength in Auto mode */ 581 } ISP_DRC_AUTO_ATTR_S; 582 583 /* DRC curve type: 0 = Asymmetry curve, 1 = Cubic curve, 2 = User-defined curve */ 584 typedef enum hiISP_DRC_CURVE_SELECT_E { 585 DRC_CURVE_ASYMMETRY = 0x0, 586 DRC_CURVE_CUBIC, /* Only used for Hi3559AV100 */ 587 DRC_CURVE_USER, 588 DRC_CURVE_BUTT 589 } ISP_DRC_CURVE_SELECT_E; 590 591 typedef struct hiISP_DRC_ATTR_S { 592 HI_BOOL bEnable; 593 ISP_DRC_CURVE_SELECT_E enCurveSelect; /* RW; Range:[0x0, 0x2]; Select tone mapping curve type */ 594 595 HI_U8 u8PDStrength; /* RW; Range:[0x0, 0x80]; Format:8.0; Controls the purple detection strength, 596 Only used for Hi3559AV100/Hi3519AV100/Hi3516CV500/Hi3516DV300/Hi3516AV300/ 597 Hi3559V200/Hi3556V200 */ 598 HI_U8 u8LocalMixingBrightMax; /* RW; Range:[0x0, 0x80]; Format:8.0; 599 Maximum enhancement strength for positive detail */ 600 HI_U8 u8LocalMixingBrightMin; /* RW; Range:[0x0, 0x40]; Format:8.0; 601 Minimum enhancement strength for positive detail */ 602 HI_U8 u8LocalMixingBrightThr; /* RW; Range:[0x0, 0xFF]; Format:8.0; Luma threshold for enhancement strength 603 adaptation of positive detail */ 604 HI_S8 s8LocalMixingBrightSlo; /* RW; Range:[-7, 7]; Format:s4.0; Enhancement strength adaptation slope for 605 positive detail */ 606 HI_U8 u8LocalMixingDarkMax; /* RW; Range:[0x0, 0x80]; Format:8.0; 607 Maximum enhancement strength for negative detail */ 608 HI_U8 u8LocalMixingDarkMin; /* RW; Range:[0x0, 0x40]; Format:8.0; 609 Minimum enhancement strength for negative detail */ 610 HI_U8 u8LocalMixingDarkThr; /* RW; Range:[0x0, 0xFF]; Format:8.0; Luma threshold for enhancement strength 611 adaptation of negative detail */ 612 HI_S8 s8LocalMixingDarkSlo; /* RW; Range:[-7, 7]; Format:s4.0; Enhancement strength adaptation slope for 613 negative detail */ 614 HI_U8 u8DetailBrightStr; /* RW; Range:[0x0, 0x80]; Format:8.0; Controls the gain of the non-linear positive 615 detail enhancement; Only used for Hi3559AV100 */ 616 HI_U8 u8DetailDarkStr; /* RW; Range:[0x0, 0x80]; Format:8.0; Controls the gain of the non-linear negative 617 detail enhancement; Only used for Hi3559AV100 */ 618 HI_U8 u8DetailBrightStep; /* RW; Range:[0x0, 0x80]; Format:8.0; Controls the step of the non-linear positive 619 detail enhancement; Only used for Hi3559AV100 */ 620 HI_U8 u8DetailDarkStep; /* RW; Range:[0x0, 0x80]; Format:8.0; Controls the step of the non-linear negative 621 detail enhancement; Only used for Hi3559AV100 */ 622 623 HI_U8 u8BrightGainLmt; /* RW; Range:[0x0, 0xF]; Format:4.0; Bright area gain high limit */ 624 HI_U8 u8BrightGainLmtStep; /* RW; Range:[0x0, 0xF]; Format:4.0; Bright area gain high limit step */ 625 HI_U8 u8DarkGainLmtY; /* RW; Range:[0x0, 0x85]; Format:7.0; Dark area luma gain limit */ 626 HI_U8 u8DarkGainLmtC; /* RW; Range:[0x0, 0x85]; Format:7.0; Dark area chroma gain limit */ 627 HI_U16 au16ColorCorrectionLut[HI_ISP_DRC_CC_NODE_NUM]; /* RW; Range:[0x0, 0x400]; Format:4.12; 628 LUT of color correction coefficients */ 629 HI_U16 au16ToneMappingValue[HI_ISP_DRC_TM_NODE_NUM]; /* RW; Range:[0x0, 0xffff]; Format:16.0; 630 LUT of user-defined curve */ 631 632 HI_U8 u8FltScaleCoarse; /* RW; Range:[0x0, 0xF]; Format:4.0; Spatial filter scale coarse control; 633 Only used for Hi3559AV100 and Hi3519AV100 */ 634 HI_U8 u8FltScaleFine; /* RW; Range:[0x0, 0xF]; Format:4.0; Spatial filter scale fine control; 635 Only used for Hi3559AV100 and Hi3519AV100 */ 636 HI_U8 u8ContrastControl; /* RW; Range:[0x0, 0xF]; Format:4.0; Contrast control */ 637 HI_S8 s8DetailAdjustFactor; /* RW; Range:[-15, 15]; Format:4.0; Detail adjustment factor */ 638 639 HI_U8 u8SpatialFltCoef; /* RW; Range: Hi3559AV100 = [0x0, 0xA] | Hi3519AV100 = [0x0, 0x5] | 640 Hi3516CV500 = [0x0, 0x5] | Hi3516DV300 = [0x0, 0x5] | Hi3516AV300 = [0x0, 0x5] | 641 Hi3559V200 = [0x0, 0x5] | Hi3556V200 = [0x0, 0x5] | Hi3516EV200 = [0x0, 0x5] | 642 Hi3516EV300 = [0x0, 0x5] |Hi3518EV300 = [0x0, 0x5]|Hi3516DV200 = [0x0, 0x5]; 643 Spatial filter coefficients */ 644 HI_U8 u8RangeFltCoef; /* RW; Range:[0x0, 0xA]; Format:4.0; Range filter coefficients */ 645 HI_U8 u8RangeAdaMax; /* RW; Range:[0x0, 0x8]; Format:4.0; 646 Maximum range filter coefficient adaptation range */ 647 HI_U8 u8GradRevMax; /* RW; Range:[0x0, 0x40]; Format:7.0; Maximum gradient reversal reduction strength */ 648 HI_U8 u8GradRevThr; /* RW; Range:[0x0, 0x80]; Format:8.0; Gradient reversal reduction threshold */ 649 650 HI_U8 u8DpDetectRangeRatio; /* RW; Range:[0x0, 0x1F]; Format:5.0; DRC defect pixel detection control parameter; 651 Only used for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 652 HI_U8 u8DpDetectThrSlo; /* RW; Range:[0x0, 0x1F]; Format:5.0; DRC defect pixel detection control parameter; 653 Only used for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 654 HI_U16 u16DpDetectThrMin; /* RW; Range:[0x0, 0xFFFF]; Format:16.0; DRC defect pixel detection control parameter; 655 Only used for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 656 657 ISP_OP_TYPE_E enOpType; 658 ISP_DRC_MANUAL_ATTR_S stManual; 659 ISP_DRC_AUTO_ATTR_S stAuto; 660 ISP_DRC_CUBIC_POINT_ATTR_S astCubicPoint[HI_ISP_DRC_CUBIC_POINT_NUM]; /* Only used for Hi3559AV100 */ 661 ISP_DRC_ASYMMETRY_CURVE_ATTR_S stAsymmetryCurve; 662 } ISP_DRC_ATTR_S; 663 664 typedef struct hiISP_LDCI_GAUSS_COEF_ATTR_S { 665 HI_U8 u8Wgt; /* RW;Range:Hi3559AV100 = [0x0, 0x80] | Hi3519AV100 = [0x0, 0x80]| Hi3516CV500 = [0x0, 0xFF] | 666 Hi3516DV300 = [0x0, 0xFF]| Hi3516AV300 = [0x0, 0xFF]|Hi3559V200 = [0x0, 0xFF] | 667 Hi3556V200 = [0x0, 0xFF] | Hi3516EV200 = [0x0, 0xFF] | Hi3516EV300 = [0x0, 0xFF] | 668 Hi3518EV300 = [0x0, 0xFF]| Hi3516DV200 = [0x0, 0xFF]; 669 Format:1.7;Weight of Gaussian distribution */ 670 HI_U8 u8Sigma; /* RW;Range: [0x1, 0xFF];Format:0.8;Sigma of Gaussian distribution */ 671 HI_U8 u8Mean; /* RW;Range: [0x0, 0xFF];Format:0.8;Mean of Gaussian distribution */ 672 } ISP_LDCI_GAUSS_COEF_ATTR_S; 673 674 typedef struct hiISP_LDCI_HE_WGT_ATTR_S { 675 ISP_LDCI_GAUSS_COEF_ATTR_S stHePosWgt; 676 ISP_LDCI_GAUSS_COEF_ATTR_S stHeNegWgt; 677 } ISP_LDCI_HE_WGT_ATTR_S; 678 679 typedef struct hiISP_LDCI_MANUAL_ATTR_S { 680 ISP_LDCI_HE_WGT_ATTR_S stHeWgt; 681 HI_U16 u16BlcCtrl; /* RW;Range: [0x0, 0x1FF];Format:9.0;Restrain dark region */ 682 } ISP_LDCI_MANUAL_ATTR_S; 683 684 typedef struct hiISP_LDCI_AUTO_ATTR_S { 685 ISP_LDCI_HE_WGT_ATTR_S astHeWgt[ISP_AUTO_ISO_STRENGTH_NUM]; 686 HI_U16 au16BlcCtrl[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW;Range: [0x0, 0x1FF];Format:9.0; 687 auto mode, Restrain dark region */ 688 } ISP_LDCI_AUTO_ATTR_S; 689 690 typedef struct hiISP_LDCI_ATTR_S { 691 HI_BOOL bEnable; /* RW;Range:[0x0,0x1];Format:1.0; */ 692 HI_U8 u8GaussLPFSigma; /* RW;Range: [0x1, 0xFF];Format:0.8; 693 Coefficient of Gaussian low-pass filter */ 694 ISP_OP_TYPE_E enOpType; 695 ISP_LDCI_MANUAL_ATTR_S stManual; 696 ISP_LDCI_AUTO_ATTR_S stAuto; 697 HI_U16 u16TprIncrCoef; /* RW;Range: [0x0, 0x100];Format:0.9; 698 Increase Coefficient of temporal filter */ 699 HI_U16 u16TprDecrCoef; /* RW;Range: [0x0, 0x100];Format:0.9; 700 Decrease Coefficient of temporal filter */ 701 } ISP_LDCI_ATTR_S; 702 703 /* 704 defines CA type 705 0 = enable Ca module 706 1 = enable Cp module 707 */ 708 typedef enum hiISP_CA_TYPE_E { 709 ISP_CA_ENABLE = 0x0, 710 ISP_CP_ENABLE, 711 ISP_CA_BUTT 712 } ISP_CA_TYPE_E; 713 714 typedef struct hiISP_CA_LUT_S { 715 HI_U32 au32YRatioLut[HI_ISP_CA_YRATIO_LUT_LENGTH]; /* RW;Range:[0, 2047];Format:1.11 */ 716 HI_S32 as32ISORatio[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW;Range:[0, 2047];Format:1.10 */ 717 } ISP_CA_LUT_S; 718 719 /* Only used for Hi3559AV100/Hi3519AV100 */ 720 typedef struct hiISP_CP_LUT_S { 721 HI_U8 au8CPLutY[HI_ISP_CA_YRATIO_LUT_LENGTH]; /* RW;Range:[0, 255];Format:8.0; */ 722 HI_U8 au8CPLutU[HI_ISP_CA_YRATIO_LUT_LENGTH]; /* RW;Range:[0, 255];Format:8.0; */ 723 HI_U8 au8CPLutV[HI_ISP_CA_YRATIO_LUT_LENGTH]; /* RW;Range:[0, 255];Format:8.0; */ 724 } ISP_CP_LUT_S; 725 726 typedef struct hiISP_CA_ATTR_S { 727 HI_BOOL bEnable; /* RW;Range:[0x0,0x1];Format:1.0 */ 728 ISP_CA_TYPE_E eCaCpEn; /* Only used for Hi3559AV100/Hi3519AV100 */ 729 ISP_CA_LUT_S stCA; 730 ISP_CP_LUT_S stCP; /* Only used for Hi3559AV100/Hi3519AV100 */ 731 } ISP_CA_ATTR_S; 732 733 typedef struct hiCSC_MATRX_S { 734 HI_S16 as16CSCIdc[ISP_CSC_DC_NUM]; /* RW; Range:[-1024, 1023]; Format: 11.0; Input dc component for csc matrix */ 735 HI_S16 as16CSCOdc[ISP_CSC_DC_NUM]; /* RW; Range:[-1024, 1023]; Format: 11.0; Output dc component for csc matrix */ 736 HI_S16 as16CSCCoef[ISP_CSC_COEF_NUM]; /* RW; Range:[-4096, 4095]; Format: 5.10; 3x3 coefficients for csc matrix */ 737 } CSC_MATRX_S; 738 739 typedef struct hiISP_CSC_ATTR_S { 740 HI_BOOL bEnable; /* RW; Range:[0, 1];Format:1.0; Enable/Disable CSC Function */ 741 742 COLOR_GAMUT_E enColorGamut; /* RW; Range: [0, 3]; Color gamut type; COLOR_GAMUT_BT2020 only used for Hi3559AV100 */ 743 HI_U8 u8Hue; /* RW; Range:[0, 100];Format:8.0; Csc Hue Value */ 744 HI_U8 u8Luma; /* RW; Range:[0, 100];Format:8.0; Csc Luma Value */ 745 HI_U8 u8Contr; /* RW; Range:[0, 100];Format:8.0; Csc Contrast Value */ 746 HI_U8 u8Satu; /* RW; Range:[0, 100];Format:8.0; Csc Saturation Value */ 747 HI_BOOL bLimitedRangeEn; /* RW; Range: [0x0, 0x1]; Enable/Disable: 748 Enable Limited range output mode(default full range output) */ 749 HI_BOOL bExtCscEn; /* RW; Range: [0x0, 0x1]; Enable/Disable: Enable extended luma range */ 750 HI_BOOL bCtModeEn; /* RW; Range: [0x0, 0x1]; Enable/Disable: Enable ct mode */ 751 CSC_MATRX_S stCscMagtrx; /* RW; Color Space Conversion matrix */ 752 } ISP_CSC_ATTR_S; 753 754 typedef struct hiISP_CLUT_ATTR_S { 755 HI_BOOL bEnable; /* RW; Range:[0, 1];Format:1.0; Enable/Disable CLUT Function, 756 Not support for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 757 HI_U32 u32GainR; /* RW; Range:[0, 4095];Format:12.0; 758 Not support for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 759 HI_U32 u32GainG; /* RW; Range:[0, 4095];Format:12.0; 760 Not support for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 761 HI_U32 u32GainB; /* RW; Range:[0, 4095];Format:12.0; 762 Not support for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 763 } ISP_CLUT_ATTR_S; 764 765 typedef struct hiISP_CLUT_LUT_S { 766 HI_U32 au32lut[HI_ISP_CLUT_LUT_LENGTH]; /* RW; Range: Hi3559AV100 = [0, 4294967295] | 767 Hi3519AV100 = [0x0, 1073741823]| Hi3516CV500 = [0x0, 1073741823]| 768 Hi3516DV300 = [0x0, 1073741823] | Hi3516AV300 = [0x0, 1073741823] | 769 Hi3559V200 = [0x0, 1073741823]| Hi3556V200 = [0x0, 1073741823]; 770 Not support for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 771 } ISP_CLUT_LUT_S; 772 773 /* 774 Defines the type of static defect pixel calibration 775 0 = bright defect pixel calibration 776 1 = dark defect pixel calibration 777 */ 778 typedef enum hiISP_STATIC_DP_TYPE_E { 779 ISP_STATIC_DP_BRIGHT = 0x0, 780 ISP_STATIC_DP_DARK, 781 ISP_STATIC_DP_BUTT 782 } ISP_STATIC_DP_TYPE_E; 783 784 typedef struct hiISP_DP_STATIC_CALIBRATE_S { 785 HI_BOOL bEnableDetect; /* RW; Range: [0, 1];Format 1.0;Set 'HI_TRUE'to start static defect-pixel 786 calibration, and firmware will set 'HI_FALSE' when finished, 787 Not support for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 788 ISP_STATIC_DP_TYPE_E enStaticDPType; /* RW; Range: [0, 1];Format 1.0;Select static bright/dark defect-pixel 789 calibration,Not support for Hi3516EV200/Hi3516EV300/Hi3518EV300/ 790 Hi3516DV200 */ 791 HI_U8 u8StartThresh; /* RW; Range: [1, 255]; Format 8.0;Start threshold for static defect-pixel calibraiton, 792 Not support for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 793 HI_U16 u16CountMax; /* RW; Range:Hi3559AV100 = [0, 8192] | Hi3519AV100 = [0, 8192]| Hi3516CV500 = [0, 6144] | 794 Hi3516DV300 = [0, 6144] | Hi3516AV300 = [0, 6144] |Hi3559V200 = [0, 6144] | 795 Hi3556V200 = [0, 6144];Format 14.0; limited Range: [0, STATIC_DP_COUNT_NORMAL*BlkNum], 796 Limit of max number of static defect-pixel calibraiton. 797 Not support for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 798 HI_U16 u16CountMin; /* RW; Range:Hi3559AV100 = [0, 8192] | Hi3519AV100 = [0, 8192]| Hi3516CV500 = [0, 6144] | 799 Hi3516DV300 = [0, 6144]| Hi3516AV300 = [0, 6144]| Hi3559V200 = [0, 6144] | 800 Hi3556V200 = [0, 6144];Format 14.0; limited Range: [0, u16CountMax], 801 Limit of min number of static defect-pixel calibraiton. 802 Not support for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 803 HI_U16 u16TimeLimit; /* RW; Range: [0x0, 1600];Format 11.0;Time limit for static defect-pixel calibraiton, in 804 frame number,Not support for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 805 806 HI_U32 au32Table[STATIC_DP_COUNT_MAX]; /* R; Range: [0, 0x1FFF1FFF];Format 29.0; 807 Static defect-pixel calibraiton table, 808 0~12 bits represents the X coordinate of the defect pixel, 809 16~28 bits represent the Y coordinate of the defect pixel. 810 Not support for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 811 HI_U8 u8FinishThresh; /* R; Range: [0, 255];Format 8.0; Finish threshold for static defect-pixel calibraiton, 812 Not support for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 813 HI_U16 u16Count; /* R; Range:Hi3559AV100 = [0, 8192] | Hi3519AV100 = [0, 8192] Hi3516CV500 = [0, 6144]| 814 Hi3516DV300 = [0, 6144]| Hi3516AV300 = [0, 6144]| Hi3559V200 = [0, 6144] | 815 Hi3556V200 = [0, 6144];Format 14.0; Finish number for static defect-pixel calibraiton 816 Not support for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 817 ISP_STATUS_E enStatus; /* R; Range: [0, 2];Format 2.0;Status of static defect-pixel calibraiton, 818 Not support for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 819 } ISP_DP_STATIC_CALIBRATE_S; 820 821 typedef struct hiISP_DP_STATIC_ATTR_S { 822 HI_BOOL bEnable; /* RW; Range: [0, 1];Format 1.0;Enable/disable the static defect-pixel module, 823 Not support for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 824 HI_U16 u16BrightCount; /* RW; Range:Hi3559AV100 = [0, 8192] | Hi3519AV100 = [0, 8192]| Hi3516CV500 = [0, 6144]| 825 Hi3516DV300 = [0, 6144]| Hi3516AV300 = [0, 6144]| Hi3559V200 = [0, 6144] | 826 Hi3556V200 = [0, 6144];Format 14.0;limited Range: [0, STATIC_DP_COUNT_NORMAL*BlkNum], 827 When used as input(W), indicate the number of static bright defect pixels; 828 As output(R),indicate the number of static bright and dark defect pixels. 829 Not support for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 830 HI_U16 u16DarkCount; /* RW; Range:Hi3559AV100 = [0, 8192] | Hi3519AV100 = [0, 8192]| Hi3516CV500 = [0, 6144]| 831 Hi3516DV300 = [0, 6144]| Hi3516AV300 = [0, 6144]|Hi3559V200 = [0, 6144] | 832 Hi3556V200 = [0, 6144];Format 14.0;limited Range: [0, STATIC_DP_COUNT_NORMAL*BlkNum], 833 When used as input(W), indicate the number of static dark defect pixels; 834 As output(R), invalid value 0. 835 Not support for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 836 HI_U32 au32BrightTable[STATIC_DP_COUNT_MAX]; /* RW; Range: [0x0, 0x1FFF1FFF];Format 29.0; 837 0~12 bits represents the X coordinate of the defect pixel, 838 16~28 bits represent the Y coordinate of the defect pixel 839 Notice: When used as input(W), indicate static bright defect 840 pixels table; As output(R), indicate static bright and dark defect 841 pixels table. 842 Not support for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 843 844 HI_U32 au32DarkTable[STATIC_DP_COUNT_MAX]; /* RW; Range: [0x0, 0x1FFF1FFF];Format 29.0; 845 0~12 bits represents the X coordinate of the defect pixel, 846 16~28 bits represent the Y coordinate of the defect pixel 847 Notice: When used as input(W), indicate static dark defect pixels 848 table; As output(R), invalid value. 849 Not support for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 850 HI_BOOL bShow; /* RW; Range: [0, 1];Format 1.0;RW;highlight static defect pixel, 851 Not support for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 852 } ISP_DP_STATIC_ATTR_S; 853 854 typedef struct hiISP_DP_DYNAMIC_MANUAL_ATTR_S { 855 HI_U16 u16Strength; /* RW; Range: [0, 255];Format:8.0;Dynamic DPC strength. */ 856 HI_U16 u16BlendRatio; /* RW; Range: [0, 128];Format:9.0;Blending ratio required for DPC */ 857 } ISP_DP_DYNAMIC_MANUAL_ATTR_S; 858 859 typedef struct hiISP_DP_DYNAMIC_AUTO_ATTR_S { 860 HI_U16 au16Strength[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 255];Format:8.0;Dynamic DPC strength. */ 861 HI_U16 au16BlendRatio[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 128];Format:9.0; 862 Blending ratio required for DPC */ 863 } ISP_DP_DYNAMIC_AUTO_ATTR_S; 864 865 typedef struct hiISP_DP_DYNAMIC_ATTR_S { 866 HI_BOOL bEnable; /* RW; Range: [0, 1];Format 1.0;Enable/disable the dynamic defect-pixel module */ 867 HI_BOOL bSupTwinkleEn; /* RW; Range: [0, 1];Format 1.0;Enable/disable the twinkle suppression module */ 868 HI_S8 s8SoftThr; /* RW; Range: [0, 127];Format s8.0;twinkle suppression threshold */ 869 HI_U8 u8SoftSlope; /* RW; Range: [0, 255];Format 8.0;Correction controlling parameter of the pixels 870 whose deviation is smaller than s8SoftThr. */ 871 ISP_OP_TYPE_E enOpType; /* RW; Range: [0, 1];Format 1.0;Working mode of dynamic DPC */ 872 ISP_DP_DYNAMIC_MANUAL_ATTR_S stManual; 873 ISP_DP_DYNAMIC_AUTO_ATTR_S stAuto; 874 } ISP_DP_DYNAMIC_ATTR_S; 875 876 typedef struct hiISP_DIS_ATTR_S { 877 HI_BOOL bEnable; /* RW; Range: [0, 1];Format 1.0;Enable/disable dis module, 878 Not support for Hi3516CV500/Hi3516DV300/Hi3516AV300/Hi3559V200/Hi3556V200 */ 879 } ISP_DIS_ATTR_S; 880 881 typedef struct hiISP_SHADING_ATTR_S { 882 HI_BOOL bEnable; /* RW; Range:[0, 1];Format:1.0; HI_TRUE: enable lsc; HI_FALSE: disable lsc */ 883 HI_U16 u16MeshStr; /* RW; Range:Hi3559AV100=[0, 65535]| Hi3519AV100=[0, 65535]|Hi3516CV500=[0, 65535]| 884 Hi3516DV300=[0, 65535]|Hi3516AV300=[0, 65535]| Hi3559V200=[0, 65535]| 885 Hi3556V200=[0, 65535] | Hi3516EV200 = [0x0, 1023] | Hi3516EV300 = [0x0,1023] | 886 Hi3518EV300 = [0x0,1023] | Hi3516DV200 = [0x0,1023]; 887 The strength of the mesh shading correction */ 888 HI_U16 u16BlendRatio; /* RW; Range:[0, 256];Format:9.0; the blendratio of the two mesh gain lookup-table */ 889 } ISP_SHADING_ATTR_S; 890 891 typedef struct hiISP_SHADING_LUT_S { 892 HI_U16 au16RGain[HI_ISP_LSC_GRID_POINTS]; /* RW; Range:[0, 1023];Member used to store the calibration data of the 893 R channel required for LSC. */ 894 HI_U16 au16GrGain[HI_ISP_LSC_GRID_POINTS]; /* RW; Range:[0, 1023];Member used to store the calibration data of the 895 Gr channel required for LSC. */ 896 HI_U16 au16GbGain[HI_ISP_LSC_GRID_POINTS]; /* RW; Range:[0, 1023];Member used to store the calibration data of the 897 Gb channel required for LSC. */ 898 HI_U16 au16BGain[HI_ISP_LSC_GRID_POINTS]; /* RW; Range:[0, 1023];Member used to store the calibration data of the 899 B channel required for LSC. */ 900 } ISP_SHADING_GAIN_LUT_S; 901 902 typedef struct hiISP_BNR_LSC_GAIN_LUT_S { 903 HI_U16 au16RGain[HI_ISP_RLSC_POINTS]; /* RW; Range:[0, 65535];Member used to store the calibration data of the 904 R channel required for BNR_LSC. 905 Not support for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 906 HI_U16 au16GrGain[HI_ISP_RLSC_POINTS]; /* RW; Range:[0, 65535];Member used to store the calibration data of the 907 Gr channel required for BNR_LSC. 908 Not support for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 909 HI_U16 au16GbGain[HI_ISP_RLSC_POINTS]; /* RW; Range:[0, 65535];Member used to store the calibration data of the 910 Gb channel required for BNR_LSC. 911 Not support for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 912 HI_U16 au16BGain[HI_ISP_RLSC_POINTS]; /* RW; Range:[0, 65535];Member used to store the calibration data of the 913 B channel required for BNR_LSC. 914 Not support for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 915 } ISP_BNR_LSC_GAIN_LUT_S; 916 917 typedef struct hiISP_SHADING_LUT_ATTR_S { 918 HI_U8 u8MeshScale; /* RW; Range:[0, 7];Format:3.0;Three bit value that selects the scale and precision for 919 the 10 bit gain coefficients stored in mesh tables */ 920 HI_U16 au16XGridWidth[HI_ISP_MLSC_X_HALF_GRID_NUM]; /* RW; Range:Hi3559AV100=[4, 1988]| Hi3519AV100=[4, 1988]| 921 Hi3516CV500=[4, 1092]|Hi3516DV300=[4, 1092]| 922 Hi3516AV300=[4, 1092]|Hi3559V200=[4, 1092]| 923 Hi3556V200=[4, 1092] | Hi3516EV200 = [4,255]| 924 Hi3516EV300 = [4,255]|Hi3518EV300 = [4,255]| 925 Hi3516DV200 = [4,255]; limited Range:[4, u32Width/4 - 60], 926 Member used to store the width data of each GRID partition */ 927 HI_U16 au16YGridWidth[HI_ISP_MLSC_Y_HALF_GRID_NUM]; /* RW; Range:Hi3559AV100=[4, 1988]| Hi3519AV100=[4, 1988]| 928 Hi3516CV500=[4, 1092]|Hi3516DV300=[4, 1092]| 929 Hi3516AV300=[4, 1092]|Hi3559V200=[4, 1092]| 930 Hi3556V200=[4, 1092]|Hi3516EV200 = [4,255]| 931 Hi3516EV300 =[4,255]| Hi3518EV300 = [4,255 ]| 932 Hi3516DV200 = [4,255 ]; limited Range:[4, u32Height/4 - 60]; 933 Member used to store the height data of each GRID partition */ 934 ISP_SHADING_GAIN_LUT_S astLscGainLut[HI_ISP_MLSC_GAIN_LUT_NUM]; 935 ISP_BNR_LSC_GAIN_LUT_S stBNRLscGainLut; /* Not support for Hi3559AV100/Hi3519AV100/Hi3516EV200/Hi3516EV300 */ 936 } ISP_SHADING_LUT_ATTR_S; 937 938 typedef struct hiISP_MLSC_CALIBRATION_CFG_S { 939 ISP_BAYER_FORMAT_E enBayer; /* RW; Range: [0, 3];Format ENUM;Shows bayer pattern */ 940 ISP_BAYER_RAWBIT_E enRawBit; /* RW; Range: {8,10,12,14,16};Format ENUM;Shows input raw bitwidth */ 941 942 HI_U16 u16ImgHeight; /* RW; Range: [0, 65535];Format 16.0;Input raw image height */ 943 HI_U16 u16ImgWidth; /* RW; Range: [0, 65535];Format 16.0;Input raw image width */ 944 945 HI_U16 u16DstImgHeight; /* RW; Range: [0, 65535];Format 16.0;limited Range:[0, u16ImgHeight], Image height that 946 crop from input raw image, set to ImgHeight if don't need to crop */ 947 HI_U16 u16DstImgWidth; /* RW; Range: [0, 65535];Format 16.0;limited Range:[0, u16ImgWidth], Image width that 948 crop from input raw image, set to ImgWidth if don't need to crop */ 949 HI_U16 u16OffsetX; /* RW; Range: [0, 65535];Format 16.0;limited Range:[0, u16ImgWidth - u16DstImgWidth], 950 Horizontal offset that crop from input raw image, set to 0 if don't need to crop */ 951 HI_U16 u16OffsetY; /* RW; Range: [0, 65535];Format 16.0;limited Range:[0, u16ImgHeight - u16DstImgHeight], 952 Vertical offset that crop from input raw image, set to 0 if don't need to crop */ 953 954 HI_U32 u32MeshScale; /* RW; Range: [0, 7];Format 3.0; Shows Mesh Scale value */ 955 956 HI_U16 u16BLCOffsetR; /* RW; Range: [0, 4095];Format 12.0;BLC value for R channel */ 957 HI_U16 u16BLCOffsetGr; /* RW; Range: [0, 4095];Format 12.0;BLC value for Gr channel */ 958 HI_U16 u16BLCOffsetGb; /* RW; Range: [0, 4095];Format 12.0;BLC value for Gb channel */ 959 HI_U16 u16BLCOffsetB; /* RW; Range: [0, 4095];Format 12.0;BLC value for B channel */ 960 } ISP_MLSC_CALIBRATION_CFG_S; 961 962 typedef struct hiISP_MESH_SHADING_TABLE_S { 963 HI_U8 u8MeshScale; /* RW; Range:[0, 7];Format:3.0;Three bit value that selects the scale and precision for 964 the 10 bit gain coefficients stored in mesh tables */ 965 HI_U16 au16XGridWidth[HI_ISP_MLSC_X_HALF_GRID_NUM]; /* RW; Range:Hi3559AV100=[4, 16323]| Hi3519AV100=[4, 16323]| 966 Hi3516CV500=[4, 16323]|Hi3516DV300=[4, 16323]| 967 Hi3516AV300=[4, 16323] | Hi3559V200=[4, 16323]| 968 Hi3556V200=[4, 16323]|Hi3516EV200 = [4,255]| 969 Hi3516EV300 =[4,255]| Hi3518EV300 = [4,255 ]| 970 Hi3516DV200 = [4,255 ]; limited Range:[4, u16ImgWidth /4 - 60], 971 Member used to store the width data of each GRID partition */ 972 HI_U16 au16YGridWidth[HI_ISP_MLSC_Y_HALF_GRID_NUM]; /* RW; Hi3559AV100=[4, 16323]| Hi3519AV100=[4, 16323]| 973 Hi3516CV500=[4, 16323]|Hi3516DV300=[4, 16323]| 974 Hi3516AV300=[4, 16323]| Hi3559V200=[4, 16323] | 975 Hi3556V200=[4, 16323]|Hi3516EV200 = [4,255]| 976 Hi3516EV300 =[4,255]| Hi3518EV300 = [4,255 ]| 977 Hi3516DV200 = [4,255 ]; limited Range:[4, u16ImgHeight /4 - 60], 978 Member used to store the height data of each GRID partition */ 979 ISP_SHADING_GAIN_LUT_S stLscGainLut; 980 ISP_BNR_LSC_GAIN_LUT_S stBNRLscGainLut; /* Not support for Hi3559AV100/Hi3519AV100/ 981 Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 982 } ISP_MESH_SHADING_TABLE_S; 983 984 /* Only used for Hi3559AV100/Hi3519AV100 */ 985 typedef struct hiISP_RADIAL_SHADING_ATTR_S { 986 HI_BOOL bEnable; /* RW; Range:[0, 1];Format:1.0; enable/disable rlsc */ 987 HI_U16 u16RadialStr; /* RW; Range:[0, 65535];Format:4.12; the strength of the mesh shading correctio */ 988 } ISP_RADIAL_SHADING_ATTR_S; 989 990 /* Only used for Hi3559AV100/Hi3519AV100 */ 991 typedef struct hiISP_RADIAL_SHADING_LUT_S { 992 HI_U16 au16RGain[HI_ISP_RLSC_POINTS]; /* RW; Range:[0, 65535];Member used to store the calibration data of the 993 R channel required for RLSC.Only used for Hi3559AV100/Hi3519AV100 */ 994 HI_U16 au16GrGain[HI_ISP_RLSC_POINTS]; /* RW; Range:[0, 65535];Member used to store the calibration data of the 995 Gr channel required for RLSC.Only used for Hi3559AV100/Hi3519AV100 */ 996 HI_U16 au16GbGain[HI_ISP_RLSC_POINTS]; /* RW; Range:[0, 65535];Member used to store the calibration data of the 997 Gb channel required for RLSC.Only used for Hi3559AV100/Hi3519AV100 */ 998 HI_U16 au16BGain[HI_ISP_RLSC_POINTS]; /* RW; Range:[0, 65535];Member used to store the calibration data of the 999 B channel required for RLSC.Only used for Hi3559AV100/Hi3519AV100 */ 1000 } ISP_RADIAL_SHADING_GAIN_LUT_S; 1001 1002 /* Only used for Hi3559AV100/Hi3519AV100 */ 1003 typedef struct hiISP_RADIAL_SHADING_LUT_ATTR_S { 1004 OPERATION_MODE_E enLightMode; /* RW; Range:[0, 1];Format:1.0; 1: manual mode; 0: auto mode */ 1005 HI_U16 u16BlendRatio; /* RW; Range:[0, 256];Format:8.0; Used in manual mode only, indicates the light 1006 blending strength for the first light info */ 1007 HI_U8 u8LightType1; /* RW; Range:[0, 2];Format:2.0; Used in manual mode only, indicates the first light 1008 source selected */ 1009 HI_U8 u8LightType2; /* RW; Range:[0, 2];Format:2.0; Used in manual mode only, indicates the second light 1010 source selected */ 1011 HI_U8 u8RadialScale; /* RW; Range:[0, 13];Format:4.0;Four bit value that selects the scale and precision 1012 for the 10 bit gain coefficients */ 1013 HI_U16 u16CenterRX; /* RW; Range:[0, 65535];Format:16.0;Limited Range:[0, Width - 1], shows x value of the 1014 position of optical center of red channel */ 1015 HI_U16 u16CenterRY; /* RW; Range:[0, 65535];Format:16.0;Limited Range:[0, Height - 1], shows y value of the 1016 position of optical center of red channel */ 1017 HI_U16 u16CenterGrX; /* RW; Range:[0, 65535];Format:16.0;Limited Range:[0, Width - 1], shows x value of the 1018 position of optical center of gr channel */ 1019 HI_U16 u16CenterGrY; /* RW; Range:[0, 65535];Format:16.0;Limited Range:[0, Height - 1], shows y value of the 1020 position of optical center of gr channel */ 1021 HI_U16 u16CenterGbX; /* RW; Range:[0, 65535];Format:16.0;Limited Range:[0, Width - 1], shows x value of the 1022 position of optical center of gb channel */ 1023 HI_U16 u16CenterGbY; /* RW; Range:[0, 65535];Format:16.0;Limited Range:[0, Height - 1], shows y value of the 1024 position of optical center of gb channel */ 1025 HI_U16 u16CenterBX; /* RW; Range:[0, 65535];Format:16.0;Limited Range:[0, Width - 1], shows x value of the 1026 position of optical center of blue channel */ 1027 HI_U16 u16CenterBY; /* RW; Range:[0, 65535];Format:16.0;Limited Range:[0, Height - 1], shows y value of the 1028 position of optical center of blue channel */ 1029 HI_U16 u16OffCenterR; /* RW; Range:[0, 65535];Format:16.0;related to the 1/R^2 value of red channel */ 1030 HI_U16 u16OffCenterGr; /* RW; Range:[0, 65535];Format:16.0;related to the 1/R^2 value of gr channel */ 1031 HI_U16 u16OffCenterGb; /* RW; Range:[0, 65535];Format:16.0;related to the 1/R^2 value of gb channel */ 1032 HI_U16 u16OffCenterB; /* RW; Range:[0, 65535];Format:16.0;related to the 1/R^2 value of blue channel */ 1033 ISP_RADIAL_SHADING_GAIN_LUT_S astRLscGainLut[HI_ISP_RLSC_GAIN_LUT_NUM]; 1034 } ISP_RADIAL_SHADING_LUT_ATTR_S; 1035 1036 typedef struct hiISP_RLSC_CALIBRATION_CFG_S { 1037 ISP_BAYER_FORMAT_E enBayer; /* RW; Range: [0, 3];Format ENUM;Shows bayer pattern */ 1038 ISP_BAYER_RAWBIT_E enRawBit; /* RW; Range: {8,10,12,14,16};Format ENUM;Shows input raw bitwidth */ 1039 1040 HI_U16 u16ImgHeight; /* RW; Range: [0, 65535];Format 16.0;Input raw image height */ 1041 HI_U16 u16ImgWidth; /* RW; Range: [0, 65535];Format 16.0;Input raw image width */ 1042 1043 HI_U16 u16CenterX; /* RW; Range: [0, 65535];Format 16.0;limited Range:[0, u16ImgWidth - u16DstImgWidth], 1044 Horizontal offset that crop from input raw image, set to 0 if don't need to crop */ 1045 HI_U16 u16CenterY; /* RW; Range: [0, 65535];Format 16.0;limited Range:[0, u16ImgHeight - u16DstImgHeight], 1046 Vertical offset that crop from input raw image, set to 0 if don't need to crop */ 1047 HI_U16 u16Radius; /* RW; Range: [0, 65535];Format 16.0; radius of the area need to calibrate */ 1048 1049 HI_U16 u16RadialScale; /* RW; Range: [0, 7];Format 3.0; Shows Mesh Scale value */ 1050 1051 HI_U16 u16BlcOffsetR; /* RW; Range: [0, 4095];Format 12.0;BLC value for R channel */ 1052 HI_U16 u16BlcOffsetGr; /* RW; Range: [0, 4095];Format 12.0;BLC value for Gr channel */ 1053 HI_U16 u16BlcOffsetGb; /* RW; Range: [0, 4095];Format 12.0;BLC value for Gb channel */ 1054 HI_U16 u16BlcOffsetB; /* RW; Range: [0, 4095];Format 12.0;BLC value for B channel */ 1055 } ISP_RLSC_CALIBRATION_CFG_S; 1056 1057 typedef struct hiISP_RADIAL_SHADING_TABLE_S { 1058 HI_U8 u16RadialScale; /* RW; Range:[0, 13];Format:4.0;Four bit value that selects the scale and precision 1059 for the 10 bit gain coefficients */ 1060 HI_U16 u16CenterX; /* RW; Range:[0, 65535];Format:16.0;Limited Range:[0, Width - 1], shows x value of the position 1061 of optical center */ 1062 HI_U16 u16CenterY; /* RW; Range:[0, 65535];Format:16.0;Limited Range:[0, Height - 1], shows y value of the position 1063 of optical center */ 1064 HI_U16 u16OffCenter; /* RW; Range:[0, 65535];Format:16.0;related to the 1/R^2 value of all channel */ 1065 ISP_RADIAL_SHADING_GAIN_LUT_S stRlscGainLut; /* Only used for Hi3559AV100/Hi3519AV100 */ 1066 } ISP_RADIAL_SHADING_TABLE_S; 1067 1068 typedef struct { 1069 HI_BOOL bEnable; /* RW; Range:[0, 1];Format:1.0;Acs Enable. */ 1070 HI_U16 u16YStrength; /* RW; Range:[0, 256];Format:8.0;Acs correction strength for y shading. */ 1071 HI_U16 u16RunInterval; /* RW; Range:[1, 255];Format:16.0;Acs Run Interval. */ 1072 HI_BOOL bLockEnable; /* RW; Range:[0, 1];Format:1.0;Lock Gain Lut Enable. */ 1073 } ISP_ACS_ATTR_S; 1074 1075 typedef struct hiISP_NR_MANUAL_ATTR_S { 1076 HI_U8 au8ChromaStr[ISP_BAYER_CHN_NUM]; /* RW;Range:[0, 3];Format:2.0; 1077 Strength of Chrmoa noise reduction for R/Gr/Gb/B channel, 1078 Not support for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 1079 HI_U8 u8FineStr; /* RW;Range:[0, 0x80];Format:8.0;Strength of Luma noise reduction */ 1080 HI_U16 u16CoringWgt; /* RW;Range:[0, 0xc80];Format:12.0;Strength of reserving the random noise */ 1081 HI_U16 au16CoarseStr[ISP_BAYER_CHN_NUM]; /* RW;Range:[0,0x360];Format:10.0;Coarse Strength of noise reduction */ 1082 } ISP_NR_MANUAL_ATTR_S; 1083 1084 typedef struct hiISP_NR_AUTO_ATTR_S { 1085 HI_U8 au8ChromaStr[ISP_BAYER_CHN_NUM][ISP_AUTO_ISO_STRENGTH_NUM]; /* RW;Range:[0, 3];Format:2.0; 1086 Strength of chrmoa noise reduction for 1087 R/Gr/Gb/B channel, 1088 Not support for Hi3516EV200/Hi3516EV300/ 1089 Hi3518EV300/Hi3516DV200 */ 1090 HI_U8 au8FineStr[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW;Range:[0, 0x80];Format:8.0; 1091 Strength of luma noise reduction */ 1092 HI_U16 au16CoringWgt[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW;Range:[0, 0xc80];Format:12.0; 1093 Strength of reserving the random noise */ 1094 HI_U16 au16CoarseStr[ISP_BAYER_CHN_NUM][ISP_AUTO_ISO_STRENGTH_NUM]; /* RW;Range:[0, 0x360];Format:10.0; 1095 Coarse Strength of noise reduction */ 1096 } ISP_NR_AUTO_ATTR_S; 1097 1098 typedef struct hiISP_NR_WDR_ATTR_S { 1099 HI_U8 au8WDRFrameStr[WDR_MAX_FRAME_NUM]; /* RW;Range:[0, 0x50];Format:7.0;Strength of each frame in wdr mode */ 1100 HI_U8 au8FusionFrameStr[WDR_MAX_FRAME_NUM]; /* RW;Range:[0, 0x50];Format:7.0;Strength of each frame in wdr mode. 1101 Only used for Hi3516CV500/Hi3516DV300/Hi3516AV300/Hi3559V200/ 1102 Hi3556V200/Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 1103 } ISP_NR_WDR_ATTR_S; 1104 1105 typedef struct hiISP_NR_ATTR_S { 1106 HI_BOOL bEnable; /* RW;Range:[0, 0x1];Format:1.0; Nr Enable */ 1107 HI_BOOL bLowPowerEnable; /* RW;Range:[0, 0x1];Format:1.0; Nr Low Power Enable. 1108 Not support for Hi3516CV500/Hi3516DV300/Hi3516AV300/Hi3559V200/Hi3556V200/ 1109 Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 1110 HI_BOOL bNrLscEnable; /* RW;Range:[0, 1];Format:1.0; 1111 HI_TRUE: Noise reduction refers to lens shading; 1112 HI_FALSE: Noise reduction not refers to lens shading; */ 1113 HI_U8 u8NrLscRatio; /* RW;Range:[0, 0xff];Format:8.0; Ratio of referring to lens shading. 1114 Not support for Hi3516CV500/Hi3516DV300/Hi3516AV300/Hi3559V200/Hi3556V200/ 1115 Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 1116 HI_U8 u8BnrLscMaxGain; /* RW;Range:[0, 0xbf];Format:2.6; Max gain for referring to lens shading. 1117 Only used for Hi3516CV500/Hi3516DV300/Hi3516AV300/Hi3559V200/Hi3556V200/ 1118 Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 1119 HI_U16 u16BnrLscCmpStrength; /* RW;Range:[0, 0x100];Format:1.8; Compare strength for referring to lens shading. 1120 Only used for Hi3516CV500/Hi3516DV300/Hi3516AV300/Hi3559V200/Hi3556V200/ 1121 Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 1122 HI_U16 au16CoringRatio[HI_ISP_BAYERNR_LUT_LENGTH]; /* RW;Range:[0x0, 0x3ff];Format:12.0; 1123 Strength of reserving the random noise according to luma */ 1124 1125 ISP_OP_TYPE_E enOpType; 1126 ISP_NR_AUTO_ATTR_S stAuto; 1127 ISP_NR_MANUAL_ATTR_S stManual; 1128 ISP_NR_WDR_ATTR_S stWdr; 1129 } ISP_NR_ATTR_S; 1130 1131 /* Only used for Hi3516CV500/Hi3516DV300/Hi3516AV300/Hi3559V200/Hi3556V200/ 1132 Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 1133 typedef struct hiISP_DE_MANUAL_ATTR_S { 1134 HI_U16 u16GlobalGain; /* RW;Range:[0x0,0x100];Format:1.8 */ 1135 HI_U16 u16GainLF; /* RW;Range:[0x0,0x20];Format:2.4 */ 1136 HI_U16 u16GainHF; /* RW;Range:[0x0,0x20];Format:2.4 */ 1137 } ISP_DE_MANUAL_ATTR_S; 1138 1139 /* Only used for Hi3516CV500/Hi3516DV300/Hi3516AV300/Hi3559V200/Hi3556V200 */ 1140 typedef struct hiISP_DE_AUTO_ATTR_S { 1141 HI_U16 au16GlobalGain[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW;Range:[0x0,0x100];Format:1.8 */ 1142 HI_U16 au16GainLF[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW;Range:[0x0,0x20];Format:2.4 */ 1143 HI_U16 au16GainHF[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW;Range:[0x0,0x20];Format:2.4 */ 1144 } ISP_DE_AUTO_ATTR_S; 1145 1146 /* Only used for Hi3516CV500/Hi3516DV300/Hi3516AV300/Hi3559V200/Hi3556V200 */ 1147 typedef struct hiISP_DE_ATTR_S { 1148 HI_BOOL bEnable; /* RW;Range:[0x0,0x1];Format:1.0; De Enable */ 1149 HI_U16 au16LumaGainLut[HI_ISP_DE_LUMA_GAIN_LUT_N]; /* RW;Range:[0x0,0x100];Format:1.8 */ 1150 1151 ISP_OP_TYPE_E enOpType; 1152 ISP_DE_AUTO_ATTR_S stAuto; 1153 ISP_DE_MANUAL_ATTR_S stManual; 1154 } ISP_DE_ATTR_S; 1155 1156 #define ISP_CVTMAT_NUM 12 1157 #define ISP_EXP_CTRL_NUM 2 1158 1159 /* Only support Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 1160 typedef enum hiISP_IRBAYER_FORMAT_E { 1161 IRBAYER_GRGBI = 0, 1162 IRBAYER_RGBGI = 1, 1163 IRBAYER_GBGRI = 2, 1164 IRBAYER_BGRGI = 3, 1165 IRBAYER_IGRGB = 4, 1166 IRBAYER_IRGBG = 5, 1167 IRBAYER_IBGRG = 6, 1168 IRBAYER_IGBGR = 7, 1169 IRBAYER_BUTT 1170 } ISP_IRBAYER_FORMAT_E; 1171 1172 /* Only support Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 1173 typedef enum hiISP_IR_CVTMAT_MODE_E { 1174 ISP_IR_CVTMAT_MODE_NORMAL = 0, 1175 ISP_IR_CVTMAT_MODE_MONO, 1176 ISP_IR_CVTMAT_MODE_USER, 1177 ISP_IR_CVTMAT_MODE_BUTT 1178 } ISP_IR_CVTMAT_MODE_E; 1179 1180 /* Only support Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 1181 typedef struct hiISP_RGBIR_ATTR_S { 1182 HI_BOOL bEnable; /* RW;Range:[0x0, 0x1];Format:1.0; Enable/Disable RGBIR module */ 1183 ISP_IRBAYER_FORMAT_E enInPattern; /* RW;Range:[0x0, 0x7];Format:3.0; IR pattern of the input signal */ 1184 ISP_BAYER_FORMAT_E enOutPattern; /* RW;Range:[0x0, 0x3];Format:2.0; Bayer pattern of the output signal */ 1185 1186 HI_U16 au16ExpCtrl[ISP_EXP_CTRL_NUM]; /* RW;Range:[0, 2047];Format:11.0; 1187 Over expose control parameter */ 1188 HI_U16 au16Gain[ISP_EXP_CTRL_NUM]; /* RW;Range:[0, 511];Format:9.0; 1189 Over expose control parameter */ 1190 1191 ISP_IR_CVTMAT_MODE_E enIRCvtMatMode; 1192 HI_S16 as16CvtMatrix[ISP_CVTMAT_NUM]; /* RW;Range:[-32768, 32767];Format:s15.0; RGBIR to Bayer image 1193 Convert matrix coefficients(need calibration) */ 1194 } ISP_RGBIR_ATTR_S; 1195 1196 /* 1197 Defines the type of the ISP gamma curve 1198 0 = Default curve 1199 1 = Default BT.709 curve (Gamma Curve) 1200 2 = Default SMPTE.2084 curve (PQ Curve), Only used for Hi3559AV100 1201 3 = User defined Gamma curve, LUT must be correct 1202 */ 1203 typedef enum hiISP_GAMMA_CURVE_TYPE_E { 1204 ISP_GAMMA_CURVE_DEFAULT = 0x0, 1205 ISP_GAMMA_CURVE_SRGB, 1206 ISP_GAMMA_CURVE_HDR, /* Only used for Hi3559AV100 */ 1207 ISP_GAMMA_CURVE_USER_DEFINE, 1208 ISP_GAMMA_CURVE_BUTT 1209 } ISP_GAMMA_CURVE_TYPE_E; 1210 typedef struct hiISP_GAMMA_ATTR_S { 1211 HI_BOOL bEnable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable Gamma Function */ 1212 HI_U16 u16Table[GAMMA_NODE_NUM]; /* RW; Range:[0, 4095]; Format:12.0;Gamma LUT nodes value */ 1213 1214 ISP_GAMMA_CURVE_TYPE_E enCurveType; /* RW; Range:[0, 3]; Format:2.0;Gamma curve type */ 1215 } ISP_GAMMA_ATTR_S; 1216 1217 typedef struct hiISP_PREGAMMA_ATTR_S { 1218 HI_BOOL bEnable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable PreGamma Function */ 1219 HI_U32 au32Table[PREGAMMA_NODE_NUM]; /* RW; Range:Hi3559AV100 = [0, 0x100000] | Hi3519AV100 = [0, 0x100000] | 1220 Hi3516CV500 = [0, 0xFFFFF] |Hi3516DV300 = [0, 0xFFFFF] | 1221 Hi3516AV300 = [0, 0xFFFFF] |Hi3559V200 = [0, 0xFFFFF] | 1222 Hi3556V200 = [0, 0xFFFFF] | Hi3516EV200 = [0x0, 0xFFFFF]| 1223 Hi3516EV300 = [0x0, 0xFFFFF]|Hi3518EV300 = [0x0,0xFFFFF]| 1224 Hi3516DV200 = [0x0,0xFFFFF]; Format:21.0;PreGamma LUT nodes value */ 1225 } ISP_PREGAMMA_ATTR_S; 1226 1227 typedef struct hiISP_PRELOGLUT_ATTR_S { 1228 HI_BOOL bEnable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable PreLogLUT Function. 1229 Not support for Hi3516CV500/Hi3516DV300/Hi3516AV300/Hi3559V200/Hi3556V200 */ 1230 } ISP_PRELOGLUT_ATTR_S; 1231 1232 typedef struct hiISP_LOGLUT_ATTR_S { 1233 HI_BOOL bEnable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable LogLUT Function. 1234 Not support for Hi3516CV500/Hi3516DV300/Hi3516AV300/Hi3559V200/Hi3556V200 */ 1235 } ISP_LOGLUT_ATTR_S; 1236 1237 #define ISP_SHARPEN_FREQ_CORING_LENGTH 8 1238 #define SHRP_GAIN_LUT_SIZE 64 1239 1240 typedef struct hiISP_SHARPEN_MANUAL_ATTR_S { 1241 HI_U8 au8LumaWgt[ISP_SHARPEN_LUMA_NUM]; /* RW; Range: Hi3559AV100 =[0, 127]|Hi3519AV100=[0, 127]| 1242 Hi3516CV500 = [0, 127]|Hi3516DV300 =[0, 127]| Hi3516AV300 =[0, 127]| 1243 Hi3559V200 = [0, 127]| Hi3556V200 =[0, 127]| Hi3516EV200 = [0x0, 31]| 1244 Hi3516EV300 = [0x0, 31]|Hi3518EV300 = [0x0, 31]|Hi3516DV200 = [0x0, 31]; 1245 Format:0.7;Adjust the sharpen strength according to luma. 1246 Sharpen strength will be weaker when it decrease. */ 1247 HI_U16 au16TextureStr[ISP_SHARPEN_GAIN_NUM]; /* RW; Range: [0, 4095]; Format:7.5; 1248 Undirectional sharpen strength for texture and detail enhancement */ 1249 HI_U16 au16EdgeStr[ISP_SHARPEN_GAIN_NUM]; /* RW; Range: [0, 4095]; Format:7.5; 1250 Directional sharpen strength for edge enhancement */ 1251 HI_U16 u16TextureFreq; /* RW; Range: [0, 4095];Format:6.6; Texture frequency adjustment. 1252 Texture and detail will be finer when it increase */ 1253 HI_U16 u16EdgeFreq; /* RW; Range: [0, 4095];Format:6.6; Edge frequency adjustment. 1254 Edge will be narrower and thiner when it increase */ 1255 HI_U8 u8OverShoot; /* RW; Range: [0, 127]; Format:7.0;u8OvershootAmt */ 1256 HI_U8 u8UnderShoot; /* RW; Range: [0, 127]; Format:7.0;u8UndershootAmt */ 1257 HI_U8 u8ShootSupStr; /* RW; Range: [0, 255]; Format:8.0;overshoot and undershoot suppression strength, 1258 the amplitude and width of shoot will be decrease when shootSupSt increase */ 1259 HI_U8 u8ShootSupAdj; /* RW; Range: [0, 15]; Format:4.0;overshoot and undershoot suppression adjusting, 1260 adjust the edge shoot suppression strength */ 1261 HI_U8 u8DetailCtrl; /* RW; Range: [0, 255]; Format:8.0;Different sharpen strength for detail and edge. 1262 When it is bigger than 128, detail sharpen strength will be stronger than edge */ 1263 HI_U8 u8DetailCtrlThr; /* RW; Range: [0, 255]; Format:8.0; The threshold of DetailCtrl, it is used to 1264 distinguish detail and edge. */ 1265 HI_U8 u8EdgeFiltStr; /* RW; Range: [0, 63]; Format:6.0;The strength of edge filtering. */ 1266 HI_U8 u8EdgeFiltMaxCap; /* RW; Range: [0, 47]; Format:6.0;The max capacity of edge filtering. */ 1267 HI_U8 u8RGain; /* RW; Range: [0, 31]; Format:5.0;Sharpen Gain for Red Area */ 1268 HI_U8 u8GGain; /* RW; Range: [0, 255]; Format:8.0; Sharpen Gain for Green Area */ 1269 HI_U8 u8BGain; /* RW; Range: [0, 31]; Format:5.0;Sharpen Gain for Blue Area */ 1270 HI_U8 u8SkinGain; /* RW; Range: [0, 31]; Format:5.0;Sharpen Gain for Skin Area */ 1271 HI_U16 u16MaxSharpGain; /* RW; Range: [0, 0x7FF]; Format:8.3; Maximum sharpen gain */ 1272 HI_U8 u8WeakDetailGain; /* RW; Range: [0, 127]; 1273 Only support for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200; 1274 sharpen Gain for weakdetail */ 1275 } ISP_SHARPEN_MANUAL_ATTR_S; 1276 1277 typedef struct hiISP_SHARPEN_AUTO_ATTR_S { 1278 HI_U8 au8LumaWgt[ISP_SHARPEN_LUMA_NUM][ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range:Hi3559AV100 =[0, 127]| 1279 Hi3519AV100=[0, 127]|Hi3516CV500 = [0, 127]| 1280 Hi3516DV300 =[0, 127]| Hi3516AV300 =[0, 127]| 1281 Hi3559V200 = [0, 127] |Hi3556V200 = [0, 127]| 1282 Hi3556V200 =[0, 127]| Hi3516EV200 = [0x0, 31]| 1283 Hi3516EV300 = [0, 31]|Hi3518EV300 = [0x0, 31]| 1284 Hi3516DV200 = [0x0, 31] 1285 Format:0.7; Adjust the sharpen strength 1286 according to luma. Sharpen strength will be 1287 weaker when it decrease. */ 1288 HI_U16 au16TextureStr[ISP_SHARPEN_GAIN_NUM][ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 4095]; Format:7.5; 1289 Undirectional sharpen strength for 1290 texture and detail enhancement */ 1291 HI_U16 au16EdgeStr[ISP_SHARPEN_GAIN_NUM][ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 4095]; Format:7.5; 1292 Directional sharpen strength for edge 1293 enhancement */ 1294 HI_U16 au16TextureFreq[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 4095]; Format:6.6;Texture frequency 1295 adjustment. Texture and detail will be finer 1296 when it increase */ 1297 HI_U16 au16EdgeFreq[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 4095]; Format:6.6;Edge frequency adjustment. 1298 Edge will be narrower and thiner when it increase */ 1299 HI_U8 au8OverShoot[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 127]; Format:7.0;u8OvershootAmt */ 1300 HI_U8 au8UnderShoot[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 127]; Format:7.0;u8UndershootAmt */ 1301 HI_U8 au8ShootSupStr[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 255]; Format:8.0;overshoot and undershoot 1302 suppression strength, the amplitude and width of shoot will 1303 be decrease when shootSupSt increase */ 1304 HI_U8 au8ShootSupAdj[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 15]; Format:4.0;overshoot and undershoot 1305 suppression adjusting, adjust the edge shoot suppression 1306 strength */ 1307 HI_U8 au8DetailCtrl[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 255]; Format:8.0;Different sharpen strength 1308 for detail and edge. When it is bigger than 128, detail 1309 sharpen strength will be stronger than edge. */ 1310 HI_U8 au8DetailCtrlThr[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 255]; Format:8.0; 1311 The threshold of DetailCtrl, it is used to distinguish 1312 detail and edge. */ 1313 HI_U8 au8EdgeFiltStr[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 63]; Format:6.0; 1314 The strength of edge filtering. */ 1315 HI_U8 au8EdgeFiltMaxCap[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 47]; Format:6.0; 1316 The max capacity of edge filtering. */ 1317 HI_U8 au8RGain[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 31]; Format:5.0; 1318 Sharpen Gain for Red Area */ 1319 HI_U8 au8GGain[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 255]; Format:8.0; 1320 Sharpen Gain for Green Area */ 1321 HI_U8 au8BGain[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 31]; Format:5.0; 1322 Sharpen Gain for Blue Area */ 1323 HI_U8 au8SkinGain[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 31]; Format:5.0;Sharpen Gain for Skin Area */ 1324 HI_U16 au16MaxSharpGain[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 0x7FF]; Format:8.3; Maximum sharpen gain */ 1325 HI_U8 au8WeakDetailGain[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 127]; Format:7.0; 1326 Only used for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200; 1327 sharpen Gain for weakdetail */ 1328 } ISP_SHARPEN_AUTO_ATTR_S; 1329 1330 typedef struct hiISP_SHARPEN_ATTR_S { 1331 HI_BOOL bEnable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable sharpen module */ 1332 HI_U8 u8SkinUmin; /* RW; Range: [0, 255]; Format:8.0; U min value of the range of skin area */ 1333 HI_U8 u8SkinVmin; /* RW; Range: [0, 255]; Format:8.0; V min value of the range of skin area */ 1334 HI_U8 u8SkinUmax; /* RW; Range: [0, 255]; Format:8.0; U max value of the range of skin area */ 1335 HI_U8 u8SkinVmax; /* RW; Range: [0, 255]; Format:8.0; V max value of the range of skin area */ 1336 ISP_OP_TYPE_E enOpType; 1337 ISP_SHARPEN_MANUAL_ATTR_S stManual; 1338 ISP_SHARPEN_AUTO_ATTR_S stAuto; 1339 } ISP_SHARPEN_ATTR_S; 1340 1341 /* Not support for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 1342 typedef struct hiISP_EDGEMARK_ATTR_S { 1343 HI_BOOL bEnable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable Edge Mark */ 1344 HI_U8 u8Threshold; /* RW; Range: [0, 255]; Format:8.0 */ 1345 HI_U32 u32Color; /* RW; Range: [0, 0xFFFFFF]; Format:32.0; */ 1346 } ISP_EDGEMARK_ATTR_S; 1347 1348 /* High Light Constraint */ 1349 /* Not support for Hi3559AV100/Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 1350 typedef struct hiISP_HLC_ATTR_S { 1351 HI_BOOL bEnable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable HLC module */ 1352 HI_U8 u8LumaThr; /* RW; Range:[0, 255];Format:8.0 */ 1353 HI_U8 u8LumaTarget; /* RW; Range:[0, 255];Format:8.0 */ 1354 } ISP_HLC_ATTR_S; 1355 1356 /* Crosstalk Removal */ 1357 typedef struct hiISP_CR_ATTR_S { 1358 HI_BOOL bEnable; /* RW; Range: [0, 1];Format 1.0;Enable/disable the crosstalk removal module */ 1359 HI_U8 u8Slope; /* RW; Range: Hi3559AV100 = [0, 14] | Hi3519AV100 = [0, 14]|Hi3516CV500 = [0, 14]| 1360 Hi3516DV300 =[0, 14] |Hi3516AV300 =[0, 14] | Hi3559V200 =[0, 14] |Hi3556V200 =[0, 14] | 1361 Hi3516EV200 = [0, 16]|Hi3516EV300 = [0, 16]| Hi3518EV300 = [0, 16]|Hi3516DV200 = [0, 16]; 1362 Crosstalk slope value. */ 1363 HI_U8 u8SensiSlope; /* RW; Range: Hi3559AV100 = [0, 14] | Hi3519AV100 = [0, 14]|Hi3516CV500 = [0, 14]| 1364 Hi3516DV300 =[0, 14]||Hi3516AV300 =[0, 14] | Hi3559V200 =[0, 14] |Hi3556V200 =[0, 14] | 1365 Hi3516EV200 = [0, 16]|Hi3516EV300 = [0, 16]|Hi3518EV300 = [0, 16]|Hi3516DV200 = [0, 16]; 1366 Crosstalk sensitivity. */ 1367 HI_U16 u16SensiThr; /* RW; Range: Hi3559AV100 = [0, 16383] | Hi3519AV100 = [0, 16383]|Hi3516CV500 = [0, 16383]| 1368 Hi3516DV300 =[0, 16383]|Hi3516AV300 =[0, 16383]| Hi3559V200 =[0, 16383]| 1369 Hi3556V200 =[0, 16383]|Hi3516EV200 = [0,65535]|Hi3516EV300 = [0, 65535]| 1370 Hi3518EV300 = [0, 65535]|Hi3516DV200 = [0, 65535]; 1371 Crosstalk sensitivity threshold. */ 1372 HI_U16 au16Strength[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0,256];Crosstalk strength value. */ 1373 HI_U16 au16Threshold[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: Hi3559AV100 = [0, 16383] | 1374 Hi3519AV100 = [0, 16383]|Hi3516CV500 = [0, 16383]| 1375 Hi3516DV300 =[0, 16383] | Hi3516AV300 =[0, 16383]| 1376 Hi3559V200 =[0, 16383] |Hi3556V200 =[0, 16383] | 1377 Hi3516EV200 = [0, 65535]| Hi3516EV300 = [0, 65535]| 1378 Hi3518EV300 = [0, 65535]|Hi3516DV200 = [0, 65535]; 1379 Crosstalk threshold. */ 1380 HI_U16 au16NpOffset[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: Hi3559AV100 = [512, 16383] | 1381 Hi3519AV100 = [512, 16383]|Hi3516CV500 = [512, 16383]| 1382 Hi3516DV300 =[512, 16383] |Hi3516AV300 =[512, 16383] | 1383 Hi3559V200 =[512, 16383] |Hi3556V200 =[512, 16383] | 1384 Hi3516EV200 = [8192, 65535]|Hi3516EV300 = [8192, 65535]| 1385 Hi3518EV300 = [8192, 65535]|Hi3516DV200 = [8192, 65535]; 1386 Set Noise profile value. */ 1387 } ISP_CR_ATTR_S; 1388 1389 typedef struct hiISP_ANTIFALSECOLOR_MANUAL_ATTR_S { 1390 HI_U8 u8AntiFalseColorThreshold; /* RW;Range:[0x0,0x20];Format:6.0;Threshold for antifalsecolor */ 1391 HI_U8 u8AntiFalseColorStrength; /* RW;Range:[0x0,0x1F];Format:5.0;Strength of antifalsecolor */ 1392 } ISP_ANTIFALSECOLOR_MANUAL_ATTR_S; 1393 1394 typedef struct hiISP_ANTIFALSECOLOR_AUTO_ATTR_S { 1395 HI_U8 au8AntiFalseColorThreshold[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW;Range:[0x0, 0x20];Format:6.0; 1396 Threshold for antifalsecolor */ 1397 HI_U8 au8AntiFalseColorStrength[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW;Range:[0x0, 0x1F];Format:5.0; 1398 Strength of antifalsecolor */ 1399 } ISP_ANTIFALSECOLOR_AUTO_ATTR_S; 1400 1401 typedef struct hiISP_ANTIFALSECOLOR_ATTR_S { 1402 HI_BOOL bEnable; /* RW;Range:[0x0,0x1];Format:1.0; AntiFalseColor Enable */ 1403 ISP_OP_TYPE_E enOpType; 1404 ISP_ANTIFALSECOLOR_AUTO_ATTR_S stAuto; 1405 ISP_ANTIFALSECOLOR_MANUAL_ATTR_S stManual; 1406 } ISP_ANTIFALSECOLOR_ATTR_S; 1407 1408 typedef struct hiISP_DEMOSAIC_MANUAL_ATTR_S { 1409 HI_U8 u8NonDirStr; /* RW; Range:[0x0, 0xFF]; Format:4.4; Non-direction strength */ 1410 HI_U8 u8NonDirMFDetailEhcStr; /* RW; Range:Hi3559AV100 = [0x0, 0x10] |Hi3519AV100 = [0x0, 0x7f] | 1411 Hi3516CV500= [0x0, 0x7f]|Hi3516DV300= [0x0, 0x7f]| Hi3516AV300= [0x0, 0x7f]| 1412 Hi3559V200= [0x0, 0x7f]|Hi3556V200= [0x0, 0x7f]| Hi3516EV200 = [0x0, 0x7f]| 1413 Hi3516EV300 = [0x0, 0x7f]|Hi3518EV300 = [0x0, 0x7f]|Hi3516DV200 = [0x0, 0x7f]; 1414 Format:3.4; Non-direction medium frequent detail enhance strength */ 1415 HI_U8 u8NonDirHFDetailEhcStr; /* RW; Range:[0x0, 0x10]; Format:2.2; 1416 Non-direction high frequent detail enhance strength */ 1417 HI_U8 u8DetailSmoothRange; /* RW; Range:Hi3559AV100 = [0x1, 0x8] |Hi3519AV100 = [0x1, 0x7] | 1418 Hi3516CV500 = [0x1, 0x7]|Hi3516DV300 = [0x1, 0x7]| 1419 Hi3516AV300 = [0x1, 0x7]|Hi3559V200 = [0x1, 0x7]|Hi3556V200 = [0x1, 0x7] | 1420 Hi3516EV200 = [0x1, 0x7]|Hi3516EV300 = [0x1, 0x7]|Hi3518EV300 = [0x1, 0x7]| 1421 Hi3516DV200 = [0x1, 0x7]; Format:4.0; Detail smooth range */ 1422 HI_U16 u16DetailSmoothStr; /* RW; Range:[0x0, 0x100]; Format:9.0; Strength of detail smooth, 1423 Only used for Hi3559AV100 */ 1424 HI_U8 u8ColorNoiseThdF; /* RW; Range:[0x0, 0xff]; Format:8.0; Threshold of color noise cancel */ 1425 HI_U8 u8ColorNoiseStrF; /* RW; Range:[0x0, 0x8]; Format:4.0; Strength of color noise cancel, 1426 Not available for Hi3559AV100 */ 1427 HI_U8 u8ColorNoiseThdY; /* RW; Range:Hi3559AV100 = [0x0, 0xFF] |Hi3519AV100 = [0x0, 0xFF] | 1428 Hi3516CV500 = [0x0, 0xFF] |Hi3516DV300 = [0x0, 0xFF] | 1429 Hi3516AV300 = [0x0, 0xFF] |Hi3559V200 = [0x0, 0xFF] | 1430 Hi3556V200 = [0x0, 0xFF] |Hi3516EV200 = [0x0, 0xF] | 1431 Hi3516EV300 = [0x0, 0xF] |Hi3518EV300 = [0x0, 0xF]; 1432 Format:8.0; Range of color denoise luma, related to luminance and saturation */ 1433 HI_U8 u8ColorNoiseStrY; /* RW; Range:Hi3559AV100 = [0x0, 0xFF] |Hi3519AV100 = [0x0, 0xFF] | 1434 Hi3516CV500 = [0x0, 0xFF] |Hi3516DV300 = [0x0, 0xFF] | 1435 Hi3516AV300 = [0x0, 0xFF] |Hi3559V200 = [0x0, 0xFF] | 1436 Hi3556V200 = [0x0, 0xFF] |Hi3516EV200 = [0x0, 0x3F] | 1437 Hi3516EV300 = [0x0, 0x3F] |Hi3518EV300 = [0x0, 0x3F]; 1438 Format:8.0;Format:8.0; Strength of color denoise luma */ 1439 } ISP_DEMOSAIC_MANUAL_ATTR_S; 1440 1441 typedef struct hiISP_DEMOSAIC_AUTO_ATTR_S { 1442 HI_U8 au8NonDirStr[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range:[0x0, 0xFF]; Format:4.4; Non-direction strength */ 1443 HI_U8 au8NonDirMFDetailEhcStr[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range:Hi3559AV100 = [0x0, 0x10] | 1444 Hi3519AV100 = [0x0, 0x7f] |Hi3516CV500= [0x0, 0x7f]| 1445 Hi3516DV300= [0x0, 0x7f]|Hi3516AV300= [0x0, 0x7f]| 1446 Hi3559V200 = [0x0, 0x7f] |Hi3556V200= [0x0, 0x7f] | 1447 Hi3516EV200= [0x0, 0x7f]|Hi3516EV300 = [0x0, 0x7f] | 1448 Hi3518EV300= [0x0, 0x7f]|Hi3516DV200 = [0x0, 0x7f]; 1449 Format:3.4; Non-direction medium frequent detail 1450 enhance strength */ 1451 HI_U8 au8NonDirHFDetailEhcStr[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range:[0x0, 0x10]; Format:2.2; Non-direction 1452 high frequent detail enhance strength */ 1453 HI_U8 au8DetailSmoothRange[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range:Hi3559AV100 = [0x1, 0x8] | 1454 Hi3519AV100 = [0x1, 0x7] |Hi3516CV500 = [0x1, 0x7]| 1455 Hi3516DV300 = [0x1, 0x7]|Hi3516AV300 = [0x1, 0x7]| 1456 Hi3559V200 = [0x1, 0x7] |Hi3556V200 = [0x1, 0x7]| 1457 Hi3516EV200= [0x1, 0x7]|Hi3516EV300 = [0x, 0x7] | 1458 Hi3518EV300= [0x1, 0x7]|Hi3516DV200= [0x1, 0x7]; 1459 Format:4.0; Detail smooth range */ 1460 HI_U16 au16DetailSmoothStr[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW;Range:[0x0, 0x100]; Format:9.0; 1461 Strength of detail smooth, Only used for Hi3559AV100 */ 1462 HI_U8 au8ColorNoiseThdF[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW;Range:[0x0, 0xff]; Format:8.0; 1463 Threshold of color noise cancel */ 1464 HI_U8 au8ColorNoiseStrF[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW;Range:[0x0, 0x8]; Format:4.0; Strength of color noise 1465 cancel, Not available for Hi3559AV100 */ 1466 HI_U8 au8ColorNoiseThdY[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW;Range:Hi3559AV100 = [0x0, 0xFF] | 1467 Hi3519AV100 = [0x0, 0xFF] | Hi3516CV500 = [0x0, 0xFF] | 1468 Hi3516DV300 = [0x0, 0xFF] | Hi3516AV300 = [0x0, 0xFF] | 1469 Hi3559V200 = [0x0, 0xFF] | Hi3556V200 = [0x0, 0xFF] | 1470 Hi3516EV200 = [0x0, 0xF] | Hi3516EV300 = [0x0, 0xF] | 1471 Hi3518EV300 = [0x0, 0xF]; 1472 Format:8.0; Range of color denoise luma, related to 1473 luminance and saturation */ 1474 HI_U8 au8ColorNoiseStrY[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW;Range:Hi3559AV100 = [0x0, 0xFF] | 1475 Hi3519AV100 = [0x0, 0xFF] | Hi3516CV500 = [0x0, 0xFF] | 1476 Hi3516DV300 = [0x0, 0xFF] | Hi3516AV300 = [0x0, 0xFF] | 1477 Hi3559V200 = [0x0, 0xFF] | Hi3556V200 = [0x0, 0xFF] | 1478 Hi3516EV200 = [0x0, 0x3F] | Hi3516EV300 = [0x0, 0x3F] | 1479 Hi3518EV300 = [0x0, 0x3F]; 1480 Format:8.0;Format:8.0; Strength of color denoise luma */ 1481 } ISP_DEMOSAIC_AUTO_ATTR_S; 1482 1483 typedef struct hiISP_DEMOSAIC_ATTR_S { 1484 HI_BOOL bEnable; /* RW; Range:[0, 1]; Format:1.0;Enable/Disable demosaic module */ 1485 ISP_OP_TYPE_E enOpType; 1486 ISP_DEMOSAIC_MANUAL_ATTR_S stManual; 1487 ISP_DEMOSAIC_AUTO_ATTR_S stAuto; 1488 } ISP_DEMOSAIC_ATTR_S; 1489 1490 /* Defines the attributes of the ISP black level */ 1491 typedef struct hiISP_BLACK_LEVEL_S { 1492 ISP_OP_TYPE_E enOpType; 1493 HI_U16 au16BlackLevel[ISP_BAYER_CHN_NUM]; /* RW; Range: [0x0, 0xFFF];Format:12.0; 1494 Black level values that correspond to the black levels of the 1495 R,Gr, Gb, and B components respectively. */ 1496 } ISP_BLACK_LEVEL_S; 1497 1498 /* 1499 Defines the FPN removal type 1500 0 = Frame mode correction 1501 1 = Line mode correction 1502 */ 1503 typedef enum hiISP_FPN_TYPE_E { 1504 ISP_FPN_TYPE_FRAME = 0, 1505 ISP_FPN_TYPE_LINE = 1, 1506 ISP_FPN_TYPE_BUTT 1507 } ISP_FPN_TYPE_E; 1508 1509 /* Defines the information about calibrated black frames */ 1510 typedef struct hiISP_FPN_FRAME_INFO_S { 1511 HI_U32 u32Iso; /* RW;Range:[0x64,0xFFFFFFFF];Format:32.0;FPN CALIBRATE ISO */ 1512 HI_U32 u32Offset[VI_MAX_SPLIT_NODE_NUM]; /* RW;Range:[0, 0xFFF];Format:12.0; 1513 FPN frame u32Offset (agv pixel value) */ 1514 HI_U32 u32FrmSize; /* RW;FPN frame size (exactly frm size or compress len) */ 1515 VIDEO_FRAME_INFO_S stFpnFrame; /* FPN frame info, 8bpp,10bpp,12bpp,16bpp. Compression or not */ 1516 } ISP_FPN_FRAME_INFO_S; 1517 1518 /* Defines the calibration attribute of the FPN removal module */ 1519 typedef struct hiISP_FPN_CALIBRATE_ATTR_S { 1520 HI_U32 u32Threshold; /* RW;Range:[1,0xFFF];Format:12.0;pix value > threshold means defective pixel */ 1521 HI_U32 u32FrameNum; /* RW;Range:[1, 16];Format:5.0;Number of frames to be calibrated. 1522 The value range is {1, 2, 4, 8, 16},that is, the integer exponentiation of 2 */ 1523 ISP_FPN_TYPE_E enFpnType; /* frame mode or line mode */ 1524 ISP_FPN_FRAME_INFO_S stFpnCaliFrame; 1525 } ISP_FPN_CALIBRATE_ATTR_S; 1526 /* Defines the manual correction attribute of the FPN removal module. */ 1527 typedef struct hiISP_FPN_MANUAL_ATTR_S { 1528 HI_U32 u32Strength; /* RW;Range:[0,1023];Format:10.0;Manual correction strength */ 1529 } ISP_FPN_MANUAL_ATTR_S; 1530 1531 /* Defines the automatic correction attribute of the FPN removal module */ 1532 typedef struct hiISP_FPN_AUTO_ATTR_S { 1533 HI_U32 u32Strength; /* RW;Range:[0,1023];Format:10.0;Auto correction strength */ 1534 } ISP_FPN_AUTO_ATTR_S; 1535 1536 /* Defines the correction attribute of the FPN removal module */ 1537 typedef struct hiISP_FPN_ATTR_S { 1538 HI_BOOL bEnable; /* RW;Range:[0,1];Format:1.0; */ 1539 ISP_OP_TYPE_E enOpType; /* manual or auto mode */ 1540 ISP_FPN_TYPE_E enFpnType; /* frame mode or line mode */ 1541 ISP_FPN_FRAME_INFO_S stFpnFrmInfo; /* input in correction mode. */ 1542 ISP_FPN_MANUAL_ATTR_S stManual; 1543 ISP_FPN_AUTO_ATTR_S stAuto; 1544 } ISP_FPN_ATTR_S; 1545 1546 /* Defines the manual dehze attribute */ 1547 typedef struct hiISP_DEHAZE_MANUAL_ATTR_S { 1548 HI_U8 u8strength; /* RW;Range:[0,0xFF];Format:8.0;Manual dehze strength */ 1549 } ISP_DEHAZE_MANUAL_ATTR_S; 1550 1551 /* Defines the automatic dehze attribute */ 1552 typedef struct hiISP_DEHAZE_AUTO_ATTR_S { 1553 HI_U8 u8strength; /* RW;Range:[0,0xFF];Format:8.0;Weighted coefficient for automatic dehaze strength. */ 1554 } ISP_DEHAZE_AUTO_ATTR_S; 1555 1556 /* Defines the ISP dehaze attribute */ 1557 typedef struct hiISP_DEHAZE_ATTR_S { 1558 HI_BOOL bEnable; /* RW;Range:[0,1];Format:1.0; */ 1559 HI_BOOL bUserLutEnable; /* RW;Range:[0,1];0:Auto Lut 1:User Lut */ 1560 HI_U8 au8DehazeLut[DEHAZE_LUT_SIZE]; 1561 ISP_OP_TYPE_E enOpType; 1562 ISP_DEHAZE_MANUAL_ATTR_S stManual; 1563 ISP_DEHAZE_AUTO_ATTR_S stAuto; 1564 HI_U16 u16TmprfltIncrCoef; /* RW, Range: [0x0, 0x80].filter increase coeffcient. */ 1565 HI_U16 u16TmprfltDecrCoef; /* RW, Range: [0x0, 0x80].filter decrease coeffcient. */ 1566 } ISP_DEHAZE_ATTR_S; 1567 1568 /* Defines purple fringing correction manual attribute */ 1569 typedef struct hiISP_DEPURPLESTR_MANUAL_ATTR_S { 1570 HI_U8 u8DePurpleCrStr; /* RW;Range: [0,8];Format:4.0;Correction strength of the R channel */ 1571 HI_U8 u8DePurpleCbStr; /* RW;Range: [0,8];Format:4.0;Correction strength of the B channel */ 1572 } ISP_DEPURPLESTR_MANUAL_ATTR_S; 1573 1574 /* Defines purple fringing correction automatic attribute */ 1575 typedef struct hiISP_DEPURPLESTR_AUTO_ATTR_S { 1576 HI_U8 au8DePurpleCrStr[ISP_EXP_RATIO_STRENGTH_NUM]; /* RW;Range: [0, 8];Format:4.0; 1577 Correction strength of the R channel */ 1578 HI_U8 au8DePurpleCbStr[ISP_EXP_RATIO_STRENGTH_NUM]; /* RW;Range: [0, 8];Format:4.0; 1579 Correction strength of the B channel */ 1580 } ISP_DEPURPLESTR_AUTO_ATTR_S; 1581 1582 /* Purple fringing detection and correction attribute */ 1583 typedef struct hiISP_LOCAL_CAC_ATTR_S { 1584 HI_BOOL bEnable; /* RW;Range: [0,1];Format:1.0; enable/disable local cac */ 1585 HI_U16 u16PurpleDetRange; /* RW;Range: [0,410];Format:9.0;Purple fringing detection scope */ 1586 HI_U16 u16VarThr; /* RW;Range: [0,4095];Format:12.0;Edge detection threshold */ 1587 HI_U16 u16RDetThr[ISP_LCAC_DET_NUM]; /* RW;Range: [0,4095];Format:12.0;Component R detection threshold */ 1588 HI_U16 u16GDetThr[ISP_LCAC_DET_NUM]; /* RW;Range: [0,4095];Format:12.0;Component G detection threshold */ 1589 HI_U16 u16BDetThr[ISP_LCAC_DET_NUM]; /* RW;Range: [0,4095];Format:12.0;Component B detection threshold */ 1590 HI_U16 u16LumaDetThr[ISP_LCAC_DET_NUM]; /* RW;Range: [0,4095];Format:12.0;Component Luma detection threshold */ 1591 HI_S16 s16CbCrRatio[ISP_LCAC_DET_NUM]; /* RW;Range: [-2048, 2047];Format:S12.0; Cb/Cr ratio threshold, 1592 Not supported in hi3559av100 and hi3519av100 */ 1593 ISP_OP_TYPE_E enOpType; /* RW;Range: [0,1];Format:1.0;Purple fringing correction working mode */ 1594 ISP_DEPURPLESTR_MANUAL_ATTR_S stManual; 1595 ISP_DEPURPLESTR_AUTO_ATTR_S stAuto; 1596 } ISP_LOCAL_CAC_ATTR_S; 1597 1598 /* Defines the lateral chromatic aberration correction attribute, 1599 Not support for Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 1600 typedef struct hiISP_GLOBAL_CAC_ATTR_S { 1601 HI_BOOL bEnable; /* RW; Range: [0, 1];Format: 1.0; enable/disable global cac */ 1602 HI_U16 u16VerCoordinate; /* RW; Range: [0, 8191];Format: 13.0; limited Range: [0, ImageHeight - 1], 1603 Vertical coordinate of the optical center */ 1604 HI_U16 u16HorCoordinate; /* RW; Range: [0, 8191];Format: 13.0; limited range : [0, ImageWidth - 1], 1605 Horizontal coordinate of the optical center */ 1606 HI_S16 s16ParamRedA; /* RW; Range: [-256, 255];Format: 9.0; 1607 Coefficient a of the radius polynomial corresponding to channel R */ 1608 HI_S16 s16ParamRedB; /* RW; Range: [-256, 255];Format: 9.0; 1609 Coefficient b of the radius polynomial corresponding to channel R */ 1610 HI_S16 s16ParamRedC; /* RW; Range: [-256, 255];Format: 9.0; 1611 Coefficient c of the radius polynomial corresponding to channel R */ 1612 HI_S16 s16ParamBlueA; /* RW; Range: [-256, 255];Format: 9.0; 1613 Coefficient a of the radius polynomial corresponding to channel B */ 1614 HI_S16 s16ParamBlueB; /* RW; Range: [-256, 255];Format: 9.0; 1615 Coefficient b of the radius polynomial corresponding to channel B */ 1616 HI_S16 s16ParamBlueC; /* RW; Range: [-256, 255];Format: 9.0; 1617 Coefficient c of the radius polynomial corresponding to channel B */ 1618 HI_U8 u8VerNormShift; /* RW; Range: [0, 7];Format: 3.0; 1619 Normalized shift parameter in the vertical direction */ 1620 HI_U8 u8VerNormFactor; /* RW; Range: [0, 31];Format: 5.0; Normalized coefficient in the vertical direction */ 1621 HI_U8 u8HorNormShift; /* RW; Range: [0, 7];Format: 3.0; 1622 Normalized shift parameter in the horizontal direction */ 1623 HI_U8 u8HorNormFactor; /* RW; Range: [0, 31];Format: 5.0; 1624 Normalized coefficient in the horizontal direction */ 1625 HI_U16 u16CorVarThr; /* RW; Range: [0, 4095];Format: 12.0; 1626 Variance threshold of lateral chromatic aberration correction */ 1627 } ISP_GLOBAL_CAC_ATTR_S; 1628 1629 /* Defines the Radial Crop attribute */ 1630 typedef struct hiISP_RC_ATTR_S { 1631 HI_BOOL bEnable; /* RW;Range:[0, 1];Format:1.0; enable/disableridial crop; 1632 Not support for Hi3516CV500/Hi3516DV300/Hi3516AV300/Hi3559V200/Hi3556V200 */ 1633 POINT_S stCenterCoor; /* RW;the coordinate of central pixel. 1634 Not support for Hi3516CV500/Hi3516DV300/Hi3516AV300/Hi3559V200/Hi3556V200 */ 1635 HI_U32 u32Radius; /* RW;Range:[0, 11586];Format:14.0; when the distance to central pixel is greater than 1636 u32Radius, the pixel value becomes 0. 1637 Not support for Hi3516CV500/Hi3516DV300/Hi3516AV300/Hi3559V200/Hi3556V200 */ 1638 } ISP_RC_ATTR_S; 1639 1640 typedef struct hiISP_INNER_STATE_INFO_S { 1641 HI_U16 au16TextureStr[ISP_SHARPEN_GAIN_NUM]; /* RW; range: [0, 4095]; Format:7.5;Undirectional sharpen strength 1642 for texture and detail enhancement */ 1643 HI_U16 au16EdgeStr[ISP_SHARPEN_GAIN_NUM]; /* RW; range: [0, 4095]; Format:7.5;Directional sharpen strength 1644 for edge enhancement */ 1645 HI_U16 u16TextureFreq; /* RW; range: [0, 4095];Format:6.6; Texture frequency adjustment. Texture and detail 1646 will be finer when it increase */ 1647 HI_U16 u16EdgeFreq; /* RW; range: [0, 4095];Format:6.6; Edge frequency adjustment. Edge will be narrower 1648 and thiner when it increase */ 1649 HI_U8 u8OverShoot; /* RW; range: [0, 127]; Format:7.0;u8OvershootAmt */ 1650 HI_U8 u8UnderShoot; /* RW; range: [0, 127]; Format:7.0;u8UndershootAmt */ 1651 HI_U8 u8ShootSupStr; /* RW; range: [0, 255]; Format:8.0;overshoot and undershoot suppression strength, 1652 the amplitude and width of shoot will be decrease when shootSupSt increase */ 1653 1654 HI_U8 u8NrLscRatio; /* RW;Range:[0x0, 0xff];Format:8.0; Strength of reserving the random 1655 noise according to luma, 1656 Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 not support */ 1657 HI_U16 au16CoarseStr[ISP_BAYER_CHN_NUM]; /* RW;Range:[0x0, 0x3ff];Format:10.0; 1658 Coarse Strength of noise reduction */ 1659 HI_U8 au8WDRFrameStr[WDR_MAX_FRAME_NUM]; /* RW;Range:[0x0, 0x50];Format:7.0; 1660 Coarse strength of each frame in wdr mode */ 1661 HI_U8 au8ChromaStr[ISP_BAYER_CHN_NUM]; /* RW;Range:[0x0, 0x3];Format:2.0;Strength of Chrmoa noise reduction 1662 for R/Gr/Gb/B channel, Only used for Hi3559AV100/Hi3519AV100 */ 1663 HI_U8 u8FineStr; /* RW;Range:[0x0,0x80];Format:8.0;Strength of Luma noise reduction */ 1664 HI_U16 u16CoringWgt; /* RW;Range:[0x0,0xC80];Format:12.0;Strength of reserving the random noise */ 1665 1666 HI_U16 u16DeHazeStrengthActual; /* RW;Range:[0,0xFF];Format:8.0;actual dehze strength */ 1667 HI_U16 u16DrcStrengthActual; /* RW;Range: Hi3559AV100 = [0x0, 0xFF] | Hi3519AV100 = [0x0, 0x3FF] | 1668 Hi3516CV500 = [0x0, 0x3FF]| Hi3516DV300 = [0x0, 0x3FF]| 1669 Hi3516AV300 = [0x0, 0x3FF]|Hi3559V200 = [0x0, 0x3FF]| Hi3556V200 = [0x0, 0x3FF]| 1670 Hi3516EV200 = [0x0, 0x3FF]|Hi3516EV300 = [0x0, 0x3FF]|Hi3518EV300 = [0x0, 0x3FF]| 1671 Hi3516DV200 = [0x0, 0x3FF];Strength of dynamic range compression. 1672 Higher values lead to higher differential gain between shadows and highlights */ 1673 HI_U32 u32WDRExpRatioActual[WDR_MAX_FRAME_NUM - 1]; /* RW; Range:[0x40, 0x4000]; Format:26.6; 0x40 means 1 times. 1674 When enExpRatioType is OP_TYPE_AUTO, u32ExpRatio is invalid. 1675 When enExpRatioType is OP_TYPE_MANUAL, u32ExpRatio is 1676 quotient of long exposure time / short exposure time. */ 1677 HI_BOOL bWDRSwitchFinish; /* RW; Range:[0, 1];Format:1.0;HI_TRUE: WDR switch is finished */ 1678 HI_BOOL bResSwitchFinish; /* RW; Range:[0, 1];Format:1.0;HI_TRUE: Resolution switch is finished */ 1679 HI_U16 au16BLActual[ISP_BAYER_CHN_NUM]; /* RW; Range: [0x0, 0xFFF];Format:12.0; 1680 Actual Black level values that correspond to the black levels of the 1681 R,Gr, Gb, and B components respectively. */ 1682 } ISP_INNER_STATE_INFO_S; 1683 1684 /* 1685 The position of AE histogram in ISP BE pipeline 1686 0 = After DG; 1687 1 = After static WB; 1688 2 = After DRC; 1689 */ 1690 typedef enum hiISP_AE_SWITCH_E { 1691 ISP_AE_AFTER_DG = 0, 1692 ISP_AE_AFTER_WB, 1693 ISP_AE_AFTER_DRC, 1694 ISP_AE_SWITCH_BUTT 1695 } ISP_AE_SWITCH_E; 1696 1697 /* 1698 FourPlaneMode enable 1699 0 : Disabled; 1700 1 : Enabled 1701 */ 1702 typedef enum hiISP_AE_FOUR_PLANE_MODE_E { 1703 ISP_AE_FOUR_PLANE_MODE_DISABLE = 0, 1704 ISP_AE_FOUR_PLANE_MODE_ENABLE, 1705 ISP_AE_FOUR_PLANE_MODE_BUTT 1706 } ISP_AE_FOUR_PLANE_MODE_E; 1707 1708 typedef enum hiISP_AE_HIST_SKIP_E { 1709 ISP_AE_HIST_SKIP_EVERY_PIXEL = 0, 1710 ISP_AE_HIST_SKIP_EVERY_2ND_PIXEL, 1711 ISP_AE_HIST_SKIP_EVERY_3RD_PIXEL, 1712 ISP_AE_HIST_SKIP_EVERY_4TH_PIXEL, 1713 ISP_AE_HIST_SKIP_EVERY_5TH_PIXEL, 1714 ISP_AE_HIST_SKIP_EVERY_8TH_PIXEL, 1715 ISP_AE_HIST_SKIP_EVERY_9TH_PIXEL, 1716 ISP_AE_HIST_SKIP_BUTT 1717 } ISP_AE_HIST_SKIP_E; 1718 1719 typedef enum hiISP_AE_HIST_OFFSET_X_E { 1720 ISP_AE_HIST_START_FORM_FIRST_COLUMN = 0, 1721 ISP_AE_HIST_START_FORM_SECOND_COLUMN, 1722 ISP_AE_HIST_OFFSET_X_BUTT 1723 } ISP_AE_HIST_OFFSET_X_E; 1724 1725 typedef enum hiISP_AE_HIST_OFFSET_Y_E { 1726 ISP_AE_HIST_START_FORM_FIRST_ROW = 0, 1727 ISP_AE_HIST_START_FORM_SECOND_ROW, 1728 ISP_AE_HIST_OFFSET_Y_BUTT 1729 } ISP_AE_HIST_OFFSET_Y_E; 1730 1731 /* Defines the mode configuration for the sampling points during global histogram statistics. */ 1732 typedef struct hiISP_AE_HIST_CONFIG_S { 1733 ISP_AE_HIST_SKIP_E enHistSkipX; /* RW; Range:[0, 6]; Format:4.0; 1734 Histogram decimation in horizontal direction: 0=every pixel; 1735 1=every 2nd pixel; 2=every 3rd pixel; 3=every 4th pixel; 4=every 5th pixel; 1736 5=every 8th pixel; 6+=every 9th pixel */ 1737 ISP_AE_HIST_SKIP_E enHistSkipY; /* RW; Range:[0, 6]; Format:4.0; 1738 Histogram decimation in vertical direction: 0=every pixel; 1=every 2nd pixel; 1739 2=every 3rd pixel; 3=every 4th pixel; 4=every 5th pixel; 5=every 8th pixel; 1740 6+=every 9th pixel */ 1741 ISP_AE_HIST_OFFSET_X_E enHistOffsetX; /* RW; Range:[0, 1]; Format:1.0; 1742 0= start from the first column; 1=start from second column */ 1743 ISP_AE_HIST_OFFSET_Y_E enHistOffsetY; /* RW; Range:[0, 1]; Format:1.0; 1744 0= start from the first row; 1= start from second row */ 1745 } ISP_AE_HIST_CONFIG_S; 1746 1747 typedef enum hiISP_AE_STAT_MODE__E { 1748 ISP_AE_NORMAL = 0, 1749 ISP_AE_ROOT, 1750 ISP_AE_MODE_BUTT 1751 } ISP_AE_STAT_MODE_E; 1752 1753 /* Crops the input image of the AE module */ 1754 typedef struct hiISP_AE_CROP_S { 1755 HI_BOOL bEnable; /* RW; Range: [0,1]; Format:1.0;AE crop enable. */ 1756 HI_U16 u16X; /* RW; Range: Hi3559AV100 = [0, 8192 - 256]|Hi3519AV100 = [0, 8192 - 256]| 1757 Hi3516CV500 = [0, 4608 - 256]|Hi3516DV300 = [0, 4608 - 256]| Hi3516AV300 = [0, 4608 - 256]| 1758 Hi3559V200 = [0, 4608 - 256]|Hi3556V200 = [0, 4608 - 256]| Hi3516EV200 = [0,3072 - 256]| 1759 Hi3516EV300 = [0,3072 - 256]|Hi3518EV300 = [0,3072 - 256]|Hi3516DV200 = [0,3072 - 256]; 1760 Format:13.0;AE image crop start x, limited range:[0, ImageWidth - 256] */ 1761 HI_U16 u16Y; /* RW; Range: Hi3559AV100 = [0, 8192 - 120]|Hi3519AV100 = [0, 8192 - 120]| 1762 Hi3516CV500 = [0, 4608 - 120]|Hi3516DV300 = [0, 4608 - 120]| Hi3516AV300 = [0, 4608 - 120]| 1763 Hi3559V200 = [0, 4608 - 120]|Hi3556V200 = [0, 4608 - 120]| Hi3516EV200 = [0,3072 - 120]| 1764 Hi3516EV300 = [0,3072 - 120]|Hi3518EV300 = [0,3072 - 120]| Hi3516DV200 = [0,3072 - 120]; 1765 Format:13.0;AEimage crop start y, limited range:[0, ImageHeight - 120] */ 1766 HI_U16 u16W; /* RW; Range: Hi3559AV100 = [256, 8192]|Hi3519AV100 = [256, 8192]|Hi3516CV500 = [256, 4608]| 1767 Hi3516DV300 = [256, 4608] | Hi3516AV300 = [256, 4608] |Hi3559V200 = [256, 4608]| 1768 Hi3556V200 = [256, 4608]| Hi3516EV200 = [256, 3072]|Hi3516EV300 = [256, 3072]| 1769 Hi3518EV300 = [256, 3072]|Hi3516DV200 = [256, 3072]; 1770 Format:14.0;AE image crop width, limited range:[256, ImageWidth] */ 1771 HI_U16 u16H; /* RW; Range: Hi3559AV100 = [120, 8192]|Hi3519AV100 = [120, 8192]|Hi3516CV500 = [120, 4608]| 1772 Hi3516DV300 = [120, 4608] | Hi3516AV300 = [120, 4608] |Hi3559V200 = [120, 4608]| 1773 Hi3556V200 = [120, 4608]| Hi3516EV200 = [120, 3072]|Hi3516EV300 = [120, 3072]| 1774 Hi3518EV300 = [120, 3072]|Hi3516DV200 = [120, 3072]; 1775 Format:14.0;AE image crop height limited range:[120, ImageHeight] */ 1776 } ISP_AE_CROP_S; 1777 1778 /* config of statistics structs */ 1779 #define HIST_THRESH_NUM 4 1780 typedef struct hiISP_AE_STATISTICS_CFG_S { 1781 ISP_AE_SWITCH_E enAESwitch; /* RW; Range:[0, 2]; Format:2.0; 1782 The position of AE histogram in ISP BE pipeline */ 1783 ISP_AE_HIST_CONFIG_S stHistConfig; 1784 ISP_AE_FOUR_PLANE_MODE_E enFourPlaneMode; /* RW; Range:[0, 1]; Format:2.0;Four Plane Mode Enable */ 1785 ISP_AE_STAT_MODE_E enHistMode; /* RW; Range:[0, 1]; Format:2.0;AE Hist Rooting Mode */ 1786 ISP_AE_STAT_MODE_E enAverMode; /* RW; Range:[0, 1]; Format:2.0;AE Aver Rooting Mode */ 1787 ISP_AE_STAT_MODE_E enMaxGainMode; /* RW; Range:[0, 1]; Format:2.0;Max Gain Rooting Mode */ 1788 ISP_AE_CROP_S stCrop; 1789 HI_U8 au8Weight[AE_ZONE_ROW][AE_ZONE_COLUMN]; /* RW; Range:[0x0, 0xF]; Format:4.0; AE weighting table */ 1790 } ISP_AE_STATISTICS_CFG_S; 1791 1792 /* Smart Info */ 1793 #define PEOPLE_CLASS_MAX 2 1794 typedef struct hiISP_SMART_ROI_S { 1795 HI_BOOL bEnable; 1796 HI_BOOL bAvailable; 1797 HI_U8 u8Luma; 1798 } ISP_PEOPLE_ROI_S; 1799 1800 #define TUNNEL_CLASS_MAX 2 1801 typedef struct hiISP_TUNNEL_ROI_S { 1802 HI_BOOL bEnable; 1803 HI_BOOL bAvailable; 1804 HI_U32 u32TunnelAreaRatio; 1805 HI_U32 u32TunnelExpPerf; 1806 } ISP_TUNNEL_ROI_S; 1807 1808 typedef struct hiISP_SMART_INFO_S { 1809 ISP_PEOPLE_ROI_S stPeopleROI[PEOPLE_CLASS_MAX]; 1810 ISP_TUNNEL_ROI_S stTunnelROI[TUNNEL_CLASS_MAX]; 1811 } ISP_SMART_INFO_S; 1812 1813 typedef enum hiISP_AE_PEOPLE_TYPE_E { 1814 ISP_FACE_INDEX = 0, 1815 ISP_PEOPLE_INDEX = 1, 1816 ISP_PEOPLE_BUTT 1817 } ISP_PEOPLE_TYPE_E; 1818 1819 typedef enum hiISP_AE_TUNNEL_TYPE_E { 1820 ISP_TUNNEL_IN_INDEX = 0, 1821 ISP_TUNNEL_OUT_INDEX = 1, 1822 ISP_TUNNEL_BUTT 1823 } ISP_TUNNEL_TYPE_E; 1824 1825 /* fines whether the peak value of the zoned IIR statistics is calculated. */ 1826 typedef enum hiISP_AF_PEAK_MODE_E { 1827 ISP_AF_STA_NORM = 0, /* use every value of the block statistic */ 1828 ISP_AF_STA_PEAK, /* use the maximum value in one line of the block statistic */ 1829 ISP_AF_STA_BUTT 1830 } ISP_AF_PEAK_MODE_E; 1831 1832 /* Defines whether the zoned statistics are squared in square mode. */ 1833 typedef enum hiISP_AF_SQU_MODE_E { 1834 ISP_AF_STA_SUM_NORM = 0, /* statistic value accumlate */ 1835 ISP_AF_STA_SUM_SQU, /* statistic value square then accumlate */ 1836 ISP_AF_STA_SUM_BUTT 1837 } ISP_AF_SQU_MODE_E; 1838 /* Crops the input image of the AF module. */ 1839 typedef struct hiISP_AF_CROP_S { 1840 HI_BOOL bEnable; /* RW; Range: [0,1]; Format:1.0; AF crop enable */ 1841 HI_U16 u16X; /* RW; Range: Hi3559AV100 = [0, 7936]|Hi3519AV100 = [0, 7936]|Hi3516CV500 = [0, 4352]| 1842 Hi3516DV300 = [0, 4352]| Hi3516AV300 = [0, 4352]| Hi3559V200 = [0, 4352]| 1843 Hi3556V200 = [0, 4352]| Hi3516EV200 = [0, 2816]| Hi3516EV300 = [0, 2816]| 1844 Hi3518EV300 = [0, 2816]|Hi3516DV200 = [0, 2816]; 1845 Format:13.0;AF image crop start x, limited range:[0, ImageWidth-256] */ 1846 HI_U16 u16Y; /* RW; Range: Hi3559AV100 = [0, 8072]|Hi3519AV100 = [0, 8072]|Hi3516CV500 = [0, 4488]| 1847 Hi3516DV300 = [0, 4488]| Hi3516AV300 = [0, 4488]| Hi3559V200 = [0, 4488]| 1848 Hi3556V200 = [0, 4488]| Hi3516EV200 = [0, 2952]|Hi3516EV300 = [0,2952]| 1849 Hi3518EV300 = [0,2952]|Hi3516DV200 = [0,2952]; 1850 Format:13.0;AF image crop start y, limited range:[0, ImageHeight-120] */ 1851 HI_U16 u16W; /* RW; Range: Hi3559AV100 = [256, 8192]|Hi3519AV100 = [256, 8192]|Hi3516CV500 = [256, 4608]| 1852 Hi3516DV300 = [256, 4608]| Hi3516AV300 = [256, 4608]| Hi3559V200 = [256, 4608]| 1853 Hi3556V200 = [256, 4608]| Hi3516EV200 = [256, 3072]| Hi3516EV300 = [256, 3072]| 1854 Hi3518EV300 = [256, 3072]|Hi3516DV200 = [256, 3072]; 1855 Format:14.0;AF image crop width, limited range:[256, ImageWidth] */ 1856 HI_U16 u16H; /* RW; Range: Hi3559AV100 = [120, 8192]|Hi3519AV100 = [120, 8192]|Hi3516CV500 = [120, 4608]| 1857 Hi3516DV300 = [120, 4608]| Hi3516AV300 = [120, 4608]| Hi3559V200 = [120, 4608]| 1858 Hi3556V200 = [120, 4608]| Hi3516EV200 = [120,3072]| Hi3516EV300 = [120,3072]| 1859 Hi3518EV300 = [120, 3072]|Hi3516DV200 = [120, 3072]; 1860 Format:14.0;AF image crop height, limited range:[120, ImageHeight] */ 1861 } ISP_AF_CROP_S; 1862 1863 /* Defines the position of AF module statistics. */ 1864 typedef enum hiISP_AF_STATISTICS_POS_E { 1865 ISP_AF_STATISTICS_AFTER_DGAIN = 0, /* The AF module is placed in the raw field for statistics,AF after DGain */ 1866 ISP_AF_STATISTICS_AFTER_DRC, /* The AF module is placed in the raw field for statistics,AF after DRC */ 1867 ISP_AF_STATISTICS_AFTER_CSC, /* The AF module is placed in the YUV field for statistics,AF after CSC */ 1868 ISP_AF_STATISTICS_BUTT 1869 } ISP_AF_STATISTICS_POS_E; 1870 1871 /* Configures the Bayer field of the AF module. */ 1872 typedef struct hiISP_AF_RAW_CFG_S { 1873 HI_U8 GammaGainLimit; /* RW; Range: [0x0, 0x5]; Format:3.0, 1874 Not support Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 1875 HI_U8 GammaValue; /* RW; Range: Hi3559AV100 = [0x0, 0x6] | Hi3519AV100 = [0x0, 0x6] | 1876 Hi3516CV500 = [0x0, 0x6] | Hi3516DV300 = [0x0, 0x6]| 1877 Hi3516AV300 = [0x0, 0x6] | Hi3559V200 = [0x0, 0x6]| 1878 Hi3556V200 = [0x0, 0x6]| Hi3516EV200 = [0x0, 0x1]| 1879 Hi3516EV300 = [0x0, 0x1]| Hi3518EV300 = [0x0, 0x1]| 1880 Hi3516DV200 = [0x0, 0x1]; */ 1881 ISP_BAYER_FORMAT_E enPattern; /* RW; Range: [0x0, 0x3]; Format:2.0;raw domain pattern */ 1882 } ISP_AF_RAW_CFG_S; 1883 /* Configures the pre-filter of the AF module. */ 1884 typedef struct hiISP_AF_PRE_FILTER_CFG_S { 1885 HI_BOOL bEn; /* RW; Range: [0,1]; Format:1.0; pre filter enable . */ 1886 HI_U16 u16strength; /* RW; Range: [0x0, 0xFFFF]; Format:16.0;pre filter strength */ 1887 } ISP_AF_PRE_FILTER_CFG_S; 1888 1889 /* Defines AF statistics configuration parameters. */ 1890 typedef struct hiISP_AF_CFG_S { 1891 HI_BOOL bEnable; /* RW; Range: [0,1]; AF enable. */ 1892 HI_U16 u16Hwnd; /* RW; Range: [1, 17]; AF statistic window horizontal block. */ 1893 HI_U16 u16Vwnd; /* RW; Range: [1, 15]; AF statistic window veritical block. */ 1894 HI_U16 u16Hsize; /* RW; Range: Hi3559AV100 = [256, 8192]|Hi3519AV100 = [256, 8192]| 1895 Hi3516CV500 = [256, 4608]|Hi3516DV300 = [256, 4608]| 1896 Hi3516AV300 = [256, 4608]|Hi3559V200 = [256, 4608]| 1897 Hi3556V200 = [256, 4608]|Hi3516EV200 = [256,3072]| 1898 Hi3516EV300 = [256,3072]|Hi3518EV300 = [256,3072]| 1899 Hi3516DV200 = [256,3072]; 1900 limited Range: [256, ImageWidth],AF image width. */ 1901 HI_U16 u16Vsize; /* RW; Range: Hi3559AV100 = [120, 8192]|Hi3519AV100 = [120, 8192]| 1902 Hi3516CV500 = [120, 4608]|Hi3516DV300 = [120, 4608]| 1903 Hi3516AV300 = [120, 4608]|Hi3559V200 = [120, 4608]| 1904 Hi3556V200 = [120, 4608]|Hi3516EV200 = [120,3072]| 1905 Hi3516EV300 = [120,3072]|Hi3518EV300 = [120,3072]| 1906 Hi3516DV200 = [120,3072]; 1907 limited Range: [120, ImageHeight],AF image height. */ 1908 ISP_AF_PEAK_MODE_E enPeakMode; /* RW; Range: [0,1]; AF peak value statistic mode. */ 1909 ISP_AF_SQU_MODE_E enSquMode; /* RW; Range: [0,1]; AF statistic square accumulate. */ 1910 ISP_AF_CROP_S stCrop; /* RW; AF input image crop */ 1911 ISP_AF_STATISTICS_POS_E enStatisticsPos; /* RW; Range: [0,2]; AF statistic position, it can be set to yuv or raw */ 1912 ISP_AF_RAW_CFG_S stRawCfg; /* RW; When AF locate at RAW domain, these para should be cfg. */ 1913 ISP_AF_PRE_FILTER_CFG_S stPreFltCfg; /* RW; pre filter cfg */ 1914 HI_U16 u16HighLumaTh; /* RW; Range: [0,0xFF]; high luma threshold. */ 1915 } ISP_AF_CFG_S; 1916 /* Configures the AF level depend gain module. */ 1917 typedef struct hiISP_AF_LD_S { 1918 HI_BOOL bLdEn; /* RW; Range: [0, 1]; FILTER level depend gain enable. */ 1919 HI_U16 u16ThLow; /* RW; range: [0x0, 0xFF]; FILTER level depend th low */ 1920 HI_U16 u16GainLow; /* RW; range: [0x0, 0xFF]; FILTER level depend gain low */ 1921 HI_U16 u16SlpLow; /* RW; range: [0x0, 0xF]; FILTER level depend slope low */ 1922 HI_U16 u16ThHigh; /* RW; range: [0x0, 0xFF]; FILTER level depend th high */ 1923 HI_U16 u16GainHigh; /* RW; range: [0x0, 0xFF]; FILTER level depend gain high */ 1924 HI_U16 u16SlpHigh; /* RW; range: [0x0, 0xF]; FILTER level depend slope high */ 1925 } ISP_AF_LD_S; 1926 /* Configures the AF coring module. */ 1927 typedef struct hiISP_AF_CORING_S { 1928 HI_U16 u16Th; /* RW; Range: [0x0, 0x7FF];FILTER coring threshold. */ 1929 HI_U16 u16Slp; /* RW; Range: [0x0, 0xF]; FILTER Coring Slope */ 1930 HI_U16 u16Lmt; /* RW; Range: [0x0, 0x7FF];FILTER coring limit */ 1931 } ISP_AF_CORING_S; 1932 1933 #define IIR_EN_NUM 3 1934 #define IIR_GAIN_NUM 7 1935 #define IIR_SHIFT_NUM 4 1936 /* Defines the IIR parameter configuration of horizontal filters for AF statistics. */ 1937 typedef struct hiISP_AF_H_PARAM_S { 1938 HI_BOOL bNarrowBand; /* RW; Range: [0, 1]; IIR narrow band enable. */ 1939 HI_BOOL abIIREn[IIR_EN_NUM]; /* RW; Range: [0, 1]; IIR enable. */ 1940 HI_U8 u8IIRShift; /* RW; Range: [0, 63]; IIR Shift. 1941 Only used for Hi3559AV100/Hi3519AV100 */ 1942 HI_S16 as16IIRGain[IIR_GAIN_NUM]; /* RW; Range: [-511, 511]. IIR gain,gain0 range:[0,255]. */ 1943 HI_U16 au16IIRShift[IIR_SHIFT_NUM]; /* RW; Range: [0x0, 0x7]; IIR shift. */ 1944 ISP_AF_LD_S stLd; /* RW; filter level depend. */ 1945 ISP_AF_CORING_S stCoring; /* RW; filter coring. */ 1946 } ISP_AF_H_PARAM_S; 1947 1948 #define FIR_GAIN_NUM 5 1949 1950 typedef struct hiISP_AF_V_PARAM_S { 1951 HI_S16 as16FIRH[FIR_GAIN_NUM]; /* RW; Range: [-31, 31]; FIR gain. */ 1952 ISP_AF_LD_S stLd; /* RW; filter level depend. */ 1953 ISP_AF_CORING_S stCoring; /* RW; filter coring. */ 1954 } ISP_AF_V_PARAM_S; 1955 1956 #define ACC_SHIFT_H_NUM 2 1957 #define ACC_SHIFT_V_NUM 2 1958 1959 typedef struct hiISP_AF_FV_PARAM_S { 1960 HI_U16 u16AccShiftY; /* RW; Range: [0x0, 0xF]; luminance Y statistic shift. */ 1961 HI_U16 au16AccShiftH[ACC_SHIFT_H_NUM]; /* RW; Range: [0x0, 0xF]; IIR statistic shift. */ 1962 HI_U16 au16AccShiftV[ACC_SHIFT_V_NUM]; /* RW; Range: [0x0, 0xF]; FIR statistic shift. */ 1963 HI_U16 u16HlCntShift; /* RW; Range: [0x0, 0xF]; High luminance counter shift */ 1964 } ISP_AF_FV_PARAM_S; 1965 1966 typedef struct hiISP_FOCUS_STATISTICS_CFG_S { 1967 ISP_AF_CFG_S stConfig; 1968 ISP_AF_H_PARAM_S stHParam_IIR0; 1969 ISP_AF_H_PARAM_S stHParam_IIR1; 1970 ISP_AF_V_PARAM_S stVParam_FIR0; 1971 ISP_AF_V_PARAM_S stVParam_FIR1; 1972 ISP_AF_FV_PARAM_S stFVParam; 1973 } ISP_FOCUS_STATISTICS_CFG_S; 1974 1975 /* 1976 the main purpose of stat key was to access individual statistic info separately... 1977 ...for achieving performance optimization of CPU, because of we acquire stat... 1978 ... in ISP_DRV ISR for our firmware reference and USER can also use alternative MPI... 1979 ... to do this job, so bit1AeStat1~bit1AfStat for MPI behavior control, and bit16IsrAccess... 1980 ... for ISR access control, they were independent. but they have the same bit order, for example... 1981 ... bit1AeStat1 for MPI AeStat1 access key, and bit16 of u32Key for ISR AeStat1 access key 1982 */ 1983 typedef union hiISP_STATISTICS_CTRL_U { 1984 HI_U64 u64Key; 1985 struct { 1986 HI_U64 bit1FEAeGloStat : 1; /* [0] */ 1987 HI_U64 bit1FEAeLocStat : 1; /* [1] */ 1988 HI_U64 bit1FEAeStiGloStat : 1; /* [2] .Only used for Hi3559AV100/Hi3519AV100 */ 1989 HI_U64 bit1FEAeStiLocStat : 1; /* [3] .Only used for Hi3559AV100/Hi3519AV100 */ 1990 HI_U64 bit1BEAeGloStat : 1; /* [4] */ 1991 HI_U64 bit1BEAeLocStat : 1; /* [5] */ 1992 HI_U64 bit1BEAeStiGloStat : 1; /* [6] .Only used for Hi3559AV100/Hi3519AV100 */ 1993 HI_U64 bit1BEAeStiLocStat : 1; /* [7] .Only used for Hi3559AV100/Hi3519AV100 */ 1994 HI_U64 bit1AwbStat1 : 1; /* [8] */ 1995 HI_U64 bit1AwbStat2 : 1; /* [9] */ 1996 HI_U64 bit2Rsv0 : 2; /* [10:11] */ 1997 HI_U64 bit1FEAfStat : 1; /* [12] .Only used for Hi3559AV100/Hi3519AV100 */ 1998 HI_U64 bit1BEAfStat : 1; /* [13] */ 1999 HI_U64 bit2Rsv1 : 2; /* [14:15] */ 2000 HI_U64 bit1Dehaze : 1; /* [16] */ 2001 HI_U64 bit1MgStat : 1; /* [17] */ 2002 HI_U64 bit14Rsv : 14; /* [18:31] */ 2003 HI_U64 bit32IsrAccess : 32; /* [32:63] */ 2004 }; 2005 } ISP_STATISTICS_CTRL_U; 2006 2007 /* statistics structs */ 2008 #define HIST_NUM 1024 2009 #define BAYER_PATTERN_NUM 4 2010 #define WDR_CHN_MAX 4 2011 #define ISP_CHN_MAX_NUM 4 2012 2013 typedef struct hiISP_AE_GRID_INFO_S { 2014 HI_U16 au16GridYPos[AE_ZONE_ROW + 1]; /* R */ 2015 HI_U16 au16GridXPos[AE_ZONE_COLUMN + 1]; /* R */ 2016 HI_U8 u8Status; /* R;0:not update, 1: update,others:reserved */ 2017 } ISP_AE_GRID_INFO_S; 2018 2019 typedef struct hiISP_MG_GRID_INFO_S { 2020 HI_U16 au16GridYPos[MG_ZONE_ROW + 1]; /* R */ 2021 HI_U16 au16GridXPos[MG_ZONE_COLUMN + 1]; /* R */ 2022 HI_U8 u8Status; /* R;0:not update, 1: update,others:reserved */ 2023 } ISP_MG_GRID_INFO_S; 2024 2025 typedef struct hiISP_AWB_GRID_INFO_S { 2026 HI_U16 au16GridYPos[AWB_ZONE_ORIG_ROW + 1]; /* R */ 2027 HI_U16 au16GridXPos[AWB_ZONE_ORIG_COLUMN + 1]; /* R */ 2028 HI_U8 u8Status; /* R;0:not update, 1: update,others:reserved */ 2029 } ISP_AWB_GRID_INFO_S; 2030 2031 typedef struct hiISP_FOCUS_GRID_INFO_S { 2032 HI_U16 au16GridYPos[AF_ZONE_ROW + 1]; /* R */ 2033 HI_U16 au16GridXPos[AF_ZONE_COLUMN + 1]; /* R */ 2034 HI_U8 u8Status; /* R;0:not update, 1: update,others:reserved */ 2035 } ISP_FOCUS_GRID_INFO_S; 2036 2037 typedef struct hiISP_AE_STATISTICS_S { 2038 HI_U32 au32FEHist1024Value[ISP_CHN_MAX_NUM][HIST_NUM]; /* R; Range: [0x0, 0xFFFFFFFF]; Format:32.0; 2039 Global 1024 bins histogram of FE */ 2040 HI_U16 au16FEGlobalAvg[ISP_CHN_MAX_NUM][BAYER_PATTERN_NUM]; /* R; Range: [0x0, 0xFFFF]; Format:16.0; 2041 Global average value of FE, 2042 Not support Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 2043 HI_U16 au16FEZoneAvg[ISP_CHN_MAX_NUM][AE_ZONE_ROW][AE_ZONE_COLUMN][BAYER_PATTERN_NUM]; /* R; Range: [0x0, 0xFFFF]; 2044 Format:16.0; 2045 Zone average value of FE, 2046 Not support for Hi3516CV500/Hi3516DV300/Hi3516AV300/Hi3559V200/Hi3556V200's Fe1 and Fe3, 2047 Not support Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 2048 HI_U32 au32BEHist1024Value[HIST_NUM]; /* R; Range: [0x0, 0xFFFFFFFF]; Format:32.0; 2049 Global 1024 bins histogram of BE */ 2050 HI_U16 au16BEGlobalAvg[BAYER_PATTERN_NUM]; /* R; Range: [0x0, 0xFFFF]; Format:16.0; Global average value of BE */ 2051 HI_U16 au16BEZoneAvg[AE_ZONE_ROW][AE_ZONE_COLUMN][BAYER_PATTERN_NUM]; /* R; Range: [0x0, 0xFFFF]; Format:16.0; 2052 Zone average value of BE */ 2053 ISP_AE_GRID_INFO_S stFEGridInfo; 2054 ISP_AE_GRID_INFO_S stBEGridInfo; 2055 } ISP_AE_STATISTICS_S; 2056 2057 /* Not support for Hi3516CV500/Hi3516DV300/Hi3516AV300/Hi3559V200/Hi3556V200/ 2058 Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 2059 typedef struct hiISP_AE_STITCH_STATISTICS_S { 2060 HI_U32 au32FEHist1024Value[ISP_CHN_MAX_NUM][HIST_NUM]; /* R; Range: [0x0, 0xFFFFFFFF]; Format:32.0; 2061 Global 1024 bins histogram of FE */ 2062 HI_U16 au16FEGlobalAvg[ISP_CHN_MAX_NUM][BAYER_PATTERN_NUM]; /* R; Range: [0x0, 0xFFFF]; Format:16.0; 2063 Global average value of FE */ 2064 HI_U16 au16FEZoneAvg[VI_MAX_PIPE_NUM][ISP_CHN_MAX_NUM][AE_ZONE_ROW][AE_ZONE_COLUMN][BAYER_PATTERN_NUM]; /* R; 2065 Range: [0x0, 0xFFFF]; Format:16.0; 2066 Zone average value of FE */ 2067 HI_U32 au32BEHist1024Value[HIST_NUM]; /* R; Range: [0x0, 0xFFFFFFFF]; Format:32.0; 2068 Global 1024 bins histogram of BE */ 2069 HI_U16 au16BEGlobalAvg[BAYER_PATTERN_NUM]; /* R; Range: [0x0, 0xFFFF]; Format:16.0; Global average value of BE */ 2070 HI_U16 au16BEZoneAvg[VI_MAX_PIPE_NUM][AE_ZONE_ROW][AE_ZONE_COLUMN][BAYER_PATTERN_NUM]; /* R; Range: [0x0, 0xFFFF]; 2071 Format:16.0; 2072 Zone average value of BE */ 2073 } ISP_AE_STITCH_STATISTICS_S; 2074 2075 typedef struct hiISP_MG_STATISTICS_S { 2076 HI_U16 au16ZoneAvg[MG_ZONE_ROW][MG_ZONE_COLUMN][BAYER_PATTERN_NUM]; /* R; Range: [0x0, 0xFF]; Format:8.0; 2077 Zone average value */ 2078 ISP_MG_GRID_INFO_S stGridInfo; 2079 } ISP_MG_STATISTICS_S; 2080 2081 typedef enum hiISP_AWB_SWITCH_E { 2082 ISP_AWB_AFTER_DG = 0, 2083 ISP_AWB_AFTER_Expander, 2084 ISP_AWB_AFTER_DRC, 2085 ISP_AWB_SWITCH_BUTT 2086 } ISP_AWB_SWITCH_E; 2087 2088 typedef enum hiISP_AWB_GAIN_SWITCH_E { 2089 ISP_AWB_GAIN_IN_ISP = 0, 2090 ISP_AWB_GAIN_IN_SENSOR, 2091 ISP_AWB_GAIN_IN_BUTT 2092 } ISP_AWB_GAIN_SWITCH_E; 2093 2094 /* Crops the input image of the AWB module */ 2095 typedef struct hiISP_AWB_CROP_S { 2096 HI_BOOL bEnable; /* RW; Range: [0,1]; Format:1.0;AWB crop enable */ 2097 HI_U16 u16X; /* RW; Range: Hi3559AV100 = [0, 8192 - 60]|Hi3519AV100 = [0, 8192 - 60]|Hi3516CV500 = [0, 4608 - 60]| 2098 Hi3516DV300 = [0, 4608 - 60]| Hi3516AV300 = [0, 4608 - 60]|Hi3559V200 = [0, 4608 - 60]| 2099 Hi3556V200 = [0, 4608 - 60]| Hi3516EV200 = [0,3072- 60]|Hi3516EV300 = [0,3072- 60]| 2100 Hi3518EV300 = [0,3072- 60]| Hi3516DV200 = [0,3072- 60]; Format:13.0; 2101 AWB image crop start x, limited range:[0, ImageWidth - u16ZoneCol * 60] */ 2102 HI_U16 u16Y; /* RW; Range: Hi3559AV100 = [0, 8192 - 14]|Hi3519AV100 = [0, 8192 - 14]|Hi3516CV500 = [0, 4608 - 14]| 2103 Hi3516DV300 = [0, 4608 - 14]| Hi3516AV300 = [0, 4608 - 14]|Hi3559V200 = [0, 4608 - 14]| 2104 Hi3556V200 = [0, 4608 - 14]| Hi3516EV200 = [0,3072-14]|Hi3516EV300 = [0,3072-14]| 2105 Hi3518EV300 = [0,3072-14]| Hi3516DV200 = [0,3072-14]; Format:13.0; 2106 AWB image crop start y,limited range:[0, ImageHeight - u16ZoneRow * 14] */ 2107 HI_U16 u16W; /* RW; Range: Hi3559AV100 = [60, 8192]|Hi3519AV100 = [60, 8192]|Hi3516CV500 = [60, 4608]| 2108 Hi3516DV300 = [60, 4608] | Hi3516AV300 = [60, 4608] |Hi3559V200 = [60, 4608]| 2109 Hi3556V200 = [60, 4608]| Hi3516EV200 = [60,3072]|Hi3516EV300 = [60,3072]|Hi3518EV300 = [60,3072]| 2110 Hi3516DV200 = [60,3072]; Format:14.0;AWB image crop width, 2111 limited range:[u16ZoneCol * 60, ImageWidth] */ 2112 HI_U16 u16H; /* RW; Range: Hi3559AV100 = [14, 8192]|Hi3519AV100 = [14, 8192]|Hi3516CV500 = [14, 4608]| 2113 Hi3516DV300 = [14, 4608] | Hi3516AV300 = [14, 4608] |Hi3559V200 = [14, 4608]| 2114 Hi3556V200 = [14, 4608] | Hi3516EV200 = [14,3072]|Hi3516EV300 = [14,3072]|Hi3518EV300 = [14,3072]| 2115 Hi3516DV200 = [14,3072]; Format:14.0;AWB image crop height, 2116 limited range:[u16ZoneRow * 14, ImageHeight] */ 2117 } ISP_AWB_CROP_S; 2118 2119 /* Defines the AWB statistics configuration */ 2120 typedef struct hiISP_WB_STATISTICS_CFG_S { 2121 ISP_AWB_SWITCH_E enAWBSwitch; /* RW; Range: [0x0, 0x2]; Position of AWB statistics in pipeline */ 2122 HI_U16 u16ZoneRow; /* RW; Range: [0x1, 0x20]; Vertical Blocks, 2123 limited range:[1, min(32, ImageHeight /AWB_MIN_HEIGHT)] */ 2124 HI_U16 u16ZoneCol; /* RW; Range: [0x1, 0x20]; Horizontal Blocks, 2125 limited range:[BlkNum, min(32, Width /AWB_MIN_WIDTH)] */ 2126 HI_U16 u16ZoneBin; /* RW; Range:Hi3559AV100 = [1, 4] | Hi3519AV100 = [1, 4] | Hi3516CV500 = [1, 1]| 2127 Hi3516DV300 = [1, 1]| Hi3516AV300 = [1, 1]|Hi3559V200 = [1, 1]| 2128 Hi3556V200 = [1, 1]| Hi3516EV200 = [1,1]|Hi3516EV300 = [1,1]|Hi3518EV300 = [1,1]| 2129 Hi3516DV200 = [1,1]; Brightness Bins */ 2130 HI_U16 au16HistBinThresh[AWB_ZONE_BIN_MAX]; /* RW; Range: [0x0, 0xFFFF]; Bin Threshold */ 2131 HI_U16 u16WhiteLevel; /* RW; Range: [0x0, 0xFFFF];Upper limit of valid data for white region, 2132 for Bayer statistics, [0x0, 0x3FF] for RGB statistics */ 2133 HI_U16 u16BlackLevel; /* RW; Range: [0x0, 0xFFFF];limited range: [0x0, u16WhiteLevel], 2134 Lower limit of valid data for white region . 2135 for Bayer statistics, bitwidth is 12, for RGB statistics, bitwidth is 10 */ 2136 HI_U16 u16CbMax; /* RW; Range: [0x0, 0xFFF];Maximum value of B/G for white region */ 2137 HI_U16 u16CbMin; /* RW; Range: [0x0, 0xFFF];limited range: [0x0, u16CbMax] 2138 Minimum value of B/G for white region */ 2139 HI_U16 u16CrMax; /* RW; Range: [0x0, 0xFFF];Maximum value of R/G for white region */ 2140 HI_U16 u16CrMin; /* RW; Range: [0x0, 0xFFF];limited range: [0x0, u16CrMax], 2141 Minimum value of R/G for white region */ 2142 ISP_AWB_CROP_S stCrop; 2143 } ISP_WB_STATISTICS_CFG_S; 2144 2145 /* Not support for Hi3516CV500/Hi3516DV300/Hi3516AV300/Hi3559V200/Hi3556V200/ 2146 Hi3516EV200/Hi3516EV300/Hi3518EV300/Hi3516DV200 */ 2147 typedef struct hiISP_WB_STITCH_STATISTICS_S { 2148 HI_U16 u16ZoneRow; /* R; Range: [0x1, 0x20]; 2149 effective horizontal block number for AWB statistic stitch window */ 2150 HI_U16 u16ZoneCol; /* R; Range: [0x1, 0x100]; 2151 effective vetical block number for AWB statistic stitch window */ 2152 HI_U16 au16ZoneAvgR[AWB_ZONE_STITCH_MAX]; /* R; Range: [0x0, 0xFFFF];Zone Average R for Stitich mode */ 2153 HI_U16 au16ZoneAvgG[AWB_ZONE_STITCH_MAX]; /* R; Range: [0x0, 0xFFFF];Zone Average G for Stitich mode */ 2154 HI_U16 au16ZoneAvgB[AWB_ZONE_STITCH_MAX]; /* R; Range: [0x0, 0xFFFF];Zone Average B for Stitich mode */ 2155 HI_U16 au16ZoneCountAll[AWB_ZONE_STITCH_MAX]; /* R; Range: [0x0, 0xFFFF]; 2156 normalized number of Gray points for Stitich mode */ 2157 } ISP_WB_STITCH_STATISTICS_S; 2158 2159 typedef struct hiISP_WB_STATISTICS_S { 2160 HI_U16 u16GlobalR; /* R; Range: [0x0, 0xFFFF];Global WB output Average R */ 2161 HI_U16 u16GlobalG; /* R; Range: [0x0, 0xFFFF];Global WB output Average G */ 2162 HI_U16 u16GlobalB; /* R; Range: [0x0, 0xFFFF];Global WB output Average B */ 2163 HI_U16 u16CountAll; /* R; Range: [0x0, 0xFFFF];normalized number of Gray points */ 2164 2165 HI_U16 au16ZoneAvgR[AWB_ZONE_NUM]; /* R; Range: [0x0, 0xFFFF];Zone Average R */ 2166 HI_U16 au16ZoneAvgG[AWB_ZONE_NUM]; /* R; Range: [0x0, 0xFFFF];Zone Average G */ 2167 HI_U16 au16ZoneAvgB[AWB_ZONE_NUM]; /* R; Range: [0x0, 0xFFFF];Zone Average B */ 2168 HI_U16 au16ZoneCountAll[AWB_ZONE_NUM]; /* R; Range: [0x0, 0xFFFF];normalized number of Gray points */ 2169 ISP_AWB_GRID_INFO_S stGridInfo; 2170 } ISP_WB_STATISTICS_S; 2171 2172 typedef struct hiISP_FOCUS_ZONE_S { 2173 HI_U16 u16v1; /* R; Range: [0x0, 0xFFFF];vertical fir block1 Statistics */ 2174 HI_U16 u16h1; /* R; Range: [0x0, 0xFFFF];horizontal iir block1 Statistics */ 2175 HI_U16 u16v2; /* R; Range: [0x0, 0xFFFF];vertical fir block2 Statistics */ 2176 HI_U16 u16h2; /* R; Range: [0x0, 0xFFFF];horizontal iir block2 Statistics */ 2177 HI_U16 u16y; /* R; Range: [0x0, 0xFFFF];Y Statistics */ 2178 HI_U16 u16HlCnt; /* R; Range: [0x0, 0xFFFF];HlCnt Statistics */ 2179 } ISP_FOCUS_ZONE_S; 2180 2181 typedef struct hiISP_FE_FOCUS_STATISTICS_S { 2182 ISP_FOCUS_ZONE_S stZoneMetrics[WDR_CHN_MAX][AF_ZONE_ROW][AF_ZONE_COLUMN]; /* R; The zoned measure of contrast */ 2183 } ISP_FE_FOCUS_STATISTICS_S; 2184 2185 typedef struct hiISP_BE_FOCUS_STATISTICS_S { 2186 ISP_FOCUS_ZONE_S stZoneMetrics[AF_ZONE_ROW][AF_ZONE_COLUMN]; /* R; The zoned measure of contrast */ 2187 } ISP_BE_FOCUS_STATISTICS_S; 2188 2189 typedef struct hiISP_AF_STATISTICS_S { 2190 ISP_FE_FOCUS_STATISTICS_S stFEAFStat; /* only used for Hi3559AV100/Hi3519AV100 */ 2191 ISP_BE_FOCUS_STATISTICS_S stBEAFStat; 2192 ISP_FOCUS_GRID_INFO_S stFEAFGridInfo; /* only used for Hi3559AV100/Hi3519AV100 */ 2193 ISP_FOCUS_GRID_INFO_S stBEAFGridInfo; 2194 } ISP_AF_STATISTICS_S; 2195 2196 typedef struct hiISP_STATISTICS_CFG_S { 2197 ISP_STATISTICS_CTRL_U unKey; 2198 ISP_AE_STATISTICS_CFG_S stAECfg; 2199 ISP_WB_STATISTICS_CFG_S stWBCfg; 2200 ISP_FOCUS_STATISTICS_CFG_S stFocusCfg; 2201 } ISP_STATISTICS_CFG_S; 2202 2203 /* ISP debug information */ 2204 typedef struct hiISP_DEBUG_INFO_S { 2205 HI_BOOL bDebugEn; /* RW; 1:enable debug, 0:disable debug */ 2206 HI_U64 u64PhyAddr; /* RW; phy address of debug info */ 2207 HI_U32 u32Depth; /* RW; depth of debug info */ 2208 } ISP_DEBUG_INFO_S; 2209 2210 typedef struct hiISP_DBG_ATTR_S { 2211 HI_U32 u32Rsv; /* H;need to add member */ 2212 } ISP_DBG_ATTR_S; 2213 2214 typedef struct hiISP_DBG_STATUS_S { 2215 HI_U32 u32FrmNumBgn; 2216 HI_U32 u32Rsv; /* H;need to add member */ 2217 HI_U32 u32FrmNumEnd; 2218 } ISP_DBG_STATUS_S; 2219 2220 /* 2221 0 = Communication between the sensor and the ISP over the I2C interface 2222 1 = Communication between the sensor and the ISP over the SSP interface 2223 */ 2224 typedef enum hiISP_SNS_TYPE_E { 2225 ISP_SNS_I2C_TYPE = 0, 2226 ISP_SNS_SSP_TYPE, 2227 2228 ISP_SNS_TYPE_BUTT, 2229 } ISP_SNS_TYPE_E; 2230 2231 /* sensor communication bus */ 2232 typedef union hiISP_SNS_COMMBUS_U { 2233 HI_S8 s8I2cDev; 2234 struct { 2235 HI_S8 bit4SspDev : 4; 2236 HI_S8 bit4SspCs : 4; 2237 } s8SspDev; 2238 } ISP_SNS_COMMBUS_U; 2239 2240 typedef struct hiISP_I2C_DATA_S { 2241 HI_BOOL bUpdate; /* RW; Range: [0x0, 0x1]; Format:1.0; 2242 HI_TRUE: The sensor registers are written, 2243 HI_FALSE: The sensor registers are not written */ 2244 HI_U8 u8DelayFrmNum; /* RW; Number of delayed frames for the sensor register */ 2245 HI_U8 u8IntPos; /* RW;Position where the configuration of the sensor register takes effect */ 2246 /* 0x0,very short frame start interrupt, 0x1:very short frame end interrupt, 2247 0x10,short frame start interrupt, 0x11:short frame end interrupt, 2248 0x20,middle frame start interrupt, 0x21:middle frame end interrupt, 2249 0x30,long frame start interrupt, 0x31:long frame end interrupt */ 2250 HI_U8 u8DevAddr; /* RW;Sensor device address */ 2251 HI_U32 u32RegAddr; /* RW;Sensor register address */ 2252 HI_U32 u32AddrByteNum; /* RW;Bit width of the sensor register address */ 2253 HI_U32 u32Data; /* RW;Sensor register data */ 2254 HI_U32 u32DataByteNum; /* RW;Bit width of sensor register data */ 2255 } ISP_I2C_DATA_S; 2256 2257 typedef struct hiISP_SSP_DATA_S { 2258 HI_BOOL bUpdate; /* RW; Range: [0x0, 0x1]; Format:1.0; 2259 HI_TRUE: The sensor registers are written, 2260 HI_FALSE: The sensor registers are not written */ 2261 HI_U8 u8DelayFrmNum; /* RW; Number of delayed frames for the sensor register */ 2262 HI_U8 u8IntPos; /* RW;Position where the configuration of the sensor register takes effect 2263 0x0,very short frame start interrupt, 0x1:very short frame end interrupt 2264 0x10,short frame start interrupt, 0x11:short frame end interrupt 2265 0x20,middle frame start interrupt, 0x21:middle frame end interrupt 2266 0x30,long frame start interrupt, 0x31:long frame end interrupt */ 2267 2268 HI_U32 u32DevAddr; /* RW;Sensor device address */ 2269 HI_U32 u32DevAddrByteNum; /* RW;Bit width of the sensor device address */ 2270 HI_U32 u32RegAddr; /* RW;Sensor register address */ 2271 HI_U32 u32RegAddrByteNum; /* RW;Bit width of the sensor register address */ 2272 HI_U32 u32Data; /* RW;Sensor register data */ 2273 HI_U32 u32DataByteNum; /* RW;Bit width of sensor register data */ 2274 } ISP_SSP_DATA_S; 2275 2276 typedef enum hiISP_SNS_MODE_E { 2277 SNS_EXP_MODE = 0, 2278 SNS_SHR_MODE = 1, 2279 SNS_MODE_BUTT 2280 } ISP_SNS_MODE_E; 2281 2282 typedef struct hiISP_MCF_DATA_S { 2283 HI_U32 u32SnsVmaxAddr[ISP_MAX_SNS_EXP_ADDR_NUM]; /* 3 addr high mid low */ 2284 HI_U32 u32SnsExpAddr[ISP_MAX_SNS_EXP_ADDR_NUM]; /* 3 addr high mid low */ 2285 HI_U32 u32SnsReadoutTime; 2286 ISP_SNS_MODE_E enSnsExpMode; /* 1: shr 0:exp */ 2287 } ISP_MCF_DATA_S; 2288 2289 typedef struct hiISP_SNS_REGS_INFO_S { 2290 ISP_SNS_TYPE_E enSnsType; 2291 HI_U32 u32RegNum; /* RW;Number of registers required when exposure results are written to the sensor. 2292 The member value cannot be dynamically changed */ 2293 HI_U8 u8Cfg2ValidDelayMax; /* RW;Maximum number of delayed frames from the time when all sensor registers are 2294 configured to the time when configurations take effect, which is used to ensure 2295 the synchronization between sensor registers and ISP registers */ 2296 ISP_SNS_COMMBUS_U unComBus; 2297 union { 2298 ISP_I2C_DATA_S astI2cData[ISP_MAX_SNS_REGS]; 2299 ISP_SSP_DATA_S astSspData[ISP_MAX_SNS_REGS]; 2300 }; 2301 2302 struct { 2303 HI_BOOL bUpdate; 2304 HI_U8 u8DelayFrmNum; 2305 HI_U32 u32SlaveVsTime; /* RW;time of vsync. Unit: inck clock cycle */ 2306 HI_U32 u32SlaveBindDev; 2307 } stSlvSync; 2308 2309 ISP_MCF_DATA_S stMcfData; 2310 2311 HI_BOOL bConfig; 2312 } ISP_SNS_REGS_INFO_S; 2313 2314 typedef enum hiISP_VD_TYPE_E { 2315 ISP_VD_FE_START = 0, 2316 ISP_VD_FE_END, 2317 ISP_VD_BE_END, 2318 2319 ISP_VD_BUTT 2320 } ISP_VD_TYPE_E; 2321 2322 /* Defines the attributes of the virtual addresses for the registers of ISP submodules */ 2323 typedef struct hiISP_REG_ATTR_S { 2324 HI_VOID *pIspExtRegAddr; /* R;Start virtual address for the ISP external virtual registers */ 2325 HI_U32 u32IspExtRegSize; /* R;Size of the ISP external virtual registers */ 2326 HI_VOID *pAeExtRegAddr; /* R;Start virtual address for the AE library module */ 2327 HI_U32 u32AeExtRegSize; /* R;Size of the AE library module */ 2328 HI_VOID *pAwbExtRegAddr; /* R;Start virtual address for the AWB library module */ 2329 HI_U32 u32AwbExtRegSize; /* R;Size of the AWB library module */ 2330 } ISP_REG_ATTR_S; 2331 2332 /* AI structs */ 2333 /* 2334 Defines the ISP iris type 2335 0 = DC iris 2336 1 = P iris 2337 */ 2338 typedef enum hiISP_IRIS_TYPE_E { 2339 ISP_IRIS_DC_TYPE = 0, 2340 ISP_IRIS_P_TYPE, 2341 2342 ISP_IRIS_TYPE_BUTT, 2343 } ISP_IRIS_TYPE_E; 2344 2345 /* Defines the F value of the ISP iris */ 2346 typedef enum hiISP_IRIS_F_NO_E { 2347 ISP_IRIS_F_NO_32_0 = 0, 2348 ISP_IRIS_F_NO_22_0, 2349 ISP_IRIS_F_NO_16_0, 2350 ISP_IRIS_F_NO_11_0, 2351 ISP_IRIS_F_NO_8_0, 2352 ISP_IRIS_F_NO_5_6, 2353 ISP_IRIS_F_NO_4_0, 2354 ISP_IRIS_F_NO_2_8, 2355 ISP_IRIS_F_NO_2_0, 2356 ISP_IRIS_F_NO_1_4, 2357 ISP_IRIS_F_NO_1_0, 2358 2359 ISP_IRIS_F_NO_BUTT, 2360 } ISP_IRIS_F_NO_E; 2361 2362 typedef struct hiISP_DCIRIS_ATTR_S { 2363 HI_S32 s32Kp; /* RW; Range:[0, 100000]; Format:32.0; the proportional gain of PID algorithm, 2364 default value is 7000 */ 2365 HI_S32 s32Ki; /* RW; Range:[0, 1000]; Format:32.0; the integral gain of PID algorithm, 2366 default value is 100 */ 2367 HI_S32 s32Kd; /* RW; Range:[0, 100000]; Format:32.0; the derivative gain of PID algorithm, 2368 default value is 3000 */ 2369 HI_U32 u32MinPwmDuty; /* RW; Range:[0, 1000]; Format:32.0; which is the min pwm duty for dciris control */ 2370 HI_U32 u32MaxPwmDuty; /* RW; Range:[0, 1000]; Format:32.0; which is the max pwm duty for dciris control */ 2371 HI_U32 u32OpenPwmDuty; /* RW; Range:[0, 1000]; Format:32.0; which is the open pwm duty for dciris control */ 2372 } ISP_DCIRIS_ATTR_S; 2373 2374 typedef struct hiISP_PIRIS_ATTR_S { 2375 HI_BOOL bStepFNOTableChange; /* W; Range:[0, 1]; Format:1.0; Step-F number mapping table change or not */ 2376 HI_BOOL bZeroIsMax; /* RW; Range:[0, 1]; Format:1.0; Step 0 corresponds to max aperture or not, 2377 it's related to the specific iris */ 2378 HI_U16 u16TotalStep; /* RW; Range:[1, 1024]; Format:16.0; Total steps of Piris's aperture, 2379 it's related to the specific iris */ 2380 HI_U16 u16StepCount; /* RW; Range:[1, 1024]; Format:16.0; Used steps of Piris's aperture. 2381 when Piris's aperture is too small, the F number precision is not enough, 2382 so not all the steps can be used. It's related to the specific iris */ 2383 HI_U16 au16StepFNOTable[AI_MAX_STEP_FNO_NUM]; /* RW; Range:[1, 1024]; Format:16.0; Step-F number mapping table. 2384 F1.0 is expressed as 1024, F32 is expressed as 1, 2385 it's related to the specific iris */ 2386 ISP_IRIS_F_NO_E enMaxIrisFNOTarget; /* RW; Range:[0, 10]; Format:4.0; 2387 Max F number of Piris's aperture, it's related to the specific iris */ 2388 ISP_IRIS_F_NO_E enMinIrisFNOTarget; /* RW; Range:[0, 10]; Format:4.0; 2389 Min F number of Piris's aperture, it's related to the specific iris */ 2390 2391 HI_BOOL bFNOExValid; /* RW; Range:[0, 1]; Format:1.0; use equivalent gain to present FNO or not */ 2392 HI_U32 u32MaxIrisFNOTarget; /* RW; Range:[1, 1024]; Format:16.0; 2393 Max equivalent gain of F number of Piris's aperture, 2394 only used when bFNOExValid is true, it's related to the specific iris */ 2395 HI_U32 u32MinIrisFNOTarget; /* RW; Range:[1, 1024]; Format:16.0; 2396 Min equivalent gain of F number of Piris's aperture, 2397 only used when bFNOExValid is true, it's related to the specific iris */ 2398 } ISP_PIRIS_ATTR_S; 2399 2400 /* Defines the MI attribute */ 2401 typedef struct hiISP_MI_ATTR_S { 2402 HI_U32 u32HoldValue; /* RW; Range:[0, 1000]; Format:32.0; iris hold value for DC-iris */ 2403 ISP_IRIS_F_NO_E enIrisFNO; /* RW; Range:[0, 10]; Format:4.0; the F number of P-iris */ 2404 } ISP_MI_ATTR_S; 2405 2406 /* 2407 Defines the ISP iris status 2408 0 = In this mode can set the MI holdvalue 2409 1 = Open Iris to the max 2410 2 = Close Iris to the min 2411 */ 2412 typedef enum hiISP_IRIS_STATUS_E { 2413 ISP_IRIS_KEEP = 0, 2414 ISP_IRIS_OPEN = 1, 2415 ISP_IRIS_CLOSE = 2, 2416 ISP_IRIS_BUTT 2417 } ISP_IRIS_STATUS_E; 2418 2419 /* Defines the iris attribute */ 2420 typedef struct hiISP_IRIS_ATTR_S { 2421 HI_BOOL bEnable; /* RW;iris enable/disable */ 2422 ISP_OP_TYPE_E enOpType; /* auto iris or manual iris */ 2423 ISP_IRIS_TYPE_E enIrisType; /* DC-iris or P-iris */ 2424 ISP_IRIS_STATUS_E enIrisStatus; /* RW; status of Iris */ 2425 ISP_MI_ATTR_S stMIAttr; 2426 } ISP_IRIS_ATTR_S; 2427 2428 2429 /* AE structs */ 2430 /* 2431 Defines the AE mode 2432 0 = Automatic frame rate reduction mode (slow shutter mode) 2433 1 = Constant frame rate mode 2434 */ 2435 typedef enum hiISP_AE_MODE_E { 2436 AE_MODE_SLOW_SHUTTER = 0, 2437 AE_MODE_FIX_FRAME_RATE = 1, 2438 AE_MODE_BUTT 2439 } ISP_AE_MODE_E; 2440 /* 2441 Defines the AE exposure policy mode 2442 0 = Highlight first exposure mode 2443 1 = Lowlight first exposure mode 2444 */ 2445 typedef enum hiISP_AE_STRATEGY_E { 2446 AE_EXP_HIGHLIGHT_PRIOR = 0, 2447 AE_EXP_LOWLIGHT_PRIOR = 1, 2448 AE_STRATEGY_MODE_BUTT 2449 } ISP_AE_STRATEGY_E; 2450 /* Defines the maximum exposure time or gain and minimum exposure time or gain */ 2451 typedef struct hiISP_AE_RANGE_S { 2452 HI_U32 u32Max; /* RW;Range:[0,0xFFFFFFFF];Format:32.0;Maximum value */ 2453 HI_U32 u32Min; /* RW;Range:[0,0xFFFFFFFF];Format:32.0;limited Range:[0,u32Max],Minimum value */ 2454 } ISP_AE_RANGE_S; 2455 2456 /* Defines the ISP exposure delay attribute */ 2457 typedef struct hiISP_AE_DELAY_S { 2458 HI_U16 u16BlackDelayFrame; /* RW; Range:[0, 65535]; Format:16.0; AE black delay frame count */ 2459 HI_U16 u16WhiteDelayFrame; /* RW; Range:[0, 65535]; Format:16.0; AE white delay frame count */ 2460 } ISP_AE_DELAY_S; 2461 2462 /* 2463 Defines the anti-flicker mode. 2464 0 = The epxosure time is fixed to be the multiplies of 1/(2*frequency) sec, 2465 it may lead to over exposure in the high-luminance environments. 2466 1 = The anti flicker may be closed to avoid over exposure in the high-luminance environments. 2467 */ 2468 typedef enum hiISP_ANTIFLICKER_MODE_E { 2469 ISP_ANTIFLICKER_NORMAL_MODE = 0x0, 2470 ISP_ANTIFLICKER_AUTO_MODE = 0x1, 2471 ISP_ANTIFLICKER_MODE_BUTT 2472 } ISP_ANTIFLICKER_MODE_E; 2473 2474 /* Defines the anti-flicker attribute */ 2475 typedef struct hiISP_ANTIFLICKER_S { 2476 HI_BOOL bEnable; /* RW; Range:[0, 1]; Format:1.0; */ 2477 HI_U8 u8Frequency; /* RW; Range:[0, 255]; Format:8.0; 2478 usually this value is 50 or 60 which is the frequency of the AC power supply */ 2479 ISP_ANTIFLICKER_MODE_E enMode; 2480 } ISP_ANTIFLICKER_S; 2481 2482 typedef struct hiISP_SUBFLICKER_S { 2483 HI_BOOL bEnable; /* RW; Range:[0, 1]; Format:1.0; */ 2484 2485 HI_U8 u8LumaDiff; /* RW; Range:[0, 100]; Format:8.0; if subflicker mode enable, current luma is less than AE 2486 compensation plus LumaDiff, AE will keep min antiflicker shutter time 2487 (for example: 1/100s or 1/120s) to avoid flicker. while current luma is larger than AE 2488 compensation plus the LumaDiff, AE will reduce shutter time to avoid over-exposure and 2489 introduce flicker in the pircture */ 2490 } ISP_SUBFLICKER_S; 2491 2492 /* 2493 * Defines the ISP FSWDR operating mode 2494 * 0 = Normal FSWDR mode 2495 * 1 = Long frame mode, only effective in LINE_WDR, 2496 * when running in this mode FSWDR module only output the long frame data 2497 */ 2498 typedef enum hiISP_FSWDR_MODE_E { 2499 ISP_FSWDR_NORMAL_MODE = 0x0, 2500 ISP_FSWDR_LONG_FRAME_MODE = 0x1, 2501 ISP_FSWDR_AUTO_LONG_FRAME_MODE = 0x2, /* Auto long frame mode, only effective in LINE_WDR, When running in this 2502 mode, normal WDR and long frame mode would auto switch */ 2503 ISP_FSWDR_MODE_BUTT 2504 } ISP_FSWDR_MODE_E; 2505 2506 typedef struct hiISP_AE_ATTR_S { 2507 /* base parameter */ 2508 ISP_AE_RANGE_S stExpTimeRange; /* RW; Range:[0x0, 0xFFFFFFFF]; Format:32.0; sensor exposure time (unit: us), 2509 it's related to the specific sensor */ 2510 ISP_AE_RANGE_S stAGainRange; /* RW; Range:[0x400, 0xFFFFFFFF]; Format:22.10; 2511 sensor analog gain (unit: times, 10bit precision), it's related to the 2512 specific sensor */ 2513 ISP_AE_RANGE_S stDGainRange; /* RW; Range:[0x400, 0xFFFFFFFF]; Format:22.10; 2514 sensor digital gain (unit: times, 10bit precision), it's related to the 2515 specific sensor */ 2516 ISP_AE_RANGE_S stISPDGainRange; /* RW; Range:[0x400, 0x40000]; Format:22.10; 2517 ISP digital gain (unit: times, 10bit precision), it's related to the 2518 ISP digital gain range */ 2519 ISP_AE_RANGE_S stSysGainRange; /* RW; Range:[0x400, 0xFFFFFFFF]; Format:22.10; 2520 system gain (unit: times, 10bit precision), it's related to the specific 2521 sensor and ISP Dgain range */ 2522 HI_U32 u32GainThreshold; /* RW; Range:[0x400, 0xFFFFFFFF]; Format:22.10; 2523 Gain threshold for slow shutter mode (unit: times, 10bit precision) */ 2524 2525 HI_U8 u8Speed; /* RW; Range:[0x0, 0xFF]; Format:8.0; 2526 AE adjust step for dark scene to bright scene switch */ 2527 HI_U16 u16BlackSpeedBias; /* RW; Range:[0x0, 0xFFFF]; Format:16.0; 2528 AE adjust step bias for bright scene to dark scene switch */ 2529 HI_U8 u8Tolerance; /* RW; Range:[0x0, 0xFF]; Format:8.0; AE adjust tolerance */ 2530 HI_U8 u8Compensation; /* RW; Range:[0x0, 0xFF]; Format:8.0; AE compensation */ 2531 HI_U16 u16EVBias; /* RW; Range:[0x0, 0xFFFF]; Format:16.0; AE EV bias */ 2532 ISP_AE_STRATEGY_E enAEStrategyMode; /* RW; Range:[0, 1]; Format:1.0; Support Highlight prior or Lowlight prior */ 2533 HI_U16 u16HistRatioSlope; /* RW; Range:[0x0, 0xFFFF]; Format:16.0; AE hist ratio slope */ 2534 HI_U8 u8MaxHistOffset; /* RW; Range:[0x0, 0xFF]; Format:8.0; Max hist offset */ 2535 2536 ISP_AE_MODE_E enAEMode; /* RW; Range:[0, 1]; Format:1.0; AE mode(slow shutter/fix framerate)(onvif) */ 2537 ISP_ANTIFLICKER_S stAntiflicker; 2538 ISP_SUBFLICKER_S stSubflicker; 2539 ISP_AE_DELAY_S stAEDelayAttr; 2540 2541 HI_BOOL bManualExpValue; /* RW; Range:[0, 1]; Format:1.0; manual exposure value or not */ 2542 HI_U32 u32ExpValue; /* RW; Range:(0x0, 0xFFFFFFFF]; Format:32.0; manual exposure value */ 2543 2544 ISP_FSWDR_MODE_E enFSWDRMode; /* RW; Range:[0, 2]; Format:2.0; FSWDR running mode */ 2545 HI_BOOL bWDRQuick; /* RW; Range:[0, 1]; Format:1.0; WDR use delay strategy or not; 2546 If is true, WDR AE adjust will be faster */ 2547 2548 HI_U16 u16ISOCalCoef; /* RW; Range:[0x0, 0xFFFF]; Format:8.8; 2549 The coefficient between Standard ISO and origin ISO (unit: times, 8bit precision) */ 2550 } ISP_AE_ATTR_S; 2551 2552 typedef struct hiISP_ME_ATTR_S { 2553 ISP_OP_TYPE_E enExpTimeOpType; 2554 ISP_OP_TYPE_E enAGainOpType; 2555 ISP_OP_TYPE_E enDGainOpType; 2556 ISP_OP_TYPE_E enISPDGainOpType; 2557 2558 HI_U32 u32ExpTime; /* RW; Range:[0x0, 0xFFFFFFFF]; Format:32.0; 2559 sensor exposure time (unit: us), it's related to the specific sensor */ 2560 HI_U32 u32AGain; /* RW; Range:[0x400, 0xFFFFFFFF]; Format:22.10; 2561 sensor analog gain (unit: times, 10bit precision), it's related to the specific sensor */ 2562 HI_U32 u32DGain; /* RW; Range:[0x400, 0xFFFFFFFF]; Format:22.10; 2563 sensor digital gain (unit: times, 10bit precision), it's related to the specific sensor */ 2564 HI_U32 u32ISPDGain; /* RW; Range:[0x400, 0x40000]; Format:22.10; ISP digital gain (unit: times, 10bit precision), 2565 it's related to the ISP digital gain range */ 2566 } ISP_ME_ATTR_S; 2567 2568 typedef struct hiISP_EXPOSURE_ATTR_S { 2569 HI_BOOL bByPass; /* RW; Range:[0, 1]; Format:1.0; */ 2570 ISP_OP_TYPE_E enOpType; 2571 HI_U8 u8AERunInterval; /* RW; Range:[0x1, 0xFF]; Format:8.0; set the AE run interval */ 2572 HI_BOOL bHistStatAdjust; /* RW; Range:[0, 1]; Format:1.0; 2573 HI_TRUE: 256 bin histogram statistic config will adjust 2574 when large red or blue area detected. 2575 HI_FALSE: 256 bin histogram statistic config will not change */ 2576 HI_BOOL bAERouteExValid; /* RW; Range:[0, 1]; Format:1.0; use extend AE route or not */ 2577 ISP_ME_ATTR_S stManual; 2578 ISP_AE_ATTR_S stAuto; 2579 ISP_PRIOR_FRAME_E enPriorFrame; /* RW; Range:[0, 3]; Format:1.0; AE prior frame */ 2580 HI_BOOL bAEGainSepCfg; /* RW; Range:[0, 1]; Format:1.0; long and short frame gain separately configure or not */ 2581 HI_BOOL bAdvanceAE; /* RW; Range:[0, 1]; Format:1.0; open advance AE or not */ 2582 } ISP_EXPOSURE_ATTR_S; 2583 2584 #define ISP_AE_ROUTE_MAX_NODES 16 2585 typedef struct hiISP_AE_ROUTE_NODE_S { 2586 HI_U32 u32IntTime; /* RW; Range:(0x0, 0xFFFFFFFF]; Format:32.0; 2587 sensor exposure time (unit: us), it's related to the specific sensor */ 2588 HI_U32 u32SysGain; /* RW; Range:[0x400, 0xFFFFFFFF]; Format:22.10; 2589 system gain (unit: times, 10bit precision), it's related to the specific sensor and 2590 ISP Dgain range */ 2591 ISP_IRIS_F_NO_E enIrisFNO; /* RW; Range:[0, 10]; Format:4.0; 2592 the F number of the iris's aperture, only support for Piris */ 2593 HI_U32 u32IrisFNOLin; /* RW; Range:[0x1, 0x400]; Format:32.0; 2594 the equivalent gain of F number of the iris's aperture, only support for Piris */ 2595 } ISP_AE_ROUTE_NODE_S; 2596 2597 typedef struct hiISP_AE_ROUTE_S { 2598 HI_U32 u32TotalNum; /* RW; Range:[0, 0x10]; Format:8.0; total node number of AE route */ 2599 ISP_AE_ROUTE_NODE_S astRouteNode[ISP_AE_ROUTE_MAX_NODES]; 2600 } ISP_AE_ROUTE_S; 2601 2602 #define ISP_AE_ROUTE_EX_MAX_NODES 16 2603 typedef struct hiISP_AE_ROUTE_EX_NODE_S { 2604 HI_U32 u32IntTime; /* RW; Range:(0x0, 0xFFFFFFFF]; Format:32.0; 2605 sensor exposure time (unit: us), it's related to the specific sensor */ 2606 HI_U32 u32Again; /* RW; Range:[0x400, 0x3FFFFF]; Format:22.10; 2607 sensor analog gain (unit: times, 10bit precision), it's related to the specific sensor */ 2608 HI_U32 u32Dgain; /* RW; Range:[0x400, 0x3FFFFF]; Format:22.10; 2609 sensor digital gain (unit: times, 10bit precision), it's related to the specific sensor */ 2610 HI_U32 u32IspDgain; /* RW; Range:[0x400, 0x40000]; Format:22.10; 2611 ISP digital gain (unit: times, 10bit precision) */ 2612 ISP_IRIS_F_NO_E enIrisFNO; /* RW; Range:[0, 10]; Format:4.0; 2613 the F number of the iris's aperture, only support for Piris */ 2614 HI_U32 u32IrisFNOLin; /* RW; Range:[0x1, 0x400]; Format:32.0; 2615 the equivalent gain of F number of the iris's aperture, only support for Piris */ 2616 } ISP_AE_ROUTE_EX_NODE_S; 2617 2618 typedef struct hiISP_AE_ROUTE_EX_S { 2619 HI_U32 u32TotalNum; /* RW; Range:[0, 0x10]; Format:8.0; total node number of extend AE route */ 2620 ISP_AE_ROUTE_EX_NODE_S astRouteExNode[ISP_AE_ROUTE_EX_MAX_NODES]; 2621 } ISP_AE_ROUTE_EX_S; 2622 2623 typedef struct hiISP_EXP_INFO_S { 2624 HI_U32 u32ExpTime; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; */ 2625 HI_U32 u32ShortExpTime; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; */ 2626 HI_U32 u32MedianExpTime; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; */ 2627 HI_U32 u32LongExpTime; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; */ 2628 HI_U32 u32AGain; /* R; Range:[0x400, 0xFFFFFFFF]; Format:22.10; */ 2629 HI_U32 u32DGain; /* R; Range:[0x400, 0xFFFFFFFF]; Format:22.10; */ 2630 HI_U32 u32AGainSF; /* R; Range:[0x400, 0xFFFFFFFF]; Format:22.10; */ 2631 HI_U32 u32DGainSF; /* R; Range:[0x400, 0xFFFFFFFF]; Format:22.10; */ 2632 HI_U32 u32ISPDGain; /* R; Range:[0x400, 0xFFFFFFFF]; Format:22.10; */ 2633 HI_U32 u32Exposure; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; */ 2634 HI_BOOL bExposureIsMAX; /* R; Range:[0, 1]; Format:1.0; */ 2635 HI_S16 s16HistError; /* R; Range:[-32768, 32767]; Format:16.0; */ 2636 HI_U32 au32AE_Hist1024Value[HIST_NUM]; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; 2637 1024 bins histogram for channel 1 */ 2638 2639 HI_U8 u8AveLum; /* R; Range:[0x0, 0xFF]; Format:8.0; */ 2640 HI_U32 u32LinesPer500ms; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; exposure lines per 500ms */ 2641 HI_U32 u32PirisFNO; /* R; Range:[0x0, 0x400]; Format:32.0; */ 2642 HI_U32 u32Fps; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; actual fps */ 2643 HI_U32 u32ISO; /* R; Range:[0x64, 0xFFFFFFFF]; Format:32.0; */ 2644 HI_U32 u32ISOSF; /* R; Range:[0x64, 0xFFFFFFFF]; Format:32.0; */ 2645 HI_U32 u32ISOCalibrate; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; */ 2646 HI_U32 u32RefExpRatio; /* R; Range:[0x40, 0x4000]; Format:26.6; */ 2647 HI_U16 u16WdrExpCoef; /* R; Range:[0x0, 0x400]; Format:6.10; 0x400 means 1 times */ 2648 HI_U32 u32FirstStableTime; /* R; Range:[0x0, 0xFFFFFFFF]; Format:32.0; AE first stable time for quick start */ 2649 HI_U32 u32QuickStarISO; /* R; Range:[0x64, 0xFFFFFFFF]; Format:32.0; */ 2650 ISP_AE_ROUTE_S stAERoute; /* R; Actual AE route */ 2651 ISP_AE_ROUTE_EX_S stAERouteEx; /* R; Actual AE route_ex */ 2652 ISP_AE_ROUTE_S stAERouteSF; /* R; Actual AE route_sf */ 2653 ISP_AE_ROUTE_EX_S stAERouteSFEx; /* R; Actual AE route_sf_ex */ 2654 } ISP_EXP_INFO_S; 2655 2656 typedef struct { 2657 HI_U32 u32RegAddr; 2658 HI_U32 u32RegValue; 2659 } ISP_EXP_PARAM_REG; 2660 2661 typedef struct { 2662 HI_U32 u32TarFps; 2663 HI_U32 u32TarIspDgain; /* 10bit */ 2664 ISP_EXP_PARAM_REG stTimeReg[10]; /* 10 */ 2665 ISP_EXP_PARAM_REG stAgainReg[10]; /* 10 */ 2666 ISP_EXP_PARAM_REG stDgainReg[10]; /* 10 */ 2667 } ISP_EXP_CONVERT_PARAM; 2668 2669 #define EXP_RATIO_NUM 3 2670 typedef struct hiISP_WDR_EXPOSURE_ATTR_S { 2671 ISP_OP_TYPE_E enExpRatioType; /* RW; Range:[0, 1]; Format:1.0; 2672 OP_TYPE_AUTO: The ExpRatio used in ISP is generated by firmware; 2673 OP_TYPE_MANUAL: The ExpRatio used in ISP is set by u32ExpRatio */ 2674 HI_U32 au32ExpRatio[EXP_RATIO_NUM]; /* RW; Range:[0x40, 0xFFF]; Format:26.6; 0x40 means 1 times. 2675 When enExpRatioType is OP_TYPE_AUTO, u32ExpRatio is invalid. 2676 When enExpRatioType is OP_TYPE_MANUAL, u32ExpRatio is quotient of 2677 long exposure time / short exposure time. */ 2678 HI_U32 u32ExpRatioMax; /* RW; Range:[0x40, 0x4000]; Format:26.6; 0x40 means 1 times. 2679 When enExpRatioType is OP_TYPE_AUTO, u32ExpRatioMax is max(upper limit) of ExpRatio 2680 generated by firmware. 2681 When enExpRatioType is OP_TYPE_MANUAL, u32ExpRatioMax is invalid. */ 2682 HI_U32 u32ExpRatioMin; /* RW; Range:[0x40, 0x4000]; Format:26.6; limited Range:[0x40, u32ExpRatioMax], 2683 0x40 means 1 times. 2684 When enExpRatioType is OP_TYPE_AUTO, u32ExpRatioMin is min(lower limit) of ExpRatio 2685 generated by firmware. 2686 When enExpRatioType is OP_TYPE_MANUAL, u32ExpRatioMin is invalid. */ 2687 HI_U16 u16Tolerance; /* RW; Range:[0x0, 0xFF]; Format:8.0;et the dynamic range tolerance. 2688 Format: unsigned 6.2-bit fixed-point. 0x4 means 1dB. */ 2689 HI_U16 u16Speed; /* RW; Range:[0x0, 0xFF]; Format:8.0; exposure ratio adjust speed */ 2690 HI_U16 u16RatioBias; /* RW; Range:[0x0, 0xFFFF]; Format:16.0; exposure ratio bias */ 2691 HI_U16 u16HighLightTarget; /* RW; Range:[0x0, 0x400]; Format:10.0; the high light target. */ 2692 HI_U16 u16ExpCoefMin; /* RW; Range:[0x0, 0x400]; Format:16.0; min exposure cofficient */ 2693 } ISP_WDR_EXPOSURE_ATTR_S; 2694 2695 typedef struct hiISP_HDR_EXPOSURE_ATTR_S { 2696 ISP_OP_TYPE_E enExpHDRLvType; /* RW; Range:[0, 1]; Format:1.0; 2697 OP_TYPE_AUTO: The ExpHDRLv used in ISP is generated by firmware; 2698 OP_TYPE_MANUAL: The ExpHDRLv used in ISP is set by u32ExpHDRLv */ 2699 HI_U32 u32ExpHDRLv; /* RW; Range:[0x40, 0x400]; Format:26.6; 0x40 means 1 times. 2700 When enExpHDRLvType is OP_TYPE_AUTO, u32ExpHDRLv is invalid. 2701 When enExpHDRLvType is OP_TYPE_MANUAL, u32ExpHDRLv is the quotient of 2702 exposure / linear exposure. */ 2703 HI_U32 u32ExpHDRLvMax; /* RW; Range:[0x40, 0x400]; Format:26.6; 0x40 means 1 times. 2704 When enExpHDRLvType is OP_TYPE_AUTO, u32ExpHDRLvMax is max(upper limit) of 2705 ExpHDRLv generated by firmware. 2706 When enExpHDRLvType is OP_TYPE_MANUAL, u32ExpHDRLvMax is invalid. */ 2707 HI_U32 u32ExpHDRLvMin; /* RW; Range:[0x40, 0x400]; Format:26.6; limited range:[0x40, u32ExpHDRLvMax], 2708 0x40 means 1 times. 2709 When enExpHDRLvType is OP_TYPE_AUTO, u32ExpHDRLvMin is min(lower limit) of 2710 ExpHDRLv generated by firmware. 2711 When enExpHDRLvType is OP_TYPE_MANUAL, u32ExpHDRLvMin is invalid. */ 2712 HI_U32 u32ExpHDRLvWeight; /* RW; Range:[0x0, 0x400]; Format:16.0; exposure HDR level weight. */ 2713 } ISP_HDR_EXPOSURE_ATTR_S; 2714 2715 typedef struct hiISP_SMART_EXPOSURE_ATTR_S { 2716 HI_BOOL bEnable; /* RW; Range:[0, 1]; Format:1.0; smart ae enable or not */ 2717 HI_BOOL bIRMode; /* RW; Range:[0, 1]; Format:1.0; smart ae IR mode or not */ 2718 ISP_OP_TYPE_E enSmartExpType; /* RW; Range:[0, 1]; Format:1.0; 2719 OP_TYPE_AUTO: The ExpCoef used in ISP is generated by firmware; 2720 OP_TYPE_MANUAL: The ExpCoef used in ISP is set by u32ExpCoef */ 2721 HI_U16 u16ExpCoef; /* RW; Range:[0x0, 0xFFFF]; Format:6.10; 0x400 means 1 times. 2722 When enExpHDRLvType is OP_TYPE_AUTO, u32ExpCoef is invalid. 2723 When enExpHDRLvType is OP_TYPE_MANUAL, u32ExpCoef is the quotient of exposure. */ 2724 HI_U8 u8LumaTarget; /* RW; Range:[0x0, 0xFF]; Format:8.0; luma target of smart ae. */ 2725 HI_U16 u16ExpCoefMax; /* RW; Range:[0x0, 0xFFFF]; Format:6.10; 0x400 means 1 times. 2726 When enExpHDRLvType is OP_TYPE_AUTO, u32ExpCoefvMax is max(upper limit) of ExpCoef 2727 generated by firmware. 2728 When enExpHDRLvType is OP_TYPE_MANUAL, u32ExpCoefMax is invalid. */ 2729 HI_U16 u16ExpCoefMin; /* RW; Range:[0x0, 0xFFFF]; Format:6.10; 0x400 means 1 times. 2730 When enExpHDRLvType is OP_TYPE_AUTO, u32ExpCoefMax is min(lower limit) of ExpCoef 2731 generated by firmware. 2732 When enExpHDRLvType is OP_TYPE_MANUAL, u32ExpCoefMin is invalid. */ 2733 HI_U8 u8SmartInterval; /* RW; Range:[0x1, 0xFF]; Format:8.0; smart ae run interval */ 2734 HI_U8 u8SmartSpeed; /* RW; Range:[0x0, 0xFF]; Format:8.0; smart ae adjust step */ 2735 HI_U16 u16SmartDelayNum; /* RW; Range:[0x0, 0x400]; Format:16.0; smart ae adjust delay frame num */ 2736 } ISP_SMART_EXPOSURE_ATTR_S; 2737 2738 /* AWB structs */ 2739 /* 2740 Defines the AWB online calibration type 2741 u16AvgRgain: the avg value of Rgain after online calibration 2742 u16AvgBgain: the avg value of Bgain after online calibration 2743 */ 2744 typedef struct hiISP_AWB_Calibration_Gain_S { 2745 HI_U16 u16AvgRgain; 2746 HI_U16 u16AvgBgain; 2747 } ISP_AWB_Calibration_Gain_S; 2748 /* 2749 Defines the AWB algorithm type 2750 0 = Improved gray world algorithm. 2751 1 = AWB algorithm that classifies the statistics and re-filters the white blocks 2752 */ 2753 typedef enum hiISP_AWB_ALG_TYPE_E { 2754 AWB_ALG_LOWCOST = 0, 2755 AWB_ALG_ADVANCE = 1, 2756 AWB_ALG_BUTT 2757 } ISP_AWB_ALG_TYPE_E; 2758 2759 /* 2760 Defines the AWB policy in the multi-illuminant scenario 2761 0 = Automatic saturation adjustment in the multi-illuminant scenario 2762 1 = Automatic ccm adjustment in the multi-illuminant scenario 2763 */ 2764 typedef enum hiISP_AWB_MULTI_LS_TYPE_E { 2765 AWB_MULTI_LS_SAT = 0, 2766 AWB_MULTI_LS_CCM = 1, 2767 AWB_MULTI_LS_BUTT 2768 } ISP_AWB_MULTI_LS_TYPE_E; 2769 2770 typedef enum hiISP_AWB_INDOOR_OUTDOOR_STATUS_E { 2771 AWB_INDOOR_MODE = 0, 2772 AWB_OUTDOOR_MODE = 1, 2773 AWB_INDOOR_OUTDOOR_BUTT 2774 } ISP_AWB_INDOOR_OUTDOOR_STATUS_E; 2775 2776 /* Defines the AWB gain range */ 2777 typedef struct hiISP_AWB_CT_LIMIT_ATTR_S { 2778 HI_BOOL bEnable; 2779 ISP_OP_TYPE_E enOpType; 2780 2781 HI_U16 u16HighRgLimit; /* RW; Range:[0x0, 0xFFF]; Format:4.8; 2782 in Manual Mode, user define the Max Rgain of High Color Temperature */ 2783 HI_U16 u16HighBgLimit; /* RW; Range:[0x0, 0xFFF]; Format:4.8; 2784 in Manual Mode, user define the Min Bgain of High Color Temperature */ 2785 HI_U16 u16LowRgLimit; /* RW; Range:[0x0, 0xFFF]; Format:4.8; limited range:[0x0, u16HighRgLimit), 2786 in Manual Mode, user define the Min Rgain of Low Color Temperature */ 2787 HI_U16 u16LowBgLimit; /* RW; Range:[0, 0xFFF]; Format:4.8; limited Range:(u16HighBgLimit, 0xFFF], 2788 in Manual Mode, user define the Max Bgain of Low Color Temperature */ 2789 } ISP_AWB_CT_LIMIT_ATTR_S; 2790 2791 typedef struct hiISP_AWB_IN_OUT_ATTR_S { 2792 HI_BOOL bEnable; /* RW; Range:[0, 1]; Format:1.0; 2793 Outdoor/Indoor scenario determination enable */ 2794 ISP_OP_TYPE_E enOpType; 2795 ISP_AWB_INDOOR_OUTDOOR_STATUS_E enOutdoorStatus; /* RW;User should config indoor or outdoor status in Manual Mode */ 2796 HI_U32 u32OutThresh; /* RW;Format:32.0;shutter time(in us) to judge indoor or outdoor */ 2797 HI_U16 u16LowStart; /* RW;Format:16.0;5000K is recommend */ 2798 HI_U16 u16LowStop; /* RW;Format:16.0;limited range:(0, u16LowStart), 2799 4500K is recommend, should be smaller than u8LowStart */ 2800 HI_U16 u16HighStart; /* RW;Format:16.0;limited range:(u16LowStart, 0xFFFF], 2801 6500K is recommend, shoule be larger than u8LowStart */ 2802 HI_U16 u16HighStop; /* RW;Format:16.0;limited range:(u16HighStart, 0xFFFF], 2803 8000K is recommend, should be larger than u8HighStart */ 2804 HI_BOOL bGreenEnhanceEn; /* RW; Range:[0, 1]; Format:1.0; 2805 If this is enabled, Green channel will be enhanced based on the ratio of green plant */ 2806 HI_U8 u8OutShiftLimit; /* RW; Range:[0, 0xFF]; Format:8.0;Max white point zone distance to Planckian Curve */ 2807 } ISP_AWB_IN_OUT_ATTR_S; 2808 2809 typedef struct hiISP_AWB_CBCR_TRACK_ATTR_S { 2810 HI_BOOL bEnable; /* RW; Range:[0, 1]; Format:1.0; 2811 If enabled, statistic parameter cr, cb will change according to iso */ 2812 2813 HI_U16 au16CrMax[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range:[0x0, 0xFFF]; au16CrMax[i] >= au16CrMin[i] */ 2814 HI_U16 au16CrMin[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range:[0x0, 0xFFF] */ 2815 HI_U16 au16CbMax[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range:[0x0, 0xFFF]; au16CbMax[i] >= au16CbMin[i] */ 2816 HI_U16 au16CbMin[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range:[0x0, 0xFFF] */ 2817 } ISP_AWB_CBCR_TRACK_ATTR_S; 2818 2819 #define AWB_LUM_HIST_NUM 6 2820 /* Defines the parameters of the luminance histogram statistics for white balance */ 2821 typedef struct hiISP_AWB_LUM_HISTGRAM_ATTR_S { 2822 HI_BOOL bEnable; /* RW; Range:[0, 1]; Format:1.0; If enabled, zone weight to awb is combined with zone luma */ 2823 ISP_OP_TYPE_E enOpType; /* In auto mode, the weight distribution follows Gaussian distribution */ 2824 HI_U8 au8HistThresh[AWB_LUM_HIST_NUM]; /* RW; Range:[0x0, 0xFF]; Format:8.0; 2825 In manual mode, user define luma thresh, thresh[0] is 0, 2826 thresh[5] is 0xFF, thresh[i] greater or equal to thresh[i-1] */ 2827 HI_U16 au16HistWt[AWB_LUM_HIST_NUM]; /* RW; Range:[0x0, 0xFFFF]; Format:16.0; 2828 user can define luma weight in both manual and auto mode. */ 2829 } ISP_AWB_LUM_HISTGRAM_ATTR_S; 2830 2831 /* Defines the information about a separate illuminant */ 2832 typedef struct hiISP_AWB_LIGHTSOURCE_INFO_S { 2833 HI_U16 u16WhiteRgain; /* RW;Range:[0x0, 0xFFF]; Format:4.8; G/R of White points at this light source */ 2834 HI_U16 u16WhiteBgain; /* RW;Range:[0x0, 0xFFF]; Format:4.8; G/B of White points at this light source */ 2835 HI_U16 u16ExpQuant; /* RW;shutter time * again * dgain >> 4, Not support Now */ 2836 HI_U8 u8LightStatus; /* RW;Range:[0,2]; Format:2.0; idle 1:add light source 2:delete sensitive color */ 2837 HI_U8 u8Radius; /* RW;Range:[0x0, 0xFF]; Format:8.0; Radius of light source, */ 2838 } ISP_AWB_EXTRA_LIGHTSOURCE_INFO_S; 2839 2840 #define AWB_LS_NUM 4 2841 #define AWB_MULTI_CT_NUM 8 2842 /* extended AWB attributes */ 2843 typedef struct hiISP_AWB_ATTR_EX_S { 2844 HI_U8 u8Tolerance; /* RW; Range:[0x0, 0xFF]; Format:8.0; AWB adjust tolerance */ 2845 HI_U8 u8ZoneRadius; /* RW; Range:[0x0, 0xFF]; Format:8.0; radius of AWB blocks */ 2846 HI_U16 u16CurveLLimit; /* RW; Range:[0x0, 0x100]; Format:9.0; Left limit of AWB Curve, 2847 recomend for indoor 0xE0, outdoor 0xE0 */ 2848 HI_U16 u16CurveRLimit; /* RW; Range:[0x100, 0xFFF]; Format:12.0; Right Limit of AWB Curve, 2849 recomend for indoor 0x130, outdoor 0x120 */ 2850 2851 HI_BOOL bExtraLightEn; /* RW; Range:[0, 1]; Format:1.0; Enable special light source function */ 2852 ISP_AWB_EXTRA_LIGHTSOURCE_INFO_S stLightInfo[AWB_LS_NUM]; 2853 ISP_AWB_IN_OUT_ATTR_S stInOrOut; 2854 2855 HI_BOOL bMultiLightSourceEn; /* RW; Range:[0, 1]; Format:1.0; If enabled, awb will do special process 2856 in multi light source enviroment */ 2857 ISP_AWB_MULTI_LS_TYPE_E enMultiLSType; /* Saturation or CCM Tunning */ 2858 HI_U16 u16MultiLSScaler; /* RW; Range:[0x0, 0x100]; Format:12.0; 2859 In saturation type, it means the max saturation it can achieve, 2860 in ccm type, it means the strenght of multi process. */ 2861 HI_U16 au16MultiCTBin[AWB_MULTI_CT_NUM]; /* RW; Range:[0, 0XFFFF]; Format:16.0; 2862 AWB Support divide the color temperature range by 8 bins */ 2863 HI_U16 au16MultiCTWt[AWB_MULTI_CT_NUM]; /* RW; Range:[0x0, 0x400];Weight for different color temperature, 2864 same value of 8 means CT weight does't work, */ 2865 2866 HI_BOOL bFineTunEn; /* RW; Range:[0x0, 0x1]; Format:1.0;If enabled, skin color scene will be optimized */ 2867 HI_U8 u8FineTunStrength; /* RW; Range:[0x0, 0xFF]; Format:8.0; 2868 larger value means better performance of skin color scene, 2869 but will increase error probability in low color temperature scene */ 2870 } ISP_AWB_ATTR_EX_S; 2871 2872 #define AWB_CURVE_PARA_NUM 6 2873 typedef struct hiISP_AWB_ATTR_S { 2874 HI_BOOL bEnable; /* RW; Range:[0x0, 0x1]; Format:1.0;If AWB is disabled, static wb gain will be used, 2875 otherwise auto wb gain will be used */ 2876 2877 HI_U16 u16RefColorTemp; /* RW; Range:[0x0, 0xFFFF]; Format:16.0; Calibration Information */ 2878 HI_U16 au16StaticWB[ISP_BAYER_CHN_NUM]; /* RW; Range:[0x0, 0xFFF]; Format:12.0;Calibration Information */ 2879 HI_S32 as32CurvePara[AWB_CURVE_PARA_NUM]; /* RW; Format:32.0;Calibration Information, 2880 limited Range:as32CurvePara[3] != 0, as32CurvePara[4]==128 */ 2881 2882 ISP_AWB_ALG_TYPE_E enAlgType; 2883 2884 HI_U8 u8RGStrength; /* RW; Range: [0x0, 0xFF]; Format:8.0; AWB Strength of R Channel */ 2885 HI_U8 u8BGStrength; /* RW; Range: [0x0, 0xFF]; Format:8.0; AWB Strength of B Channel */ 2886 HI_U16 u16Speed; /* RW; Range: [0x0, 0xFFF]; Format:12.0; Convergence speed of AWB */ 2887 HI_U16 u16ZoneSel; /* RW; Range: [0, 255]; Format:8.0; A value of 0 or 0xFF means global AWB, 2888 A value between 0 and 0xFF means zoned AWB */ 2889 HI_U16 u16HighColorTemp; /* RW; Range: [0, 65535]; Format:16.0; AWB max temperature, Recommended: [8500, 10000] */ 2890 HI_U16 u16LowColorTemp; /* RW; Range: [0, 65535]; Format:16.0; Limited Range:[0, u16HighColorTemp), 2891 AWB min temperature, Recommended: [2000, 2500] */ 2892 ISP_AWB_CT_LIMIT_ATTR_S stCTLimit; 2893 HI_BOOL bShiftLimitEn; /* RW; Range: [0, 1]; Format:1.0; If enabled, when the statistic information is out of 2894 range, it should be project back */ 2895 HI_U8 u8ShiftLimit; /* RW; Range: [0x0, 0xFF]; Format:8.0; planckian curve range, Recommended: [0x30, 0x50] */ 2896 HI_BOOL bGainNormEn; /* RW; Range: [0, 1]; Format:1.0; if enabled, the min of RGB gain is fixed. */ 2897 HI_BOOL bNaturalCastEn; /* RW, Range: [0, 1]; Format:1.0; if enabled, the color performance will be natural in 2898 lowlight and low color temperature */ 2899 2900 ISP_AWB_CBCR_TRACK_ATTR_S stCbCrTrack; 2901 ISP_AWB_LUM_HISTGRAM_ATTR_S stLumaHist; 2902 HI_BOOL bAWBZoneWtEn; /* RW, Range: [0, 1]; Format:1.0; if enabled, user can set weight for each zones */ 2903 HI_U8 au8ZoneWt[(AWB_ZONE_ORIG_ROW) * (AWB_ZONE_ORIG_COLUMN)]; /* RW; Range: [0, 255]; Format:8.0;Zone Wt Table */ 2904 } ISP_AWB_ATTR_S; 2905 2906 /* Attr for SPC AWB */ 2907 #define SPECAWB_FACTTBL_ELMNUM 7 /* Table number. */ 2908 #define SPECAWB_FACTTBL_SIZE 64 /* Table size for weight for light source detection. */ 2909 #define SPECAWB_BBL_SIZE 40 /* Table size for BlackBodyTable. */ 2910 2911 typedef struct hiISP_SPECAWB_BBL_TBL_S { 2912 HI_S16 s16Kelvin; /* RW;Range:[-32768, 32767];Kelvin */ 2913 HI_S16 s16Wbr; /* RW;Range:[-32768, 32767];WBR value */ 2914 HI_S16 s16Wbb; /* RW;Range:[-32768, 32767];WBB value */ 2915 } ISP_SPECAWB_BBL_TBL_S; 2916 2917 typedef struct hiISP_SPECAWB_KELVIN_DBB_MAP_S { 2918 HI_S16 s16Kelvin; /* RW;Range:[-32768, 32767];kevin */ 2919 HI_S16 s16DBB; /* RW;Range:[-32768, 32767];DeltaBlackBody */ 2920 } ISP_SPECAWB_KELVIN_DBB_MAP_S; 2921 2922 typedef struct hiISP_SPECKCWB_S { 2923 HI_S32 s32RGain; /* RW;Range:[-2147483648, 2147483647]; RgainValue */ 2924 HI_S32 s32BGain; /* RW;Range:[-2147483648, 2147483647]; BgainValue */ 2925 } ISP_SPECKCWB_S; 2926 2927 typedef struct hiISP_SPECKCWBS16_S { 2928 HI_S16 s16RGain; /* RW;Range:[-32768, 32767]; RgainValue(16bit) */ 2929 HI_S16 s16BGain; /* RW;Range:[-32768, 32767]; BgainValue(16bit) */ 2930 } ISP_SPECKCWBS16_S; 2931 2932 typedef struct hiISP_SPECAWB_FACTTBL_ELEMENT_S { 2933 HI_S16 s16Bv; /* RW;Range:[-32768, 32767]; The center value of the Bv value targeted by this table. */ 2934 HI_U8 u8FactTbl[SPECAWB_FACTTBL_SIZE][SPECAWB_FACTTBL_SIZE]; /* RW;Range:[0, 0xFF]; 2935 Weight for light source detection. */ 2936 } ISP_SPECAWB_FACTTBL_ELEMENT_S; 2937 2938 typedef struct hiISP_SPECAWB_ATTR_S { 2939 ISP_SPECKCWB_S stWBCenter; /* RW;WB gain value at the center of the table: The table index is 2940 calculated as a relative value from this gain. */ 2941 ISP_SPECKCWB_S stWBMin; /* RW;Minimum value of WB gain that the table covers. */ 2942 ISP_SPECKCWB_S stWBMax; /* RW;Maximum value of WB gain that the table covers. */ 2943 ISP_SPECKCWB_S stLogFact; /* RW;Range covered by the table: 1/exp(stLogFact) to exp(stLogFact). 2944 For example, if it is 1.0, WBDelta will be 1/e to e. 2945 However, e = 2.71828 ... (base of natural logarithm) */ 2946 HI_S32 s32LimitFactMin; /* RW;Range:[0, s32LimitFactMax];AWB statics threshold value: 2947 minimum threshold value of ratio to pixel maximum value. */ 2948 HI_S32 s32LimitFactMax; /* RW;Range:[s32LimitFactMin, 0xFFFF];AWB statics threshold value: 2949 maximum threshold value of ratio to pixel maximum value. */ 2950 HI_S32 s32LimitFactLimit; /* RW;Range:[0x600, 0x4000]; AWB statics limit value: 2951 ratio to (pixel maximum value * s32LimitFactMax) */ 2952 HI_S32 s32FactOffset; /* RW;Range:[0, 0x800]; 2953 The offset value of the weight when calculating the AWB statics */ 2954 HI_S32 s32BFact; /* RW;Range:[0x399, 0x500]; 2955 The value of specular weight when calculating the AWB statics */ 2956 HI_S32 s32ACntMin; /* RW;Range:[0, 0x20];Threshold for block adoption. 2957 If the integrated value of the AWB statics is less than m_ACntMin, 2958 the block is ignored. */ 2959 ISP_SPECKCWB_S stWBNeutral; /* RW;WB gain returned when AWB calculation can not be performed */ 2960 HI_U8 bLastIsFlash; /* RW;Range:[1]: The last table is used for flash. 2961 0: Used for unknown Bv value. */ 2962 HI_S16 s16BvFlashELimit; /* RW;Range:[-32768, 32767];Threshold of Bv value before strobe lighting when 2963 using table for strobe. If bLastIsFlash == TRUE and the Bv value before 2964 strobe flash is less than this value, use the table for strobe. */ 2965 HI_S32 s32APercent; /* RW;Range:[0, 100];A value percent of the WB statics */ 2966 ISP_SPECKCWBS16_S stWBCnvTbl[SPECAWB_FACTTBL_SIZE][SPECAWB_FACTTBL_SIZE]; /* RW; WB gain conversion table 2967 (incomplete chromatic adaptation table) */ 2968 HI_U8 u8ElementNum; /* RW; Range:[7];Number of connected ISP_SPECAWB_FACTTBL_ELEMENT. */ 2969 ISP_SPECAWB_FACTTBL_ELEMENT_S stFactElement[SPECAWB_FACTTBL_ELMNUM]; /* RW; Weight Table */ 2970 ISP_SPECAWB_KELVIN_DBB_MAP_S stKelvinDBBTbl[SPECAWB_FACTTBL_SIZE][SPECAWB_FACTTBL_SIZE]; /* RW;KelvinDbb table. */ 2971 ISP_SPECAWB_BBL_TBL_S stBlackBodyTbl[SPECAWB_BBL_SIZE]; /* RW;BlackBody table. */ 2972 HI_U16 u16Fno; /* RW; Range:[10, 100];F number of the len,F1.4=14,F2.8=28,F36 =360... */ 2973 } ISP_SPECAWB_ATTR_S; 2974 2975 typedef struct hiISP_SPECAWB_CONTROL_ATTR_S { 2976 HI_S16 s16BlendHighBvThresh; /* RW; Range: [-32768, 32767]; High Bv threshold for inner blending function */ 2977 HI_U16 u16BlendHighBvWt; /* RW; Range: [0, 2048]; High Bv weight for inner blending function */ 2978 HI_S16 s16BlendLowBvThresh; /* RW; Range: [-32768, s16BlendHighBvThresh); 2979 Low Bv threshold for inner blending function */ 2980 HI_U16 u16BlendLowBvWt; /* RW; Range: [0, 2048]; Low Bv weight for inner blending function */ 2981 } ISP_SPECAWB_CONTROL_ATTR_S; 2982 2983 #define SPECAWB_MAX_CAA_NUM 3 2984 #define SPECAWB_KEVIN_CONVER_MAX_NUM 8 2985 2986 typedef struct hiISP_SPECAWB_CAA_CONVERSION_S { 2987 HI_S32 s32SrcKelvin; /* RW;Range:[-2147483648, 2147483647]; Source kelvin */ 2988 HI_S32 s32DstKelvin; /* RW;Range:[-2147483648, 2147483647]; Destination kelvin */ 2989 } ISP_SPECAWB_CAA_CONVERSION_S; 2990 typedef struct hiISP_SPECAWB_CAA_TBL_S { 2991 HI_U8 u8Enable; /* RW;Range:[0,1]; lut enable */ 2992 HI_S16 s16Bv; /* RW;Range:[-32768, 32767]; Bv value */ 2993 ISP_SPECAWB_CAA_CONVERSION_S stKelvinCon[SPECAWB_KEVIN_CONVER_MAX_NUM]; 2994 ISP_SPECKCWBS16_S stWBCnvTbl[SPECAWB_FACTTBL_SIZE][SPECAWB_FACTTBL_SIZE]; 2995 } ISP_SPECAWB_CAA_TBL_S; 2996 2997 typedef struct hiISP_SPECAWB_CAA_CONTROl_S { 2998 ISP_SPECAWB_CAA_TBL_S stControl[SPECAWB_MAX_CAA_NUM]; 2999 } ISP_SPECAWB_CAA_CONTROl_S; 3000 typedef struct hiISP_MWB_ATTR_S { 3001 HI_U16 u16Rgain; /* RW; Range: [0x0, 0xFFF]; Format:4.8; Multiplier for R color channel */ 3002 HI_U16 u16Grgain; /* RW; Range: [0x0, 0xFFF]; Format:4.8; Multiplier for Gr color channel */ 3003 HI_U16 u16Gbgain; /* RW; Range: [0x0, 0xFFF]; Format:4.8; Multiplier for Gb color channel */ 3004 HI_U16 u16Bgain; /* RW; Range: [0x0, 0xFFF]; Format:4.8; Multiplier for B color channel */ 3005 } ISP_MWB_ATTR_S; 3006 3007 typedef enum hiISP_AWB_ALG_E { 3008 ALG_AWB = 0, 3009 ALG_AWB_SPEC = 1, 3010 ALG_BUTT 3011 } ISP_AWB_ALG_E; 3012 typedef struct hiISP_WB_ATTR_S { 3013 HI_BOOL bByPass; /* RW; Range: [0, 1]; Format:1.0; If enabled, awb will be bypassed */ 3014 HI_U8 u8AWBRunInterval; /* RW; Range: [0x1, 0xFF]; Format:8.0; set the AWB run interval */ 3015 ISP_OP_TYPE_E enOpType; 3016 ISP_MWB_ATTR_S stManual; 3017 ISP_AWB_ATTR_S stAuto; 3018 ISP_AWB_ALG_E enAlgType; 3019 } ISP_WB_ATTR_S; 3020 3021 typedef struct hiISP_COLORMATRIX_MANUAL_S { 3022 HI_BOOL bSatEn; /* RW; Range: [0, 1]; Format:1.0; 3023 If bSatEn=1, the active CCM = SatMatrix * ManualMatrix, 3024 else the active CCM = ManualMatrix */ 3025 HI_U16 au16CCM[CCM_MATRIX_SIZE]; /* RW; Range: [0x0, 0xFFFF]; Format:8.8; Manul CCM matrix, */ 3026 } ISP_COLORMATRIX_MANUAL_S; 3027 3028 typedef struct hiISP_COLORMATRIX_PARAM_S { 3029 HI_U16 u16ColorTemp; /* RW; Range: [500, 30000]; Format:16.0; the current color temperature */ 3030 HI_U16 au16CCM[CCM_MATRIX_SIZE]; /* RW; Range: [0x0, 0xFFFF]; Format:8.8; CCM matrixes for different 3031 color temperature */ 3032 } ISP_COLORMATRIX_PARAM_S; 3033 3034 typedef struct hiISP_COLORMATRIX_AUTO_S { 3035 HI_BOOL bISOActEn; /* RW; Range: [0, 1]; Format:1.0; if enabled, CCM will bypass in low light */ 3036 HI_BOOL bTempActEn; /* RW; Range: [0, 1]; Format:1.0; if enabled, CCM will bypass when color temperature is 3037 larger than 8000K or less than 2500K */ 3038 HI_U16 u16CCMTabNum; /* RW; Range: [0x3, 0x7]; Format:16.0; The number of CCM matrixes */ 3039 ISP_COLORMATRIX_PARAM_S astCCMTab[CCM_MATRIX_NUM]; 3040 } ISP_COLORMATRIX_AUTO_S; 3041 3042 typedef struct hiISP_COLORMATRIX_ATTR_S { 3043 ISP_OP_TYPE_E enOpType; 3044 ISP_COLORMATRIX_MANUAL_S stManual; 3045 ISP_COLORMATRIX_AUTO_S stAuto; 3046 } ISP_COLORMATRIX_ATTR_S; 3047 3048 typedef struct hiISP_SATURATION_MANUAL_S { 3049 HI_U8 u8Saturation; /* RW; Range: [0, 0xFF]; Format:8.0; set the manual saturation of CCM */ 3050 } ISP_SATURATION_MANUAL_S; 3051 3052 typedef struct hiISP_SATURATION_AUTO_S { 3053 HI_U8 au8Sat[ISP_AUTO_ISO_STRENGTH_NUM]; /* RW; Range: [0, 0xFF]; should be decreased with increasing ISO */ 3054 } ISP_SATURATION_AUTO_S; 3055 3056 typedef struct hiISP_SATURATION_ATTR_S { 3057 ISP_OP_TYPE_E enOpType; 3058 ISP_SATURATION_MANUAL_S stManual; 3059 ISP_SATURATION_AUTO_S stAuto; 3060 } ISP_SATURATION_ATTR_S; 3061 3062 typedef struct hiISP_COLOR_TONE_ATTR_S { 3063 HI_U16 u16RedCastGain; /* RW; Range: [0x100, 0x180]; Format:4.8; R channel gain after CCM */ 3064 HI_U16 u16GreenCastGain; /* RW; Range: [0x100, 0x180]; Format:4.8; G channel gain after CCM */ 3065 HI_U16 u16BlueCastGain; /* RW; Range: [0x100, 0x180]; Format:4.8; B channel gain after CCM */ 3066 } ISP_COLOR_TONE_ATTR_S; 3067 3068 typedef struct hiISP_WB_INFO_S { 3069 HI_U16 u16Rgain; /* R; Range: [0x0, 0xFFF]; Format:8.8;AWB result of R color channel */ 3070 HI_U16 u16Grgain; /* R; Range: [0x0, 0xFFF]; Format:8.8; AWB result of Gr color channel */ 3071 HI_U16 u16Gbgain; /* R; Range: [0x0, 0xFFF]; Format:8.8; AWB result of Gb color channel */ 3072 HI_U16 u16Bgain; /* R; Range: [0x0, 0xFFF]; Format:8.8; AWB result of B color channel */ 3073 HI_U16 u16Saturation; /* R; Range: [0x0, 0xFF];Format:8.0;Current saturation */ 3074 HI_U16 u16ColorTemp; /* R; Range: [0x0, 0xFFFF];Format:16.0;Detect color temperature, maybe out of color 3075 cemeprature range */ 3076 HI_U16 au16CCM[CCM_MATRIX_SIZE]; /* R; Range: [0x0, 0xFFFF];Format:16.0;Current color correction matrix */ 3077 3078 HI_U16 u16LS0CT; /* R; Range: [0x0, 0xFFFF];Format:16.0;color tempearture of primary light source */ 3079 HI_U16 u16LS1CT; /* R; Range: [0x0, 0xFFFF];Format:16.0;color tempearture of secondary light source */ 3080 HI_U16 u16LS0Area; /* R; Range: [0x0, 0xFF];Format:8.0;area of primary light source */ 3081 HI_U16 u16LS1Area; /* R; Range: [0x0, 0xFF];Format:8.0;area of secondary light source */ 3082 HI_U8 u8MultiDegree; /* R; Range: [0x0, 0xFF];0 means uniform light source, larger value means multi 3083 light source */ 3084 HI_U16 u16ActiveShift; /* R; Range;[0x0,0xFF] */ 3085 HI_U32 u32FirstStableTime; /* R, Range: [0x0, 0xFFFFFFFF];Format:32.0;AWB first stable frame number */ 3086 ISP_AWB_INDOOR_OUTDOOR_STATUS_E enInOutStatus; /* R; indoor or outdoor status */ 3087 HI_S16 s16Bv; /* R; Range;[-32768, 32767]; Bv value */ 3088 } ISP_WB_INFO_S; 3089 3090 typedef struct hiISP_QUICK_START_PARAM_S { 3091 HI_BOOL bQuickStartEn; 3092 HI_U8 u8BlackFrameNum; 3093 HI_BOOL bIrModeEn; 3094 HI_U32 u32InitExposureIr; 3095 HI_U32 u32ISOThrIr; 3096 HI_U16 u16IrCutDelayTime; 3097 } ISP_QUICK_START_PARAM_S; 3098 3099 typedef struct hiISP_INIT_ATTR_S { 3100 HI_BOOL bIsIrMode; 3101 HI_U32 u32ExpTime; 3102 HI_U32 u32AGain; 3103 HI_U32 u32DGain; 3104 HI_U32 u32ISPDGain; 3105 HI_U32 u32Exposure; 3106 HI_U32 u32InitIso; 3107 HI_U32 u32LinesPer500ms; 3108 HI_U32 u32PirisFNO; 3109 HI_U16 u16WBRgain; 3110 HI_U16 u16WBGgain; 3111 HI_U16 u16WBBgain; 3112 HI_U16 u16SampleRgain; 3113 HI_U16 u16SampleBgain; 3114 HI_U16 au16CCM[CCM_MATRIX_SIZE]; 3115 HI_BOOL bAERouteExValid; 3116 ISP_QUICK_START_PARAM_S stQuickStart; 3117 ISP_AE_ROUTE_S stAERoute; 3118 ISP_AE_ROUTE_EX_S stAERouteEx; 3119 ISP_AE_ROUTE_S stAERouteSF; 3120 ISP_AE_ROUTE_EX_S stAERouteSFEx; 3121 } ISP_INIT_ATTR_S; 3122 3123 typedef struct hiISP_AF_ATTR_S { 3124 HI_S32 s32DistanceMax; /* RW;the focuse range */ 3125 HI_S32 s32DistanceMin; 3126 HI_U8 u8Weight[AF_ZONE_ROW][AF_ZONE_COLUMN]; /* RW;weighting table */ 3127 } ISP_AF_ATTR_S; 3128 typedef struct hiISP_MF_ATTR_S { 3129 HI_S32 s32DefaultSpeed; /* RW;1,default speed(unit:m/s).(onvif) */ 3130 } ISP_MF_ATTR_S; 3131 typedef struct hiISP_FOCUS_ATTR_S { 3132 ISP_OP_TYPE_E enOpType; 3133 ISP_MF_ATTR_S stManual; 3134 ISP_AF_ATTR_S stAuto; 3135 } ISP_FOCUS_ATTR_S; 3136 3137 /* 3138 DNG cfalayout type 3139 1 = Rectangular (or square) layout 3140 2 = Staggered layout A: even columns are offset down by 1/2 row 3141 3 = Staggered layout B: even columns are offset up by 1/2 row 3142 4 = Staggered layout C: even rows are offset right by 1/2 column 3143 5 = Staggered layout D: even rows are offset left by 1/2 column 3144 6 = Staggered layout E: even rows are offset up by 1/2 row, even columns are offset left by 1/2 column 3145 7 = Staggered layout F: even rows are offset up by 1/2 row, even columns are offset right by 1/2 column 3146 8 = Staggered layout G: even rows are offset down by 1/2 row, even columns are offset left by 1/2 column 3147 9 = Staggered layout H: even rows are offset down by 1/2 row, even columns are offset right by 1/2 column 3148 */ 3149 typedef enum hiDNG_CFALAYOUT_TYPE_E { 3150 CFALAYOUT_TYPE_RECTANGULAR = 1, 3151 CFALAYOUT_TYPE_A, /* a,b,c... not support */ 3152 CFALAYOUT_TYPE_B, 3153 CFALAYOUT_TYPE_C, 3154 CFALAYOUT_TYPE_D, 3155 CFALAYOUT_TYPE_E, 3156 CFALAYOUT_TYPE_F, 3157 CFALAYOUT_TYPE_G, 3158 CFALAYOUT_TYPE_H, 3159 CFALAYOUT_TYPE_BUTT 3160 } DNG_CFALAYOUT_TYPE_E; 3161 3162 typedef struct hiDNG_SRATIONAL_S { 3163 HI_S32 s32Numerator; /* represents the numerator of a fraction, */ 3164 HI_S32 s32Denominator; /* the denominator. */ 3165 } DNG_SRATIONAL_S; 3166 3167 typedef struct hiDNG_BLCREPEATDIM_S { 3168 HI_U16 u16BlcRepeatRows; 3169 HI_U16 u16BlcRepeatCols; 3170 } DNG_BLCREPEATDIM_S; 3171 3172 typedef struct hiDNG_DEFAULTSCALE_S { 3173 DNG_RATIONAL_S stDefaultScaleH; 3174 DNG_RATIONAL_S stDefaultScaleV; 3175 } DNG_DEFAULTSCALE_S; 3176 3177 typedef struct hiDNG_REPEATPATTERNDIM_S { 3178 HI_U16 u16RepeatPatternDimRows; 3179 HI_U16 u16RepeatPatternDimCols; 3180 } DNG_REPEATPATTERNDIM_S; 3181 3182 /* Defines the structure of dng raw format. */ 3183 typedef struct hiDNG_RAW_FORMAT_S { 3184 HI_U8 u8BitsPerSample; /* RO;Format:8.0; Indicate the bit numbers of raw data */ 3185 HI_U8 au8CfaPlaneColor[CFACOLORPLANE]; /* RO;Format:8.0; Indicate the planer numbers of raw data; 3186 0:red 1:green 2: blue */ 3187 DNG_CFALAYOUT_TYPE_E enCfaLayout; /* RO;Range:[1,9]; Describes the spatial layout of the CFA */ 3188 DNG_BLCREPEATDIM_S stBlcRepeatDim; /* Specifies repeat pattern size for the BlackLevel */ 3189 HI_U32 u32WhiteLevel; /* RO;Format:32.0; Indicate the WhiteLevel of the raw data */ 3190 DNG_DEFAULTSCALE_S stDefaultScale; /* Specifies the default scale factors for each direction to convert 3191 the image to square pixels */ 3192 DNG_REPEATPATTERNDIM_S stCfaRepeatPatternDim; /* Specifies the pixel number of repeat color planer in each 3193 direction */ 3194 HI_U8 au8CfaPattern[ISP_BAYER_CHN]; /* RO;Format:8.0; Indicate the bayer start order; 3195 0:red 1:green 2: blue */ 3196 } DNG_RAW_FORMAT_S; 3197 3198 /* Defines the structure of dng image static infomation. read only */ 3199 typedef struct hiDNG_IMAGE_STATIC_INFO_S { 3200 DNG_RAW_FORMAT_S stDngRawFormat; 3201 DNG_SRATIONAL_S astColorMatrix1[CCM_MATRIX_SIZE]; /* defines a transformation matrix that converts XYZ values 3202 to reference camera native color space values, 3203 under the first calibration illuminant. */ 3204 DNG_SRATIONAL_S astColorMatrix2[CCM_MATRIX_SIZE]; /* defines a transformation matrix that converts XYZ values 3205 to reference camera native color space values, 3206 under the second calibration illuminant. */ 3207 DNG_SRATIONAL_S astCameraCalibration1[CCM_MATRIX_SIZE]; /* defines a calibration matrix that transforms reference 3208 camera native space values to individual camera native 3209 space values under the first calibration illuminant */ 3210 DNG_SRATIONAL_S astCameraCalibration2[CCM_MATRIX_SIZE]; /* defines a calibration matrix that transforms reference 3211 camera native space values to individual camera native 3212 space values under the second calibration illuminant */ 3213 DNG_SRATIONAL_S astForwadMatrix1[CCM_MATRIX_SIZE]; /* defines a matrix that maps white balanced camera colors 3214 to XYZ D50 colors */ 3215 DNG_SRATIONAL_S astForwadMatrix2[CCM_MATRIX_SIZE]; /* defines a matrix that maps white balanced camera colors 3216 to XYZ D50 colors */ 3217 3218 HI_U8 u8CalibrationIlluminant1; /* RO;Format:8.0;Light source, actually this means white balance setting. 3219 '0' means unknown, '1' daylight, '2' fluorescent, '3' tungsten, '10' flash, 3220 '17' standard light A, '18' standard light B, '19' standard light C, 3221 '20' D55, '21' D65, '22' D75, '255' other */ 3222 HI_U8 u8CalibrationIlluminant2; /* RO;Format:8.0;Light source, actually this means white balance setting. 3223 '0' means unknown, '1' daylight, '2' fluorescent, '3' tungsten, '10' flash, 3224 '17' standard light A, '18' standard light B, '19' standard light C, 3225 '20' D55, '21' D65, '22' D75, '255' other */ 3226 } DNG_IMAGE_STATIC_INFO_S; 3227 3228 /* Defines the structure of DNG WB gain used for calculate DNG colormatrix. */ 3229 typedef struct hiISP_DNG_WBGAIN_S { 3230 HI_U16 u16Rgain; /* RW;Range: [0x0, 0xFFF]; Multiplier for R color channel */ 3231 HI_U16 u16Ggain; /* RW;Range: [0x0, 0xFFF]; Multiplier for G color channel */ 3232 HI_U16 u16Bgain; /* RW;Range: [0x0, 0xFFF]; Multiplier for B color channel */ 3233 } ISP_DNG_WBGAIN_S; 3234 3235 /* Defines the structure of DNG color parameters. */ 3236 typedef struct hiISP_DNG_COLORPARAM_S { 3237 ISP_DNG_WBGAIN_S stWbGain1; /* the calibration White balance gain of colorcheker in low colortemper light source */ 3238 ISP_DNG_WBGAIN_S stWbGain2; /* the calibration White balance gain of colorcheker in high colortemper light source */ 3239 } ISP_DNG_COLORPARAM_S; 3240 3241 typedef enum hiISP_IR_STATUS_E { 3242 ISP_IR_STATUS_NORMAL = 0, 3243 ISP_IR_STATUS_IR = 1, 3244 ISP_IR_BUTT 3245 } ISP_IR_STATUS_E; 3246 3247 typedef enum hiISP_IR_SWITCH_STATUS_E { 3248 ISP_IR_SWITCH_NONE = 0, 3249 ISP_IR_SWITCH_TO_NORMAL = 1, 3250 ISP_IR_SWITCH_TO_IR = 2, 3251 ISP_IR_SWITCH_BUTT 3252 } ISP_IR_SWITCH_STATUS_E; 3253 3254 typedef struct hiISP_IR_AUTO_ATTR_S { 3255 HI_BOOL bEnable; /* RW, HI_TRUE: enable IR_auto function; HI_TRUE: disable IR_auto function. */ 3256 HI_U32 u32Normal2IrIsoThr; /* RW, Range: [0, 0xFFFFFFFF]. ISO threshold of switching from normal to IR mode */ 3257 HI_U32 u32Ir2NormalIsoThr; /* RW, Range: [0, 0xFFFFFFFF]. ISO threshold of switching from IR to normal mode */ 3258 HI_U32 u32RGMax; /* RW, Range: [0x0, 0xFFF]. Maximum value of R/G in IR scene, 4.8-bit fix-point */ 3259 HI_U32 u32RGMin; /* RW, Range: [0x0, u32RGMax]. Minimum value of R/G in IR scene, 4.8-bit fix-point */ 3260 HI_U32 u32BGMax; /* RW, Range: [0x0, 0xFFF]. Maximum value of B/G in IR scene, 4.8-bit fix-point */ 3261 HI_U32 u32BGMin; /* RW, Range: [0x0, u32BGMax]. Minimum value of B/G in IR scene, 4.8-bit fix-point */ 3262 3263 ISP_IR_STATUS_E enIrStatus; /* RW. Current IR status. */ 3264 3265 ISP_IR_SWITCH_STATUS_E enIrSwitch; /* RO, IR switch status. */ 3266 } ISP_IR_AUTO_ATTR_S; 3267 3268 /* Only used for Hi3516CV500/Hi3516DV300 */ 3269 typedef enum hiISP_CALCFLICKER_TYPE_E { 3270 FLICKER_TYPE_NONE = 0, 3271 FLICKER_TYPE_UNKNOW, 3272 FLICKER_TYPE_50HZ, 3273 FLICKER_TYPE_60HZ, 3274 FLICKER_TYPE_BUTT, 3275 } ISP_CALCFLICKER_TYPE_E; 3276 3277 /* Only used for Hi3516CV500/Hi3516DV300 */ 3278 typedef struct hiISP_CALCFLICKER_INPUT_S { 3279 HI_U32 u32LinesPerSecond; /* The total line number of 1 second */ 3280 } ISP_CALCFLICKER_INPUT_S; 3281 3282 /* Only used for Hi3516CV500/Hi3516DV300 */ 3283 typedef struct hiISP_CALCFLICKER_OUTPUT_S { 3284 ISP_CALCFLICKER_TYPE_E enFlickerType; /* The calculate result of flicker type */ 3285 } ISP_CALCFLICKER_OUTPUT_S; 3286 3287 #ifdef __cplusplus 3288 #if __cplusplus 3289 } 3290 #endif 3291 #endif /* End of #ifdef __cplusplus */ 3292 3293 #endif /* __HI_COMM_ISP_H__ */ 3294