1 /* 2 * Copyright (c) 2022 HiSilicon (Shanghai) Technologies CO., LIMITED. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 */ 15 16 #ifndef __HI_DEFINES_H__ 17 #define __HI_DEFINES_H__ 18 19 #include "autoconf.h" 20 21 #ifdef __cplusplus 22 #if __cplusplus 23 extern "C" { 24 #endif 25 #endif /* __cplusplus */ 26 27 #define HI3559A_V100ES 0x3559AEF 28 #define HI3559A_V100 0x3559A100 29 #define HI3519A_V100 0x3519A100 30 #define HI3556A_V100 0x3556A100 31 #define HI3516C_V500 0x3516C500 32 #define HI3516D_V300 0x3516D300 33 #define HI3516A_V300 0x3516A300 34 #define HI3559_V200 0x35590200 35 #define HI3556_V200 0x35560200 36 #define HI3562_V100 0x35620100 37 #define HI3566_V100 0x35660100 38 #define HI3516E_V200 0x3516E200 39 #define HI_CHIP_TEST 0x0 40 41 #define HI35xx_Vxxx 0x35000000 42 #ifndef HICHIP 43 #define HICHIP CONFIG_HI_CHIP_TYPE 44 #endif 45 46 #if HICHIP == HI3559A_V100 47 #define CONFIG_HI_SUBCHIP_TYPE HI3559A_V100 48 #endif 49 50 #ifndef HISUBCHIP 51 #define HISUBCHIP CONFIG_HI_SUBCHIP_TYPE 52 #endif 53 54 #if HISUBCHIP == HI3559A_V100ES 55 #define CHIP_NAME "Hi3559AV100ES" 56 #elif HISUBCHIP == HI3559A_V100 57 #define CHIP_NAME "Hi3559AV100" 58 #elif HISUBCHIP == HI3519A_V100 59 #define CHIP_NAME "Hi3519AV100" 60 #elif HISUBCHIP == HI3556A_V100 61 #define CHIP_NAME "Hi3556AV100" 62 #elif HISUBCHIP == HI3516C_V500 63 #define CHIP_NAME "Hi3516CV500" 64 #elif HISUBCHIP == HI3516D_V300 65 #define CHIP_NAME "Hi3516DV300" 66 #elif HISUBCHIP == HI3516A_V300 67 #define CHIP_NAME "Hi3516AV300" 68 #elif HISUBCHIP == HI3559_V200 69 #define CHIP_NAME "Hi3559V200" 70 #elif HISUBCHIP == HI3556_V200 71 #define CHIP_NAME "Hi3556V200" 72 #elif HISUBCHIP == HI3562_V100 73 #define CHIP_NAME "Hi3562V100" 74 #elif HISUBCHIP == HI3566_V100 75 #define CHIP_NAME "Hi3566V100" 76 #elif HISUBCHIP == HI3516E_V200 77 #define CHIP_NAME "Hi3516EV200" 78 #elif HISUBCHIP == HI35xx_Vxxx 79 #error HuHu, I am an dummy chip 80 #else 81 #error HISUBCHIP define may be error 82 #endif 83 84 #define MPP_VER_PRIX "_MPP_V" 85 86 #define ALIGN_NUM 4 87 88 #define LUMA_PHY_ALIGN 16 89 90 #define DEFAULT_ALIGN 32U 91 #define MAX_ALIGN 1024U 92 #define SEG_CMP_LENGTH 256 93 94 #define MAX_MMZ_NAME_LEN 32 95 96 #define VO_MAX_NODE_NUM 16 97 98 /* For VB */ 99 #define VB_MAX_POOLS 512 100 101 /* For VENC */ 102 #define VENC_MAX_NAME_LEN 16 103 #define VENC_MAX_CHN_NUM 16 104 #define VEDU_IP_NUM 1 105 #define H264E_MAX_WIDTH 4096 106 #define H264E_MAX_HEIGHT 4096 107 #define H264E_MIN_WIDTH 114 108 #define H264E_MIN_HEIGHT 114 109 #define H265E_MAX_WIDTH 4096 110 #define H265E_MAX_HEIGHT 4096 111 #define H265E_MIN_WIDTH 114 112 #define H265E_MIN_HEIGHT 114 113 #define JPEGE_MAX_WIDTH 8192 114 #define JPEGE_MAX_HEIGHT 8192 115 #define JPEGE_MIN_WIDTH 32 116 #define JPEGE_MIN_HEIGHT 32 117 #define JPGE_MAX_NUM 1 118 #define VENC_MAX_ROI_NUM 8 119 #define H264E_MIN_HW_INDEX 0 120 #define H264E_MAX_HW_INDEX 11 121 #define H264E_MIN_VW_INDEX 0 122 #define H264E_MAX_VW_INDEX 3 123 #define VENC_QP_HISGRM_NUM 52 124 #define MAX_TILE_NUM 1 125 #define H265E_ADAPTIVE_FRAME_TYPE 4 126 #define H265E_ADAPTIVE_QP_TYPE 5 127 #define H265E_LCU_SIZE 64 128 129 #define VENC_MIN_INPUT_FRAME_RATE 1 130 #define VENC_MAX_INPUT_FRAME_RATE 240 131 132 #define VENC_MAX_RECEIVE_SOURCE 4 133 134 #define VENC_PIC_RECEIVE_SOURCE0 0 135 #define VENC_PIC_RECEIVE_SOURCE1 1 136 #define VENC_PIC_RECEIVE_SOURCE2 2 137 #define VENC_PIC_RECEIVE_SOURCE3 3 138 139 /* For RC */ 140 #define RC_TEXTURE_THR_SIZE 16 141 #define MIN_BITRATE 2 142 #define MAX_BITRATE (100 * 1024) 143 #define MAX_EXTRA_BITRATE (1000 * 1024) 144 145 /* For VDEC */ 146 #define VDEC_MAX_CHN_NUM 16 147 #define VDH_MAX_CHN_NUM 0 148 #define VEDU_CHN_START VDH_MAX_CHN_NUM 149 #define VEDU_H264D_ERRRATE 10 150 #define VEDU_H264D_FULLERR 100 151 152 #define H264D_ALIGN_W 64 153 #define H264D_ALIGN_H 64 154 #define H265D_ALIGN_W 64 155 #define H265D_ALIGN_H 64 156 #define JPEGD_ALIGN_W 64 157 #define JPEGD_ALIGN_H 16 158 #define JPEGD_RGB_ALIGN 16 159 160 #define H264D_MAX_SPS 32 161 #define H264D_MIN_SPS 1 162 #define H264D_MAX_PPS 256 163 #define H264D_MIN_PPS 1 164 #define H264D_MAX_SLICE 300 165 #define H264D_MIN_SLICE 1 166 167 #define H265D_MAX_VPS 16 168 #define H265D_MIN_VPS 1 169 #define H265D_MAX_SPS 16 170 #define H265D_MIN_SPS 1 171 #define H265D_MAX_PPS 64 172 #define H265D_MIN_PPS 1 173 #define H265D_MAX_SLICE 200 174 #define H265D_MIN_SLICE 1 175 176 #define VEDU_H264D_MAX_WIDTH 4096 177 #define VEDU_H264D_MAX_HEIGHT 4096 178 #define VEDU_H264D_MIN_WIDTH 114 179 #define VEDU_H264D_MIN_HEIGHT 114 180 181 #define VEDU_H265D_MAX_WIDTH 4096 182 #define VEDU_H265D_MAX_HEIGHT 4096 183 #define VEDU_H265D_MIN_WIDTH 114 184 #define VEDU_H265D_MIN_HEIGHT 114 185 186 #define JPEGD_IP_NUM 1 187 #define JPEGD_MAX_WIDTH 8192 188 #define JPEGD_MAX_HEIGHT 8192 189 #define JPEGD_MIN_WIDTH 8 190 #define JPEGD_MIN_HEIGHT 8 191 192 /* For Region */ 193 #define RGN_MIN_WIDTH 2 194 #define RGN_MIN_HEIGHT 2 195 196 #define RGN_COVER_MIN_X -8192 197 #define RGN_COVER_MIN_Y -8192 198 #define RGN_COVER_MAX_X 8190 199 #define RGN_COVER_MAX_Y 8190 200 #define RGN_COVER_MAX_WIDTH 8192 201 #define RGN_COVER_MAX_HEIGHT 8192 202 #define RGN_COVER_MIN_THICK 2 203 #define RGN_COVER_MAX_THICK 8 204 205 #define RGN_COVEREX_MIN_X -8192 206 #define RGN_COVEREX_MIN_Y -8192 207 #define RGN_COVEREX_MAX_X 8190 208 #define RGN_COVEREX_MAX_Y 8190 209 #define RGN_COVEREX_MAX_WIDTH 8192 210 #define RGN_COVEREX_MAX_HEIGHT 8192 211 #define RGN_COVEREX_MIN_THICK 2 212 #define RGN_COVEREX_MAX_THICK 8 213 214 #define RGN_OVERLAY_MIN_X 0 215 #define RGN_OVERLAY_MIN_Y 0 216 #define RGN_OVERLAY_MAX_X 8190 217 #define RGN_OVERLAY_MAX_Y 8190 218 #define RGN_OVERLAY_MAX_WIDTH 8192 219 #define RGN_OVERLAY_MAX_HEIGHT 8192 220 #define RGN_OVERLAY_MIN_ALPHA 0 221 #define RGN_OVERLAY_MAX_ALPHA 128 222 223 #define RGN_OVERLAYEX_MIN_X 0 224 #define RGN_OVERLAYEX_MIN_Y 0 225 #define RGN_OVERLAYEX_MAX_X 8190 226 #define RGN_OVERLAYEX_MAX_Y 8190 227 #define RGN_OVERLAYEX_MAX_WIDTH 8192 228 #define RGN_OVERLAYEX_MAX_HEIGHT 8192 229 #define RGN_OVERLAYEX_MIN_ALPHA 0 230 #define RGN_OVERLAYEX_MAX_ALPHA 255 231 232 #define RGN_MOSAIC_X_ALIGN 4 233 #define RGN_MOSAIC_Y_ALIGN 2 234 #define RGN_MOSAIC_WIDTH_ALIGN 4 235 #define RGN_MOSAIC_HEIGHT_ALIGN 4 236 237 #define RGN_MOSAIC_MIN_X 0 238 #define RGN_MOSAIC_MIN_Y 0 239 #define RGN_MOSAIC_MAX_X 8190 240 #define RGN_MOSAIC_MAX_Y 8190 241 #define RGN_MOSAIC_MIN_WIDTH 32 242 #define RGN_MOSAIC_MIN_HEIGHT 32 243 #define RGN_MOSAIC_MAX_WIDTH 8192 244 #define RGN_MOSAIC_MAX_HEIGHT 8192 245 246 #define RGN_ALIGN 2 247 248 #define RGN_HANDLE_MAX 128 249 #define RGN_MAX_BUF_NUM 6 250 251 #define COVER_MAX_NUM_VI 0 252 #define COVEREX_MAX_NUM_VI 16 253 #define OVERLAY_MAX_NUM_VI 0 254 #define OVERLAYEX_MAX_NUM_VI 16 255 #define MOSAIC_MAX_NUM_VI 0 256 257 #define OVERLAY_MAX_NUM_VENC 8 258 #define OVERLAYEX_MAX_NUM_VENC 0 259 260 #define COVER_MAX_NUM_VPSS 8 261 #define COVEREX_MAX_NUM_VPSS 8 262 #define OVERLAY_MAX_NUM_VPSS 0 263 #define OVERLAYEX_MAX_NUM_VPSS 8 264 #define MOSAIC_MAX_NUM_VPSS 4 265 266 #define OVERLAYEX_MAX_NUM_AVS 0 267 268 #define COVEREX_MAX_NUM_VO 1 269 #define OVERLAYEX_MAX_NUM_VO 1 270 271 #define OVERLAYEX_MAX_NUM_PCIV 0 272 273 #define RGN_VGS_TASK_WIDTH_MAX 8192 274 275 #define VENC_MAX_SSE_NUM 8 276 #define HISI_MAX_SENSOR_NUM 2 277 278 /* For VI */ 279 /* number of channel and device on video input unit of chip 280 * Note! VI_MAX_CHN_NUM is NOT equal to VI_MAX_DEV_NUM 281 * multiplied by VI_MAX_CHN_NUM, because all VI devices 282 * can't work at mode of 4 channels at the same time. 283 */ 284 #define VI_MAX_DEV_NUM 2 285 #define VI_MAX_PHY_PIPE_NUM 4 286 #define VI_MAX_VIR_PIPE_NUM 0 287 #define VI_MAX_PIPE_NUM (VI_MAX_PHY_PIPE_NUM + VI_MAX_VIR_PIPE_NUM) 288 #define VI_MAX_STITCH_GRP_NUM 0 289 #define VI_MAX_WDR_NUM 2 290 291 #define VI_MAX_PHY_CHN_NUM 1 292 #define VI_MAX_EXT_CHN_NUM 8 293 #define VI_EXT_CHN_START VI_MAX_PHY_CHN_NUM 294 #define VI_MAX_CHN_NUM (VI_MAX_PHY_CHN_NUM + VI_MAX_EXT_CHN_NUM) 295 #define VI_MAX_EXTCHN_BIND_PER_CHN 8 296 297 #define VIPROC_IRQ_NUM 1 298 #define VI_MAX_WDR_FRAME_NUM 2U 299 #define VI_MAX_NODE_NUM 3U 300 #define VIPROC_IP_NUM 1U 301 #define VICAP_IP_NUM 1U 302 303 #define VI_MAX_SPLIT_NODE_NUM 3U 304 305 #define VI_DEV_MIN_WIDTH 120 306 #define VI_DEV_MIN_HEIGHT 120 307 #define VI_DEV_MAX_WIDTH 4608 308 #define VI_DEV_MAX_HEIGHT 4608 309 #define VI_FPN_MAX_WIDTH 4096 310 #define VI_FPN_MAX_HEIGHT VI_DEV_MAX_HEIGHT 311 312 #define VI_PIPE_OFFLINE_MIN_WIDTH 120 313 #define VI_PIPE_OFFLINE_MIN_HEIGHT 120 314 #define VI_PIPE_OFFLINE_MAX_WIDTH 4608 315 #define VI_PIPE_OFFLINE_MAX_HEIGHT 3456 316 317 #define VI_PIPE_ONLINE_MIN_WIDTH 120 318 #define VI_PIPE_ONLINE_MIN_HEIGHT 120 319 #define VI_PIPE_ONLINE_MAX_WIDTH 4096 320 #define VI_PIPE_ONLINE_MAX_HEIGHT 3456 321 322 #define VI_PIPE0_MAX_WIDTH 4608 323 #define VI_PIPE0_MAX_HEIGHT 3456 324 #define VI_PIPE1_MAX_WIDTH 3840 325 #define VI_PIPE1_MAX_HEIGHT 2160 326 #define VI_PIPE2_YUV_MAX_WIDTH 3072 327 #define VI_PIPE2_YUV_MAX_HEIGHT 3072 328 #define VI_PIPE2_MAX_WIDTH 2048 329 #define VI_PIPE2_MAX_HEIGHT 2048 330 #define VI_PIPE3_MAX_WIDTH 2048 331 #define VI_PIPE3_MAX_HEIGHT 2048 332 #define VI_PIPE_WDR_FIRST_MAX_WIDTH VI_PIPE1_MAX_WIDTH 333 #define VI_PIPE_WDR_SECOND_MAX_WIDTH VI_PIPE3_MAX_WIDTH 334 #define VI_PIPE_FUSION_MAX_WIDTH 2688 335 #define VI_PIPE_FUSION_MAX_HEIGHT 1520 336 337 #define VI_PHYCHN_OFFLINE_MIN_WIDTH 120 338 #define VI_PHYCHN_OFFLINE_MIN_HEIGHT 120 339 #define VI_PHYCHN_OFFLINE_MAX_WIDTH 4608 340 #define VI_PHYCHN_OFFLINE_MAX_HEIGHT 4608 341 342 #define VI_PHYCHN_ONLINE_MIN_WIDTH 120 343 #define VI_PHYCHN_ONLINE_MIN_HEIGHT 120 344 #define VI_PHYCHN_ONLINE_MAX_WIDTH 4096 345 #define VI_PHYCHN_ONLINE_MAX_HEIGHT 4608 346 347 #define VI_EXTCHN_MIN_WIDTH 32 348 #define VI_EXTCHN_MIN_HEIGHT 32 349 #define VI_EXTCHN_MAX_WIDTH 8192 350 #define VI_EXTCHN_MAX_HEIGHT 8192 351 352 #define VI_EXT_CHN_MAX_ZOOMIN 16U 353 #define VI_EXT_CHN_MAX_ZOOMOUT 30U 354 355 #define VI_CMP_PARAM_SIZE 152 356 #define VI_VPSS_DEFAULT_EARLINE 128 357 358 /* For DIS */ 359 #define DIS_PYRAMID_LAYER_NUM 5 360 #define DIS_MAX_CHN_NUM 4 361 #define DIS_MIN_IMAGE_WIDTH 1280 362 #define DIS_MIN_IMAGE_HEIGHT 720 363 364 /* For VO */ 365 366 #define VO_MAX_VIRT_DEV_NUM 0 /* max virtual dev num */ 367 #define VO_MAX_PHY_DEV_NUM 1 /* max physical dev num */ 368 369 #define VO_MIN_CHN_WIDTH 32 /* channel minimal width */ 370 #define VO_MIN_CHN_HEIGHT 32 /* channel minimal height */ 371 #define VO_MAX_ZOOM_RATIO 1000 /* max zoom ratio, 1000 means 100% scale */ 372 #define VO_MAX_DEV_NUM 1 /* max dev num */ 373 #define VO_MAX_LAYER_NUM 1 /* max layer num */ 374 #define VO_MAX_PRIORITY 1 /* max layer priority */ 375 #define VO_MAX_CHN_NUM 4 /* max chn num */ 376 #define VO_MAX_LAYER_IN_DEV 1 /* max layer num of each dev */ 377 #define VO_MAX_GRAPHICS_LAYER_NUM 1 378 #define VO_MAX_WBC_NUM 0 379 #define VO_MIN_TOLERATE 1 /* min play toleration 1ms */ 380 #define VO_MAX_TOLERATE 100000 /* max play toleration 100s */ 381 382 /* For AVS */ 383 #define AVS_MAX_GRP_NUM 32 /* max grp num */ 384 #define AVS_PIPE_NUM 4 /* max pipe num */ 385 #define AVS_MAX_CHN_NUM 2 /* max chn num */ 386 #define AVS_SPLIT_NUM 2 387 #define AVS_SPLIT_PIPE_NUM 6 388 #define AVS_CUBE_MAP_SURFACE_NUM 6 389 390 #define AVS_MAX_IN_WIDTH 8192 391 #define AVS_MAX_IN_HEIGHT 8192 392 #define AVS_MIN_IN_WIDTH 1280 393 #define AVS_MIN_IN_HEIGHT 720 394 395 #define AVS_MAX_OUT_WIDTH 8192 396 #define AVS_MAX_OUT_HEIGHT 8192 397 #define AVS_MIN_OUT_WIDTH 256 398 #define AVS_MIN_OUT_HEIGHT 256 399 400 /* For AUDIO */ 401 #define AI_DEV_MAX_NUM 1 402 #define AO_DEV_MIN_NUM 0 403 #define AO_DEV_MAX_NUM 2 404 #define AIO_MAX_NUM 2 405 #define AENC_MAX_CHN_NUM 32 406 #define ADEC_MAX_CHN_NUM 32 407 408 #define AI_MAX_CHN_NUM 16 409 #define AO_MAX_CHN_NUM 3 410 #define AO_SYSCHN_CHNID (AO_MAX_CHN_NUM - 1) 411 412 #define AIO_MAX_CHN_NUM ((AO_MAX_CHN_NUM > AI_MAX_CHN_NUM) ? AO_MAX_CHN_NUM : AI_MAX_CHN_NUM) 413 414 /* For VPSS */ 415 #define VPSS_IP_NUM 1 416 #define VPSS0 0 417 #define VPSS_MAX_GRP_NUM 16 418 #define VPSS_MAX_GRP_PIPE_NUM 1 419 #define VPSS_PARALLEL_PIC_NUM 1 420 #define VPSS_MAX_PHY_CHN_NUM 3 421 #define VPSS_LOWDELAY_CHN_NUM 3 422 #define VPSS_MAX_EXT_CHN_NUM 8 423 #define VPSS_MAX_CHN_NUM (VPSS_MAX_PHY_CHN_NUM + VPSS_MAX_EXT_CHN_NUM) 424 #define VPSS_MIN_IMAGE_WIDTH_SBS 512 425 #define VPSS_MIN_IMAGE_WIDTH 64 426 #define VPSS_MIN_IMAGE_HEIGHT 64 427 #define VPSS_MAX_IMAGE_WIDTH_SLAVE 8192 428 #define VPSS_MAX_IN_IMAGE_WIDTH 4096 429 #define VPSS_MAX_IMAGE_WIDTH 8192 430 #define VPSS_MAX_IMAGE_HEIGHT 8192 431 #define VPSS_EXTCHN_MAX_IMAGE_WIDTH 8192 432 #define VPSS_EXTCHN_MAX_IMAGE_HEIGHT 8192 433 #define VPSS_MAX_ZOOMIN 16 434 #define VPSS_MAX_ZOOMOUT 15 435 #define VPSS_EXT_CHN_MAX_ZOOMIN 16 436 #define VPSS_EXT_CHN_MAX_ZOOMOUT 30 437 438 /* For PCIV */ 439 #define PCIV_MAX_CHN_NUM 16 /* max pciv channel number in each pciv device */ 440 441 /* For IVS_MD */ 442 #define MD_MAX_CHN 64 443 #define MD_MAX_WIDTH 1920 444 #define MD_MAX_HEIGHT 1080 445 #define MD_MIN_WIDTH 64 446 #define MD_MIN_HEIGHT 64 447 448 /* For NNIE */ 449 #define SVP_NNIE_IP_NUM 1 450 451 /* For RECT */ 452 #define DPU_RECT_MAX_GRP_NUM 8 453 #define DPU_RECT_MAX_PIPE_NUM 2 454 #define DPU_RECT_MAX_CHN_NUM 2 455 456 #define DPU_RECT_IN_IMAGE_MAX_WIDTH 2048 457 #define DPU_RECT_IN_IMAGE_MAX_HEIGHT 2048 458 #define DPU_RECT_IN_IMAGE_MIN_WIDTH 128 459 #define DPU_RECT_IN_IMAGE_MIN_HEIGHT 64 460 #define DPU_RECT_OUT_IMAGE_MAX_WIDTH 1920 461 #define DPU_RECT_OUT_IMAGE_MAX_HEIGHT 1080 462 #define DPU_RECT_OUT_IMAGE_MIN_WIDTH 128 463 #define DPU_RECT_OUT_IMAGE_MIN_HEIGHT 64 464 465 /* For MATCH */ 466 #define DPU_MATCH_MAX_GRP_NUM 8 467 #define DPU_MATCH_MAX_PIPE_NUM 2 468 #define DPU_MATCH_MAX_CHN_NUM 1 469 470 #define DPU_MATCH_IN_IMAGE_MAX_WIDTH 1920 471 #define DPU_MATCH_IN_IMAGE_MAX_HEIGHT 1080 472 #define DPU_MATCH_IN_IMAGE_MIN_WIDTH 128 473 #define DPU_MATCH_IN_IMAGE_MIN_HEIGHT 64 474 #define DPU_MATCH_OUT_IMAGE_MAX_WIDTH 1920 475 #define DPU_MATCH_OUT_IMAGE_MAX_HEIGHT 1080 476 #define DPU_MATCH_OUT_IMAGE_MIN_WIDTH 128 477 #define DPU_MATCH_OUT_IMAGE_MIN_HEIGHT 64 478 479 /* For Gdc */ 480 #define FISHEYE_MIN_IN_IMAGE_WIDTH 1920 481 #define FISHEYE_MIN_IN_IMAGE_HEIGHT 1080 482 #define FISHEYE_MIN_OUT_IMAGE_WIDTH 640 483 #define FISHEYE_MIN_OUT_IMAGE_HEIGHT 360 484 #define FISHEYE_MAX_OUT_IMAGE_WIDTH 4608 485 #define FISHEYE_MAX_OUT_IMAGE_HEIGHT 4608 486 #define LDC_MIN_IMAGE_WIDTH 640 487 #define LDC_MIN_IMAGE_HEIGHT 480 488 489 #define SPREAD_MIN_IMAGE_WIDTH 640 490 #define SPREAD_MIN_IMAGE_HEIGHT 480 491 492 #define PMF_MIN_IMAGE_WIDTH 480 493 #define PMF_MIN_IMAGE_HEIGHT 360 494 495 #define ROTATION_EX_MIN_IMAGE_WIDTH 480 496 #define ROTATION_EX_MIN_IMAGE_HEIGHT 360 497 498 /* For GDC */ 499 #define GDC_IP_NUM 1 500 #define GDC_FUSION_NUM 9 501 502 /* For VGS */ 503 #define VGS_IP_NUM 1 504 #define VGS0 0 505 #define VGS1 1 506 #define VGS_MAX_COVER_NUM 1 507 #define VGS_MAX_OSD_NUM 1 508 509 /* For MCF */ 510 #define MCF_MAX_GRP_NUM 1 /* max grp num */ 511 #define MCF_MAX_PIPE_NUM 2 /* max pipe num */ 512 #define MCF_MAX_CHN_NUM 1 /* max chn num */ 513 514 #ifdef __cplusplus 515 #if __cplusplus 516 } 517 #endif 518 #endif /* __cplusplus */ 519 520 #endif /* __HI_DEFINES_H__ */ 521 522