1root { 2 platform { 3 mtd_config { 4 template mtd_controller { 5 match_attr = ""; 6 regBase = 0x10000000; 7 regSize = 0xe0; 8 memBase = 0x14000000; 9 memSize = 0x1000000; 10 } 11 controller_0x00 :: mtd_controller { 12 match_attr = "hifmc100_config"; 13 regBase = 0x10000000; 14 regSize = 0xe0; 15 memBase = 0x14000000; 16 memSize = 0x1000000; 17 spi_nand_dev_table { 18 template spinand_device { 19 template spinand_op { 20 if_type = 0x0; 21 cmd = 0x0; 22 dummy = 0x0; 23 size = 0x0; 24 clock = 0x0; 25 } 26 name = "unkown"; 27 id = [0x0, 0x0]; 28 chip_size = 0x1000000; // 16M 29 block_size = 0x10000; // 64K 30 page_size = 2048; // 2K 31 oob_size = 64; 32 qe_support = 0; 33 erase_op :: spinand_op { 34 } 35 write_op :: spinand_op { 36 } 37 read_op :: spinand_op { 38 } 39 } 40 DS35Q2GAXXX:: spinand_device { 41 name = "DS35Q2GAXXX"; 42 id = [0xe5, 0x72]; 43 chip_size = 0x10000000; // 256M 44 block_size = 0x20000; // 128K 45 page_size = 2048; // 2K 46 oob_size = 64; 47 qe_support = 1; 48 read_op { 49 if_type = 0x3; // spi if read quad 50 cmd = 0x6b; // spi cmd read quad 51 dummy = 1; 52 size = 0xffffffff; // infinite 53 clock = 104; 54 } 55 write_op { 56 if_type = 0x3; // spi if write quad 57 cmd = 0x32; // spi cmd write quad 58 dummy = 0x0; 59 size = 256; 60 clock = 104; 61 } 62 erase_op { 63 if_type = 0x0; // spi if std erase 64 cmd = 0xd8; // spi cmd se 64k 65 dummy = 0x0; 66 size = 0x20000; // 128k 67 clock = 104; 68 } 69 } 70 } 71 spi_nor_dev_table { 72 template spinor_device { 73 template spinor_op { 74 if_type = 0x0; 75 cmd = 0x0; 76 dummy = 0x0; 77 size = 0x0; 78 clock = 0x0; 79 } 80 name = "unkown"; 81 id = [0x0, 0x0, 0x0]; 82 chip_size = 0x1000000; // 16M 83 block_size = 0x10000; // 64K 84 addr_cycle = 3; 85 qe_support = 0; 86 erase_op :: spinor_op { 87 } 88 write_op :: spinor_op { 89 } 90 read_op :: spinor_op { 91 } 92 } 93 xm25qh128a :: spinor_device { 94 name = "xm25qh128a"; 95 id = [0x20, 0x70, 0x18]; 96 chip_size = 0x1000000; // 16M 97 block_size = 0x10000; // 64K 98 addr_cycle = 3; 99 qe_support = 1; 100 erase_op { 101 if_type = 0x0; // spi if std erase 102 cmd = 0xd8; // spi cmd se 64k 103 dummy = 0x0; 104 size = 0x10000; // 64k 105 clock = 104; 106 } 107 write_op { 108 if_type = 0x0; // spi if write std 109 cmd = 0x2; // spi cmd write std 110 dummy = 0x0; 111 size = 256; 112 clock = 104; 113 } 114 read_op { 115 if_type = 0x2; // spi if read dual addr 116 cmd = 0xbb; // spi cmd read dual addr 117 dummy = 0x1; 118 size = 0xffffffff; 119 clock = 104; 120 } 121 } 122 } 123 } 124 } 125 } 126} 127