1 /* 2 * Copyright (c) 2020 HiSilicon (Shanghai) Technologies CO., LIMITED. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 */ 15 16 #ifndef __EFUSE_DRV_H__ 17 #define __EFUSE_DRV_H__ 18 #include <hi_flashboot.h> 19 20 typedef struct { 21 hi_u16 id_start_bit; /* Start bit */ 22 hi_u16 id_size; /* Unit: bit */ 23 hi_u8 attr; /* 0x0:None,0x1:RO,0x2:WO,0x3:R/W */ 24 } hi_efuse_stru; 25 26 #define EFUSE_PGM_EN (HI_EFUSE_REG_BASE + 0x0) 27 #define EFUSE_PGM_ADDR (HI_EFUSE_REG_BASE + 0x4) 28 #define EFUSE_RD_EN (HI_EFUSE_REG_BASE + 0x8) 29 #define EFUSE_RD_ADDR (HI_EFUSE_REG_BASE + 0xc) 30 #define EFUSE_STATUS (HI_EFUSE_REG_BASE + 0x10) 31 #define EFUSE_RDATA (HI_EFUSE_REG_BASE + 0x14) 32 33 #define EFUSE_WRITE_READY_STATUS (1 << 0) /* Write completion status. 34 The value 1 indicates that the write is complete. */ 35 #define EFUSE_READ_READY_STATUS (1 << 1) /* Read completion status. 36 The value 1 indicates that the read is complete. */ 37 #define EFUSE_STATUS_MASK (0x7 << 2) 38 #define EFUSE_PO_STATUS_READY (0x1 << 2) /* Whether the read operation is complete after power-on. 39 The value 1 indicates that the read operation is complete. */ 40 #define EFUSE_STATUS_READY (0x1 << 4) /* Busy/idle status. The value 0 indicates idle. */ 41 42 #define EFUSE_CTRL_ST (0x1 << 5) 43 #define EFUSE_EN_SWITCH (1 << 0) 44 #define EFUSE_EN_OK 0 45 46 #define EFUSE_STATUS_RD (1 << 1) 47 #define EFUSE_8_BIT 8 48 #define EFUSE_KEY_LOCK_BIT 2 49 50 #define EFUSE_TIMEOUT_DEFAULT 1000000 /* 1000000us */ 51 #define EFUSE_TIMECNT_TICK 10 52 53 #define EFUSE_PGM_ADDR_SIZE 2048 54 #define EFUSE_USER_RESEVED_START_BIT 1884 55 #define EFUSE_USER_RESEVED_END_BIT 2011 56 #define EFUSE_LOCK_START_BITS 2012 57 #define EFUSE_LOCK_FIELD2_START_BITS 235 58 #define EFUSE_LOCK_SIZE 36 59 #define EFUSE_LOCK_FIELD2_SIZE 5 60 #define EFUSE_MAX_INDEX_SIZE 32 61 62 #define EFUSE_IDX_NRW 0x0 63 #define EFUSE_IDX_RO 0x1 64 #define EFUSE_IDX_WO 0x2 65 #define EFUSE_IDX_RW 0x3 66 67 hi_efuse_stru *get_efuse_cfg(hi_void); 68 hi_void get_efuse_cfg_by_id(hi_efuse_idx idx, hi_u16 *start_bit, hi_u16 *size, hi_u8 *attr); 69 hi_u32 efuse_read_bits(hi_u16 start_bit, hi_u16 size, hi_u8 *key_data); 70 hi_u32 efuse_write_bits(hi_u16 start_bit, hi_u16 size, const hi_u8 *key_data, hi_u8 *err_state); 71 72 #endif /* __EFUSE_H__ */ 73 74