1 /* 2 * Copyright (c) 2020 HiSilicon (Shanghai) Technologies CO., LIMITED. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 */ 15 16 #ifndef __MAIN_H__ 17 #define __MAIN_H__ 18 19 HI_EXTERN hi_u32 __heap_begin__; 20 HI_EXTERN hi_u32 __heap_end__; 21 22 #define HI_CHIP_VER_HI3861L 0x0 23 #define IO_CTRL_REG_BASE_ADDR 0x904 /* Base address of the I/O control register, which is used to 24 configure the drive capability and pull-up/pull-down */ 25 /* bit mask */ 26 #define MSK_2_B 0x3 27 #define MSK_3_B 0x7 28 /* bit offset */ 29 #define OFFSET_4_B 4 30 #define OFFSET_22_B 22 31 #define OFFSET_25_B 25 32 #define OFFSET_28_B 28 33 34 #endif 35