1 /* 2 * Copyright (c) 2020 HiSilicon (Shanghai) Technologies CO., LIMITED. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 */ 15 16 #ifndef __SERIAL_DW_H__ 17 #define __SERIAL_DW_H__ 18 19 #include <hi_boot_rom.h> 20 21 /* UART register OFFSET */ 22 #define UART_DR 0x0 23 #define UART_RSR_ECR 0x04 24 #define UART_FR 0x18 25 #define UART_ILPR 0x20 26 #define UART_IBRD 0x24 27 #define UART_FBRD 0x28 28 #define UART_LCR_H 0x2C 29 #define UART_CR 0x30 30 #define UART_IFLS 0x34 31 #define UART_IMSC 0x38 32 #define UART_RIS 0x3C 33 #define UART_MIS 0x40 34 #define UART_ICR 0x44 35 #define UART_DMACR 0x48 36 37 #define UARTFR_TXFE_MASK 0x80 38 #define UARTFR_RXFF_MASK 0x40 39 #define UARTFR_TXFF_MASK 0x20 40 #define UARTFR_RXFE_MASK 0x10 41 #define UARTFR_BUSY_MASK 0x04 42 #define UARTDR_DATA_MASK 0xFF 43 44 #define UARTLCR_H_CFG 0x60 /* 8bit, no parity, FIFO disable */ 45 #define UARTLCR_H_CFG_ODD 0x72 /* 8bit, odd parity,FIFO enable */ 46 #define UARTLCR_H_CFG_FIFO 0x70 /* 8bit, no parity, FIFO enable */ 47 #define UARTCR_CFG 0x301 /* UART tx enable, rx enable, uart enable */ 48 #define UARTCR_CFG_FLOWENABLE 0xC301 /* UART tx enable, rx enable, uart enable, flow control enable */ 49 #define UARTCR_RTX_FC_SHIFT 14 50 #define UARTCR_CTX_FC_SHIFT 15 51 #define UARTIMSC_CFG 0x0 /* Disable all uart interrupt */ 52 #define UARTIMSC_CFG_INT 0x50 /* enable rx time out interrupt */ 53 #define UARTIFS_CFG 0x10A /* FIFO water mark:Rx 16 Tx 32 RTS 56 */ 54 #define UARTIFS_RXFF_SHIFT 3 55 #define UARTIFS_RTSFF_SHIFT 6 56 57 #define UART_DMA_ENABLE 0X03 58 #define UART_DMA_DISABLE 0X04 59 #define UARTICR_CFG 0x7FF /* Clear up all uart interrupt */ 60 61 typedef struct { 62 hi_u32 baudrate; 63 hi_u16 ibrd; 64 hi_u16 fbrd; 65 } hi_uart_brd; 66 typedef enum { 67 HI_UART_BRD_IDX_1200 = 0, 68 HI_UART_BRD_IDX_2400 = 1, 69 HI_UART_BRD_IDX_9600 = 2, 70 HI_UART_BRD_IDX_19200 = 3, 71 HI_UART_BRD_IDX_115200 = 4, 72 HI_UART_BRD_IDX_230400 = 5, 73 HI_UART_BRD_IDX_460800 = 6, 74 HI_UART_BRD_IDX_921600 = 7, 75 HI_UART_BRD_IDX_1000000 = 8, 76 HI_UART_BRD_IDX_1024000 = 9, 77 HI_UART_BRD_IDX_1500000 = 10, 78 HI_UART_BRD_IDX_1536000 = 11, 79 HI_UART_BRD_IDX_2000000 = 12, 80 HI_UART_BRD_IDX_2048000 = 13, 81 HI_UART_BRD_IDX_2252800 = 14, 82 HI_UART_BRD_IDX_2304000 = 15, 83 HI_UART_BRD_IDX_2500000 = 16, 84 HI_UART_BRD_IDX_2560000 = 17, 85 HI_UART_BRD_IDX_3000000 = 18, 86 HI_UART_BRD_IDX_3072000 = 19, 87 HI_UART_BRD_IDX_3500000 = 20, 88 HI_UART_BRD_IDX_3584000 = 21, 89 HI_UART_BRD_IDX_3840000 = 22, 90 HI_UART_BRD_IDX_4000000 = 23, 91 HI_UART_BRD_IDX_4096000 = 24, 92 HI_UART_BRD_IDX_4500000 = 25, 93 HI_UART_BRD_IDX_4608000 = 26, 94 HI_UART_BRD_IDX_5000000 = 27, 95 HI_UART_BRD_IDX_6000000 = 28, 96 HI_UART_BRD_IDX_MAX, 97 } hi_uart_brd_idx_e; 98 99 typedef enum { 100 HI_UART_BRD_1200 = 1200, 101 HI_UART_BRD_2400 = 2400, 102 HI_UART_BRD_9600 = 9600, 103 HI_UART_BRD_19200 = 19200, 104 HI_UART_BRD_115200 = 115200, 105 HI_UART_BRD_230400 = 230400, 106 HI_UART_BRD_460800 = 460800, 107 HI_UART_BRD_921600 = 921600, 108 HI_UART_BRD_1000000 = 1000000, 109 HI_UART_BRD_1024000 = 1024000, 110 HI_UART_BRD_1500000 = 1500000, 111 HI_UART_BRD_1536000 = 1536000, 112 HI_UART_BRD_2000000 = 2000000, 113 HI_UART_BRD_2048000 = 2048000, 114 HI_UART_BRD_2252800 = 2252800, 115 HI_UART_BRD_2304000 = 2304000, 116 HI_UART_BRD_2500000 = 2500000, 117 HI_UART_BRD_2560000 = 2560000, 118 HI_UART_BRD_3000000 = 3000000, 119 HI_UART_BRD_3072000 = 3072000, 120 HI_UART_BRD_3500000 = 3500000, 121 HI_UART_BRD_3584000 = 3584000, 122 HI_UART_BRD_3840000 = 3840000, 123 HI_UART_BRD_4000000 = 4000000, 124 HI_UART_BRD_4096000 = 4096000, 125 HI_UART_BRD_4500000 = 4500000, 126 HI_UART_BRD_4608000 = 4608000, 127 HI_UART_BRD_5000000 = 5000000, 128 HI_UART_BRD_6000000 = 6000000, 129 } hi_uart_baudrate_e; 130 hi_u32 set_uart_param(uart_param_stru uart_param); 131 #endif 132