1 /* 2 * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 */ 15 16 #ifndef H__RK_MPI_CMD_H__ 17 #define H__RK_MPI_CMD_H__ 18 19 #include "rk_vdec_cmd.h" 20 #include "rk_vdec_cfg.h" 21 #include "rk_venc_cmd.h" 22 #include "rk_venc_cfg.h" 23 #include "rk_venc_ref.h" 24 /* 25 * Command id bit usage is defined as follows: 26 * bit 20 - 23 - module id 27 * bit 16 - 19 - contex id 28 * bit 0 - 15 - command id 29 */ 30 #define CMD_MODULE_ID_MASK (0x00F00000) 31 #define CMD_MODULE_OSAL (0x00100000) 32 #define CMD_MODULE_MPP (0x00200000) 33 #define CMD_MODULE_CODEC (0x00300000) 34 #define CMD_MODULE_HAL (0x00400000) 35 36 #define CMD_CTX_ID_MASK (0x000F0000) 37 #define CMD_CTX_ID_DEC (0x00010000) 38 #define CMD_CTX_ID_ENC (0x00020000) 39 #define CMD_CTX_ID_ISP (0x00030000) 40 41 /* separate encoder / decoder control command to different segment */ 42 #define CMD_CFG_ID_MASK (0x0000FF00) 43 44 /* decoder control command */ 45 #define CMD_DEC_CFG_ALL (0x00000000) 46 #define CMD_DEC_QUERY (0x00000100) 47 #define CMD_DEC_CFG (0x00000200) 48 49 /* encoder control command */ 50 #define CMD_ENC_CFG_ALL (0x00000000) 51 #define CMD_ENC_CFG_RC_API (0x00000100) 52 53 #define CMD_ENC_CFG_MISC (0x00008000) 54 #define CMD_ENC_CFG_SPLIT (0x00008100) 55 #define CMD_ENC_CFG_REF (0x00008200) 56 #define CMD_ENC_CFG_ROI (0x00008300) 57 #define CMD_ENC_CFG_OSD (0x00008400) 58 59 typedef enum { 60 MPP_OSAL_CMD_BASE = CMD_MODULE_OSAL, 61 MPP_OSAL_CMD_END, 62 63 MPP_CMD_BASE = CMD_MODULE_MPP, 64 MPP_ENABLE_DEINTERLACE, 65 MPP_SET_INPUT_BLOCK, /* deprecated */ 66 MPP_SET_INTPUT_BLOCK_TIMEOUT, /* deprecated */ 67 MPP_SET_OUTPUT_BLOCK, /* deprecated */ 68 MPP_SET_OUTPUT_BLOCK_TIMEOUT, /* deprecated */ 69 /* 70 * timeout setup, refer to MPP_TIMEOUT_XXX 71 * zero - non block 72 * negative - block with no timeout 73 * positive - timeout in milisecond 74 */ 75 MPP_SET_INPUT_TIMEOUT, /* parameter type RK_S64 */ 76 MPP_SET_OUTPUT_TIMEOUT, /* parameter type RK_S64 */ 77 MPP_CMD_END, 78 79 MPP_CODEC_CMD_BASE = CMD_MODULE_CODEC, 80 MPP_CODEC_GET_FRAME_INFO, 81 MPP_CODEC_CMD_END, 82 83 MPP_DEC_CMD_BASE = CMD_MODULE_CODEC | CMD_CTX_ID_DEC, 84 MPP_DEC_SET_FRAME_INFO, /* vpu api legacy control for buffer slot dimension init */ 85 MPP_DEC_SET_EXT_BUF_GROUP, /* IMPORTANT: set external buffer group to mpp decoder */ 86 MPP_DEC_SET_INFO_CHANGE_READY, 87 MPP_DEC_SET_PRESENT_TIME_ORDER, /* use input time order for output */ 88 MPP_DEC_SET_PARSER_SPLIT_MODE, /* Need to setup before init */ 89 MPP_DEC_SET_PARSER_FAST_MODE, /* Need to setup before init */ 90 MPP_DEC_GET_STREAM_COUNT, 91 MPP_DEC_GET_VPUMEM_USED_COUNT, 92 MPP_DEC_SET_VC1_EXTRA_DATA, 93 MPP_DEC_SET_OUTPUT_FORMAT, 94 MPP_DEC_SET_DISABLE_ERROR, /* When set it will disable sw/hw error (H.264 / H.265) */ 95 MPP_DEC_SET_IMMEDIATE_OUT, 96 MPP_DEC_SET_ENABLE_DEINTERLACE, /* MPP enable deinterlace by default. Vpuapi can disable it */ 97 98 MPP_DEC_CMD_QUERY = CMD_MODULE_CODEC | CMD_CTX_ID_DEC | CMD_DEC_QUERY, 99 /* query decoder runtime information for decode stage */ 100 MPP_DEC_QUERY, /* set and get MppDecQueryCfg structure */ 101 102 CMD_DEC_CMD_CFG = CMD_MODULE_CODEC | CMD_CTX_ID_DEC | CMD_DEC_CFG, 103 MPP_DEC_SET_CFG, /* set MppDecCfg structure */ 104 MPP_DEC_GET_CFG, /* get MppDecCfg structure */ 105 106 MPP_DEC_CMD_END, 107 108 MPP_ENC_CMD_BASE = CMD_MODULE_CODEC | CMD_CTX_ID_ENC, 109 /* basic encoder setup control */ 110 MPP_ENC_SET_CFG, /* set MppEncCfg structure */ 111 MPP_ENC_GET_CFG, /* get MppEncCfg structure */ 112 MPP_ENC_SET_PREP_CFG, /* deprecated set MppEncPrepCfg structure, use MPP_ENC_SET_CFG instead */ 113 MPP_ENC_GET_PREP_CFG, /* deprecated get MppEncPrepCfg structure, use MPP_ENC_GET_CFG instead */ 114 MPP_ENC_SET_RC_CFG, /* deprecated set MppEncRcCfg structure, use MPP_ENC_SET_CFG instead */ 115 MPP_ENC_GET_RC_CFG, /* deprecated get MppEncRcCfg structure, use MPP_ENC_GET_CFG instead */ 116 MPP_ENC_SET_CODEC_CFG, /* deprecated set MppEncCodecCfg structure, use MPP_ENC_SET_CFG instead */ 117 MPP_ENC_GET_CODEC_CFG, /* deprecated get MppEncCodecCfg structure, use MPP_ENC_GET_CFG instead */ 118 /* runtime encoder setup control */ 119 MPP_ENC_SET_IDR_FRAME, /* next frame will be encoded as intra frame */ 120 MPP_ENC_SET_OSD_LEGACY_0, /* deprecated */ 121 MPP_ENC_SET_OSD_LEGACY_1, /* deprecated */ 122 MPP_ENC_SET_OSD_LEGACY_2, /* deprecated */ 123 MPP_ENC_GET_HDR_SYNC, /* get vps / sps / pps which has better sync behavior parameter is MppPacket */ 124 MPP_ENC_GET_EXTRA_INFO, /* deprecated */ 125 MPP_ENC_SET_SEI_CFG, /* SEI: Supplement Enhancemant Information, parameter is MppSeiMode */ 126 MPP_ENC_GET_SEI_DATA, /* SEI: Supplement Enhancemant Information, parameter is MppPacket */ 127 MPP_ENC_PRE_ALLOC_BUFF, /* deprecated */ 128 MPP_ENC_SET_QP_RANGE, /* used for adjusting qp range, the parameter can be 1 or 2 */ 129 MPP_ENC_SET_ROI_CFG, /* set MppEncROICfg structure */ 130 MPP_ENC_SET_CTU_QP, /* for H265 Encoder,set CTU's size and QP */ 131 132 /* User define rate control stategy API control */ 133 MPP_ENC_CFG_RC_API = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_RC_API, 134 /* 135 * Get RcApiQueryAll structure 136 * Get all available rate control stategy string and count 137 */ 138 MPP_ENC_GET_RC_API_ALL = MPP_ENC_CFG_RC_API + 1, 139 /* 140 * Get RcApiQueryType structure 141 * Get available rate control stategy string with certain type 142 */ 143 MPP_ENC_GET_RC_API_BY_TYPE = MPP_ENC_CFG_RC_API + 2, 144 /* 145 * Set RcImplApi structure 146 * Add new or update rate control stategy function pointers 147 */ 148 MPP_ENC_SET_RC_API_CFG = MPP_ENC_CFG_RC_API + 3, 149 /* 150 * Get RcApiBrief structure 151 * Get current used rate control stategy brief information (type and name) 152 */ 153 MPP_ENC_GET_RC_API_CURRENT = MPP_ENC_CFG_RC_API + 4, 154 /* 155 * Set RcApiBrief structure 156 * Set current used rate control stategy brief information (type and name) 157 */ 158 MPP_ENC_SET_RC_API_CURRENT = MPP_ENC_CFG_RC_API + 5, 159 160 MPP_ENC_CFG_MISC = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_MISC, 161 /* set MppEncHeaderMode */ 162 MPP_ENC_SET_HEADER_MODE, 163 /* get MppEncHeaderMode */ 164 MPP_ENC_GET_HEADER_MODE, 165 166 MPP_ENC_CFG_SPLIT = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_SPLIT, 167 /* set MppEncSliceSplit structure */ 168 MPP_ENC_SET_SPLIT, 169 /* get MppEncSliceSplit structure */ 170 MPP_ENC_GET_SPLIT, 171 172 MPP_ENC_CFG_REF = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_REF, 173 /* set MppEncRefCfg structure */ 174 MPP_ENC_SET_REF_CFG, 175 176 MPP_ENC_CFG_OSD = CMD_MODULE_CODEC | CMD_CTX_ID_ENC | CMD_ENC_CFG_OSD, 177 /* set OSD palette, parameter should be pointer to MppEncOSDPltCfg */ 178 MPP_ENC_SET_OSD_PLT_CFG, 179 /* get OSD palette, parameter should be pointer to MppEncOSDPltCfg */ 180 MPP_ENC_GET_OSD_PLT_CFG, 181 /* set OSD data with at most 8 regions, parameter should be pointer to MppEncOSDData */ 182 MPP_ENC_SET_OSD_DATA_CFG, 183 184 MPP_ENC_CMD_END, 185 186 MPP_ISP_CMD_BASE = CMD_MODULE_CODEC | CMD_CTX_ID_ISP, 187 MPP_ISP_CMD_END, 188 189 MPP_HAL_CMD_BASE = CMD_MODULE_HAL, 190 MPP_HAL_CMD_END, 191 192 MPI_CMD_BUTT, 193 } MpiCmd; 194 195 #endif /* __RK_MPI_CMD_H__ */ 196