1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3 * Driver for 8250/16550-type serial ports
4 *
5 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
6 *
7 * Copyright (C) 2001 Russell King.
8 */
9 #ifndef COMMON_SDK_LINUX_DRIVERS_TTY_SERIAL_8250_8250_H
10 #define COMMON_SDK_LINUX_DRIVERS_TTY_SERIAL_8250_8250_H
11
12 #include <linux/serial_8250.h>
13 #include <linux/serial_reg.h>
14 #include <linux/dmaengine.h>
15
16 #include "../serial_mctrl_gpio.h"
17
18 struct uart_8250_dma {
19 int (*tx_dma)(struct uart_8250_port *p);
20 int (*rx_dma)(struct uart_8250_port *p);
21
22 /* Filter function */
23 dma_filter_fn fn;
24 /* Parameter to the filter function */
25 void *rx_param;
26 void *tx_param;
27
28 struct dma_slave_config rxconf;
29 struct dma_slave_config txconf;
30
31 struct dma_chan *rxchan;
32 struct dma_chan *txchan;
33
34 /* Device address base for DMA operations */
35 phys_addr_t rx_dma_addr;
36 phys_addr_t tx_dma_addr;
37
38 /* DMA address of the buffer in memory */
39 dma_addr_t rx_addr;
40 dma_addr_t tx_addr;
41
42 dma_cookie_t rx_cookie;
43 dma_cookie_t tx_cookie;
44
45 void *rx_buf;
46
47 size_t rx_size;
48 size_t tx_size;
49
50 unsigned char tx_running;
51 unsigned char tx_err;
52 unsigned char rx_running;
53 #if defined(CONFIG_ARCH_ROCKCHIP) && defined(CONFIG_NO_GKI)
54 size_t rx_index;
55 #endif
56 };
57
58 struct old_serial_port {
59 unsigned int uart;
60 unsigned int baud_base;
61 unsigned int port;
62 unsigned int irq;
63 upf_t flags;
64 unsigned char io_type;
65 unsigned char __iomem *iomem_base;
66 unsigned short iomem_reg_shift;
67 };
68
69 struct serial8250_config {
70 const char *name;
71 unsigned short fifo_size;
72 unsigned short tx_loadsz;
73 unsigned char fcr;
74 unsigned char rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
75 unsigned int flags;
76 };
77
78 #define UART_CAP_FIFO (1 << 8) /* UART has FIFO */
79 #define UART_CAP_EFR (1 << 9) /* UART has EFR */
80 #define UART_CAP_SLEEP (1 << 10) /* UART has IER sleep */
81 #define UART_CAP_AFE (1 << 11) /* MCR-based hw flow control */
82 #define UART_CAP_UUE (1 << 12) /* UART needs IER bit 6 set (Xscale) */
83 #define UART_CAP_RTOIE (1 << 13) /* UART needs IER bit 4 set (Xscale, Tegra) */
84 #define UART_CAP_HFIFO (1 << 14) /* UART has a "hidden" FIFO */
85 #define UART_CAP_RPM (1 << 15) /* Runtime PM is active while idle */
86 #define UART_CAP_IRDA (1 << 16) /* UART supports IrDA line discipline */
87 #define UART_CAP_MINI \
88 (1 << 17) /* Mini UART on BCM283X family lacks: \
89 * STOP PARITY EPAR SPAR WLEN5 WLEN6 \
90 */
91
92 #define UART_BUG_QUOT (1 << 0) /* UART has buggy quot LSB */
93 #define UART_BUG_TXEN (1 << 1) /* UART has buggy TX IIR status */
94 #define UART_BUG_NOMSR (1 << 2) /* UART has buggy MSR status bits (Au1x00) */
95 #define UART_BUG_THRE (1 << 3) /* UART has buggy THRE reassertion */
96 #define UART_BUG_PARITY (1 << 4) /* UART mishandles parity if FIFO enabled */
97 #define UART_BUG_TXRACE (1 << 5) /* UART Tx fails to set remote DR */
98
99 #ifdef CONFIG_SERIAL_8250_SHARE_IRQ
100 #define SERIAL8250_SHARE_IRQS 1
101 #else
102 #define SERIAL8250_SHARE_IRQS 0
103 #endif
104
105 #define SERIAL8250_PORT_FLAGS(_base, _irq, _flags) \
106 { \
107 .iobase = (_base), .irq = (_irq), .uartclk = 1843200, .iotype = UPIO_PORT, \
108 .flags = UPF_BOOT_AUTOCONF | (_flags), \
109 }
110
111 #define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0)
112
serial_in(struct uart_8250_port * up,int offset)113 static inline int serial_in(struct uart_8250_port *up, int offset)
114 {
115 return up->port.serial_in(&up->port, offset);
116 }
117
serial_out(struct uart_8250_port * up,int offset,int value)118 static inline void serial_out(struct uart_8250_port *up, int offset, int value)
119 {
120 up->port.serial_out(&up->port, offset, value);
121 }
serial_icr_write(struct uart_8250_port * up,int offset,int value)122 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
123 {
124 serial_out(up, UART_SCR, offset);
125 serial_out(up, UART_ICR, value);
126 }
127
serial_icr_read(struct uart_8250_port * up,int offset)128 static unsigned int __maybe_unused serial_icr_read(struct uart_8250_port *up,
129 int offset)
130 {
131 unsigned int value;
132
133 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
134 serial_out(up, UART_SCR, offset);
135 value = serial_in(up, UART_ICR);
136 serial_icr_write(up, UART_ACR, up->acr);
137
138 return value;
139 }
140
141 void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
142
serial_dl_read(struct uart_8250_port * up)143 static inline int serial_dl_read(struct uart_8250_port *up)
144 {
145 return up->dl_read(up);
146 }
147
serial_dl_write(struct uart_8250_port * up,int value)148 static inline void serial_dl_write(struct uart_8250_port *up, int value)
149 {
150 up->dl_write(up, value);
151 }
152
serial8250_set_THRI(struct uart_8250_port * up)153 static inline bool serial8250_set_THRI(struct uart_8250_port *up)
154 {
155 if (up->ier & UART_IER_THRI) {
156 return false;
157 }
158 up->ier |= UART_IER_THRI;
159 #if defined(CONFIG_ARCH_ROCKCHIP) && defined(CONFIG_NO_GKI)
160 up->ier |= UART_IER_PTIME;
161 #endif
162 serial_out(up, UART_IER, up->ier);
163 return true;
164 }
165
serial8250_clear_THRI(struct uart_8250_port * up)166 static inline bool serial8250_clear_THRI(struct uart_8250_port *up)
167 {
168 if (!(up->ier & UART_IER_THRI)) {
169 return false;
170 }
171 up->ier &= ~UART_IER_THRI;
172 serial_out(up, UART_IER, up->ier);
173 return true;
174 }
175
176 struct uart_8250_port *serial8250_get_port(int line);
177
178 void serial8250_rpm_get(struct uart_8250_port *p);
179 void serial8250_rpm_put(struct uart_8250_port *p);
180
181 void serial8250_rpm_get_tx(struct uart_8250_port *p);
182 void serial8250_rpm_put_tx(struct uart_8250_port *p);
183
184 int serial8250_em485_config(struct uart_port *port, struct serial_rs485 *rs485);
185 void serial8250_em485_start_tx(struct uart_8250_port *p);
186 void serial8250_em485_stop_tx(struct uart_8250_port *p);
187 void serial8250_em485_destroy(struct uart_8250_port *p);
188
189 /* MCR <-> TIOCM conversion */
serial8250_TIOCM_to_MCR(int tiocm)190 static inline int serial8250_TIOCM_to_MCR(int tiocm)
191 {
192 int mcr = 0;
193
194 if (tiocm & TIOCM_RTS) {
195 mcr |= UART_MCR_RTS;
196 }
197 if (tiocm & TIOCM_DTR) {
198 mcr |= UART_MCR_DTR;
199 }
200 if (tiocm & TIOCM_OUT1) {
201 mcr |= UART_MCR_OUT1;
202 }
203 if (tiocm & TIOCM_OUT2) {
204 mcr |= UART_MCR_OUT2;
205 }
206 if (tiocm & TIOCM_LOOP) {
207 mcr |= UART_MCR_LOOP;
208 }
209
210 return mcr;
211 }
212
serial8250_MCR_to_TIOCM(int mcr)213 static inline int serial8250_MCR_to_TIOCM(int mcr)
214 {
215 int tiocm = 0;
216
217 if (mcr & UART_MCR_RTS) {
218 tiocm |= TIOCM_RTS;
219 }
220 if (mcr & UART_MCR_DTR) {
221 tiocm |= TIOCM_DTR;
222 }
223 if (mcr & UART_MCR_OUT1) {
224 tiocm |= TIOCM_OUT1;
225 }
226 if (mcr & UART_MCR_OUT2) {
227 tiocm |= TIOCM_OUT2;
228 }
229 if (mcr & UART_MCR_LOOP) {
230 tiocm |= TIOCM_LOOP;
231 }
232
233 return tiocm;
234 }
235
236 /* MSR <-> TIOCM conversion */
serial8250_MSR_to_TIOCM(int msr)237 static inline int serial8250_MSR_to_TIOCM(int msr)
238 {
239 int tiocm = 0;
240
241 if (msr & UART_MSR_DCD) {
242 tiocm |= TIOCM_CAR;
243 }
244 if (msr & UART_MSR_RI) {
245 tiocm |= TIOCM_RNG;
246 }
247 if (msr & UART_MSR_DSR) {
248 tiocm |= TIOCM_DSR;
249 }
250 if (msr & UART_MSR_CTS) {
251 tiocm |= TIOCM_CTS;
252 }
253
254 return tiocm;
255 }
256
serial8250_out_MCR(struct uart_8250_port * up,int value)257 static inline void serial8250_out_MCR(struct uart_8250_port *up, int value)
258 {
259 serial_out(up, UART_MCR, value);
260
261 if (up->gpios) {
262 mctrl_gpio_set(up->gpios, serial8250_MCR_to_TIOCM(value));
263 }
264 }
265
serial8250_in_MCR(struct uart_8250_port * up)266 static inline int serial8250_in_MCR(struct uart_8250_port *up)
267 {
268 int mctrl;
269
270 mctrl = serial_in(up, UART_MCR);
271
272 if (up->gpios) {
273 unsigned int mctrl_gpio = 0;
274
275 mctrl_gpio = mctrl_gpio_get_outputs(up->gpios, &mctrl_gpio);
276 mctrl |= serial8250_TIOCM_to_MCR(mctrl_gpio);
277 }
278
279 return mctrl;
280 }
281
282 #if defined(__alpha__) && !defined(CONFIG_PCI)
283 /*
284 * Digital did something really horribly wrong with the OUT1 and OUT2
285 * lines on at least some ALPHA's. The failure mode is that if either
286 * is cleared, the machine locks up with endless interrupts.
287 */
288 #define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 | UART_MCR_OUT1)
289 #else
290 #define ALPHA_KLUDGE_MCR 0
291 #endif
292
293 #ifdef CONFIG_SERIAL_8250_PNP
294 int serial8250_pnp_init(void);
295 void serial8250_pnp_exit(void);
296 #else
serial8250_pnp_init(void)297 static inline int serial8250_pnp_init(void)
298 {
299 return 0;
300 }
serial8250_pnp_exit(void)301 static inline void serial8250_pnp_exit(void)
302 {
303 }
304 #endif
305
306 #ifdef CONFIG_SERIAL_8250_FINTEK
307 int fintek_8250_probe(struct uart_8250_port *uart);
308 #else
fintek_8250_probe(struct uart_8250_port * uart)309 static inline int fintek_8250_probe(struct uart_8250_port *uart)
310 {
311 return 0;
312 }
313 #endif
314
315 #ifdef CONFIG_ARCH_OMAP1
is_omap1_8250(struct uart_8250_port * pt)316 static inline int is_omap1_8250(struct uart_8250_port *pt)
317 {
318 int res;
319
320 switch (pt->port.mapbase) {
321 case OMAP1_UART1_BASE:
322 case OMAP1_UART2_BASE:
323 case OMAP1_UART3_BASE:
324 res = 1;
325 break;
326 default:
327 res = 0;
328 break;
329 }
330
331 return res;
332 }
333
is_omap1510_8250(struct uart_8250_port * pt)334 static inline int is_omap1510_8250(struct uart_8250_port *pt)
335 {
336 if (!cpu_is_omap1510()) {
337 return 0;
338 }
339
340 return is_omap1_8250(pt);
341 }
342 #else
is_omap1_8250(struct uart_8250_port * pt)343 static inline int is_omap1_8250(struct uart_8250_port *pt)
344 {
345 return 0;
346 }
is_omap1510_8250(struct uart_8250_port * pt)347 static inline int is_omap1510_8250(struct uart_8250_port *pt)
348 {
349 return 0;
350 }
351 #endif
352
353 #ifdef CONFIG_SERIAL_8250_DMA
354 extern int serial8250_tx_dma(struct uart_8250_port *);
355 extern int serial8250_rx_dma(struct uart_8250_port *);
356 #if defined(CONFIG_ARCH_ROCKCHIP) && defined(CONFIG_NO_GKI)
357 extern int serial8250_start_rx_dma(struct uart_8250_port *);
358 #endif
359 extern void serial8250_rx_dma_flush(struct uart_8250_port *);
360 extern int serial8250_request_dma(struct uart_8250_port *);
361 extern void serial8250_release_dma(struct uart_8250_port *);
362 #else
serial8250_tx_dma(struct uart_8250_port * p)363 static inline int serial8250_tx_dma(struct uart_8250_port *p)
364 {
365 return -1;
366 }
serial8250_rx_dma(struct uart_8250_port * p)367 static inline int serial8250_rx_dma(struct uart_8250_port *p)
368 {
369 return -1;
370 }
371 #if defined(CONFIG_ARCH_ROCKCHIP) && defined(CONFIG_NO_GKI)
serial8250_start_rx_dma(struct uart_8250_port * p)372 static inline int serial8250_start_rx_dma(struct uart_8250_port *p)
373 {
374 return -1;
375 }
376 #endif
serial8250_rx_dma_flush(struct uart_8250_port * p)377 static inline void serial8250_rx_dma_flush(struct uart_8250_port *p)
378 {
379 }
serial8250_request_dma(struct uart_8250_port * p)380 static inline int serial8250_request_dma(struct uart_8250_port *p)
381 {
382 return -1;
383 }
serial8250_release_dma(struct uart_8250_port * p)384 static inline void serial8250_release_dma(struct uart_8250_port *p)
385 {
386 }
387 #endif
388
ns16550a_goto_highspeed(struct uart_8250_port * up)389 static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
390 {
391 unsigned char status;
392
393 status = serial_in(up, 0x04); /* EXCR2 */
394 #define PRESL(x) ((x)&0x30)
395 if (PRESL(status) == 0x10) {
396 /* already in high speed mode */
397 return 0;
398 } else {
399 status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
400 status |= 0x10; /* 1.625 divisor for baud_base --> 921600 */
401 serial_out(up, 0x04, status);
402 }
403 return 1;
404 }
405
serial_index(struct uart_port * port)406 static inline int serial_index(struct uart_port *port)
407 {
408 return port->minor - 0x40;
409 }
410 #endif
411