1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Pinctrl driver for Rockchip RK806 PMIC
4 *
5 * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
6 *
7 * Author: Xu Shengfei <xsf@rock-chips.com>
8 */
9
10 #include <linux/gpio/driver.h>
11 #include <linux/kernel.h>
12 #include <linux/mfd/rk806.h>
13 #include <linux/module.h>
14 #include <linux/of.h>
15 #include <linux/of_device.h>
16 #include <linux/pinctrl/consumer.h>
17 #include <linux/pinctrl/machine.h>
18 #include <linux/pinctrl/pinconf-generic.h>
19 #include <linux/pinctrl/pinconf.h>
20 #include <linux/pinctrl/pinctrl.h>
21 #include <linux/pinctrl/pinmux.h>
22 #include <linux/platform_device.h>
23 #include <linux/pm.h>
24 #include <linux/slab.h>
25 #include "pinctrl-utils.h"
26
27 struct rk806_pin_function {
28 const char *name;
29 const char *const *groups;
30 unsigned int ngroups;
31 int mux_option;
32 };
33
34 struct rk806_pin_group {
35 const char *name;
36 const unsigned int pins[1];
37 unsigned int npins;
38 };
39
40 /*
41 * @reg: gpio setting register;
42 * @fun_mask: functions select mask value, when set is gpio;
43 * @dir_mask: input or output mask value, when set is output, otherwise input;
44 * @val_mask: gpio set value, when set is level high, otherwise low;
45 *
46 * Different PMIC has different pin features, belowing 3 mask members are not
47 * all necessary for every PMIC. For example, RK805 has 2 pins that can be used
48 * as output only GPIOs, so func_mask and dir_mask are not needed. RK816 has 1
49 * pin that can be used as TS/GPIO, so fun_mask, dir_mask and val_mask are all
50 * necessary.
51 */
52 struct rk806_pin_config {
53 u8 fun_reg;
54 u8 fun_msk;
55 u8 reg;
56 u8 dir_msk;
57 u8 val_msk;
58 };
59
60 struct rk806_pctrl_info {
61 struct rk806 *rk806;
62 struct device *dev;
63 struct pinctrl_dev *pctl;
64 struct gpio_chip gpio_chip;
65 struct pinctrl_desc pinctrl_desc;
66 const struct rk806_pin_function *functions;
67 unsigned int num_functions;
68 const struct rk806_pin_group *groups;
69 int num_pin_groups;
70 const struct pinctrl_pin_desc *pins;
71 unsigned int num_pins;
72 const struct rk806_pin_config *pin_cfg;
73 };
74
75 #define RK806_PWRCTRL1_DR BIT(0)
76 #define RK806_PWRCTRL2_DR BIT(1)
77 #define RK806_PWRCTRL3_DR BIT(2)
78 #define RK806_PWRCTRL1_DATA BIT(4)
79 #define RK806_PWRCTRL2_DATA BIT(5)
80 #define RK806_PWRCTRL3_DATA BIT(6)
81 #define RK806_PWRCTRL1_FUN 0x07
82 #define RK806_PWRCTRL2_FUN 0x70
83 #define RK806_PWRCTRL3_FUN 0x07
84
85 enum rk806_pinmux_option {
86 RK806_PINMUX_FUN0 = 0,
87 RK806_PINMUX_FUN1,
88 RK806_PINMUX_FUN2,
89 RK806_PINMUX_FUN3,
90 RK806_PINMUX_FUN4,
91 RK806_PINMUX_FUN5,
92 };
93
94 enum {
95 RK806_GPIO_DVS1,
96 RK806_GPIO_DVS2,
97 RK806_GPIO_DVS3
98 };
99
100 static const char *const rk806_gpio_groups[] = {
101 "gpio_pwrctrl1",
102 "gpio_pwrctrl2",
103 "gpio_pwrctrl3",
104 };
105
106 static const struct pinctrl_pin_desc rk806_pins_desc[] = {
107 PINCTRL_PIN(RK806_GPIO_DVS1, "gpio_pwrctrl1"), /* dvs1 pin */
108 PINCTRL_PIN(RK806_GPIO_DVS2, "gpio_pwrctrl2"), /* dvs2 pin */
109 PINCTRL_PIN(RK806_GPIO_DVS3, "gpio_pwrctrl3") /* dvs3 pin */
110 };
111
112 static const struct rk806_pin_function rk806_pin_functions[] = {
113 {
114 .name = "pin_fun0",
115 .groups = rk806_gpio_groups,
116 .ngroups = ARRAY_SIZE(rk806_gpio_groups),
117 .mux_option = RK806_PINMUX_FUN0,
118 },
119 {
120 .name = "pin_fun1",
121 .groups = rk806_gpio_groups,
122 .ngroups = ARRAY_SIZE(rk806_gpio_groups),
123 .mux_option = RK806_PINMUX_FUN1,
124 },
125 {
126 .name = "pin_fun2",
127 .groups = rk806_gpio_groups,
128 .ngroups = ARRAY_SIZE(rk806_gpio_groups),
129 .mux_option = RK806_PINMUX_FUN2,
130 },
131 {
132 .name = "pin_fun3",
133 .groups = rk806_gpio_groups,
134 .ngroups = ARRAY_SIZE(rk806_gpio_groups),
135 .mux_option = RK806_PINMUX_FUN3,
136 },
137 {
138 .name = "pin_fun4",
139 .groups = rk806_gpio_groups,
140 .ngroups = ARRAY_SIZE(rk806_gpio_groups),
141 .mux_option = RK806_PINMUX_FUN4,
142 },
143 {
144 .name = "pin_fun5",
145 .groups = rk806_gpio_groups,
146 .ngroups = ARRAY_SIZE(rk806_gpio_groups),
147 .mux_option = RK806_PINMUX_FUN5,
148 },
149
150 };
151
152 static const struct rk806_pin_group rk806_pin_groups[] = {
153 {
154 .name = "gpio_pwrctrl1",
155 .pins = { RK806_GPIO_DVS1 },
156 .npins = 1,
157 },
158 {
159 .name = "gpio_pwrctrl2",
160 .pins = { RK806_GPIO_DVS2 },
161 .npins = 1,
162 },
163 {
164 .name = "gpio_pwrctrl3",
165 .pins = { RK806_GPIO_DVS3 },
166 .npins = 1,
167 }
168 };
169
170 static struct rk806_pin_config rk806_gpio_cfgs[] = {
171 {
172 .fun_reg = RK806_SLEEP_CONFIG0,
173 .fun_msk = RK806_PWRCTRL1_FUN,
174 .reg = RK806_SLEEP_GPIO,
175 .val_msk = RK806_PWRCTRL1_DATA,
176 .dir_msk = RK806_PWRCTRL1_DR,
177 },
178 {
179 .fun_reg = RK806_SLEEP_CONFIG0,
180 .fun_msk = RK806_PWRCTRL2_FUN,
181 .reg = RK806_SLEEP_GPIO,
182 .val_msk = RK806_PWRCTRL2_DATA,
183 .dir_msk = RK806_PWRCTRL2_DR,
184 },
185 {
186 .fun_reg = RK806_SLEEP_CONFIG1,
187 .fun_msk = RK806_PWRCTRL3_FUN,
188 .reg = RK806_SLEEP_GPIO,
189 .val_msk = RK806_PWRCTRL3_DATA,
190 .dir_msk = RK806_PWRCTRL3_DR,
191 }
192 };
193
194 /* generic gpio chip */
rk806_gpio_get(struct gpio_chip * chip,unsigned int offset)195 static int rk806_gpio_get(struct gpio_chip *chip, unsigned int offset)
196 {
197 struct rk806_pctrl_info *pci = gpiochip_get_data(chip);
198 int ret, val;
199
200 if (!pci->pin_cfg[offset].val_msk) {
201 dev_dbg(pci->dev, "getting gpio%d value is not support\n",
202 offset);
203 return -1;
204 }
205
206 ret = regmap_read(pci->rk806->regmap, pci->pin_cfg[offset].reg, &val);
207 if (ret) {
208 dev_err(pci->dev, "get gpio%d value failed\n", offset);
209 return ret;
210 }
211
212 return !!(val & pci->pin_cfg[offset].val_msk);
213 }
214
rk806_gpio_set(struct gpio_chip * chip,unsigned int offset,int value)215 static void rk806_gpio_set(struct gpio_chip *chip,
216 unsigned int offset,
217 int value)
218 {
219 struct rk806_pctrl_info *pci = gpiochip_get_data(chip);
220 int ret;
221
222 if (!pci->pin_cfg[offset].val_msk)
223 return;
224
225 ret = regmap_update_bits(pci->rk806->regmap,
226 pci->pin_cfg[offset].reg,
227 pci->pin_cfg[offset].val_msk,
228 value ? pci->pin_cfg[offset].val_msk : 0);
229 if (ret)
230 dev_err(pci->dev, "set gpio%d value %d failed\n",
231 offset, value);
232 }
233
rk806_gpio_direction_input(struct gpio_chip * chip,unsigned int offset)234 static int rk806_gpio_direction_input(struct gpio_chip *chip,
235 unsigned int offset)
236 {
237 return pinctrl_gpio_direction_input(chip->base + offset);
238 }
239
rk806_gpio_direction_output(struct gpio_chip * chip,unsigned int offset,int value)240 static int rk806_gpio_direction_output(struct gpio_chip *chip,
241 unsigned int offset,
242 int value)
243 {
244 rk806_gpio_set(chip, offset, value);
245 return pinctrl_gpio_direction_output(chip->base + offset);
246 }
247
rk806_gpio_get_direction(struct gpio_chip * chip,unsigned int offset)248 static int rk806_gpio_get_direction(struct gpio_chip *chip,
249 unsigned int offset)
250 {
251 struct rk806_pctrl_info *pci = gpiochip_get_data(chip);
252 unsigned int val;
253 int ret;
254
255 /* default output */
256 if (!pci->pin_cfg[offset].dir_msk)
257 return 0;
258
259 ret = regmap_read(pci->rk806->regmap,
260 pci->pin_cfg[offset].reg,
261 &val);
262 if (ret) {
263 dev_err(pci->dev, "get gpio%d direction failed\n", offset);
264 return ret;
265 }
266
267 return !(val & pci->pin_cfg[offset].dir_msk);
268 }
269
270 static struct gpio_chip rk806_gpio_chip = {
271 .label = "rk806-gpio",
272 .request = gpiochip_generic_request,
273 .free = gpiochip_generic_free,
274 .get_direction = rk806_gpio_get_direction,
275 .get = rk806_gpio_get,
276 .set = rk806_gpio_set,
277 .direction_input = rk806_gpio_direction_input,
278 .direction_output = rk806_gpio_direction_output,
279 .can_sleep = true,
280 .base = -1,
281 .owner = THIS_MODULE,
282 };
283
284 /* generic pinctrl */
rk806_pinctrl_get_groups_count(struct pinctrl_dev * pctldev)285 static int rk806_pinctrl_get_groups_count(struct pinctrl_dev *pctldev)
286 {
287 struct rk806_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
288
289 return pci->num_pin_groups;
290 }
291
rk806_pinctrl_get_group_name(struct pinctrl_dev * pctldev,unsigned int group)292 static const char *rk806_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
293 unsigned int group)
294 {
295 struct rk806_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
296
297 return pci->groups[group].name;
298 }
299
rk806_pinctrl_get_group_pins(struct pinctrl_dev * pctldev,unsigned int group,const unsigned int ** pins,unsigned int * num_pins)300 static int rk806_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
301 unsigned int group,
302 const unsigned int **pins,
303 unsigned int *num_pins)
304 {
305 struct rk806_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
306
307 *pins = pci->groups[group].pins;
308 *num_pins = pci->groups[group].npins;
309
310 return 0;
311 }
312
313 static const struct pinctrl_ops rk806_pinctrl_ops = {
314 .get_groups_count = rk806_pinctrl_get_groups_count,
315 .get_group_name = rk806_pinctrl_get_group_name,
316 .get_group_pins = rk806_pinctrl_get_group_pins,
317 .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
318 .dt_free_map = pinctrl_utils_free_map,
319 };
320
rk806_pinctrl_get_funcs_count(struct pinctrl_dev * pctldev)321 static int rk806_pinctrl_get_funcs_count(struct pinctrl_dev *pctldev)
322 {
323 struct rk806_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
324
325 return pci->num_functions;
326 }
327
rk806_pinctrl_get_func_name(struct pinctrl_dev * pctldev,unsigned int function)328 static const char *rk806_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
329 unsigned int function)
330 {
331 struct rk806_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
332
333 return pci->functions[function].name;
334 }
335
rk806_pinctrl_get_func_groups(struct pinctrl_dev * pctldev,unsigned int function,const char * const ** groups,unsigned int * const num_groups)336 static int rk806_pinctrl_get_func_groups(struct pinctrl_dev *pctldev,
337 unsigned int function,
338 const char *const **groups,
339 unsigned int *const num_groups)
340 {
341 struct rk806_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
342
343 *groups = pci->functions[function].groups;
344 *num_groups = pci->functions[function].ngroups;
345
346 return 0;
347 }
348
_rk806_pinctrl_set_mux(struct pinctrl_dev * pctldev,unsigned int offset,int mux)349 static int _rk806_pinctrl_set_mux(struct pinctrl_dev *pctldev,
350 unsigned int offset,
351 int mux)
352 {
353 struct rk806_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
354 int ret;
355
356 if (!pci->pin_cfg[offset].fun_msk)
357 return 0;
358
359 mux <<= ffs(pci->pin_cfg[offset].fun_msk) - 1;
360 ret = regmap_update_bits(pci->rk806->regmap,
361 pci->pin_cfg[offset].fun_reg,
362 pci->pin_cfg[offset].fun_msk, mux);
363
364 if (ret)
365 dev_err(pci->dev, "set gpio%d func%d failed\n", offset, mux);
366
367 return ret;
368 }
369
rk806_pinctrl_set_mux(struct pinctrl_dev * pctldev,unsigned int function,unsigned int group)370 static int rk806_pinctrl_set_mux(struct pinctrl_dev *pctldev,
371 unsigned int function,
372 unsigned int group)
373 {
374 struct rk806_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
375 int mux = pci->functions[function].mux_option;
376 int offset = group;
377
378 return _rk806_pinctrl_set_mux(pctldev, offset, mux);
379 }
380
rk806_pmx_gpio_set_direction(struct pinctrl_dev * pctldev,struct pinctrl_gpio_range * range,unsigned int offset,bool input)381 static int rk806_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
382 struct pinctrl_gpio_range *range,
383 unsigned int offset, bool input)
384 {
385 struct rk806_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
386 int ret;
387
388 /* set direction */
389 if (!pci->pin_cfg[offset].dir_msk)
390 return 0;
391
392 ret = regmap_update_bits(pci->rk806->regmap,
393 pci->pin_cfg[offset].reg,
394 pci->pin_cfg[offset].dir_msk,
395 input ? 0 : pci->pin_cfg[offset].dir_msk);
396 if (ret) {
397 dev_err(pci->dev, "set gpio%d direction failed\n", offset);
398 return ret;
399 }
400
401 return ret;
402 }
403
rk806_pinctrl_gpio_request_enable(struct pinctrl_dev * pctldev,struct pinctrl_gpio_range * range,unsigned int offset)404 static int rk806_pinctrl_gpio_request_enable(struct pinctrl_dev *pctldev,
405 struct pinctrl_gpio_range *range,
406 unsigned int offset)
407 {
408 return _rk806_pinctrl_set_mux(pctldev, offset, RK806_PINMUX_FUN5);
409 }
410
411 static const struct pinmux_ops rk806_pinmux_ops = {
412 .gpio_request_enable = rk806_pinctrl_gpio_request_enable,
413 .get_functions_count = rk806_pinctrl_get_funcs_count,
414 .get_function_name = rk806_pinctrl_get_func_name,
415 .get_function_groups = rk806_pinctrl_get_func_groups,
416 .set_mux = rk806_pinctrl_set_mux,
417 .gpio_set_direction = rk806_pmx_gpio_set_direction,
418 };
419
rk806_pinconf_get(struct pinctrl_dev * pctldev,unsigned int pin,unsigned long * config)420 static int rk806_pinconf_get(struct pinctrl_dev *pctldev,
421 unsigned int pin,
422 unsigned long *config)
423 {
424 struct rk806_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
425 enum pin_config_param param = pinconf_to_config_param(*config);
426 u32 arg = 0;
427
428 switch (param) {
429 case PIN_CONFIG_OUTPUT:
430 case PIN_CONFIG_INPUT_ENABLE:
431 arg = rk806_gpio_get(&pci->gpio_chip, pin);
432 break;
433 default:
434 dev_err(pci->dev, "Properties not supported\n");
435 return -EOPNOTSUPP;
436 }
437
438 *config = pinconf_to_config_packed(param, (u16)arg);
439
440 return 0;
441 }
442
rk806_pinconf_set(struct pinctrl_dev * pctldev,unsigned int pin,unsigned long * configs,unsigned int num_configs)443 static int rk806_pinconf_set(struct pinctrl_dev *pctldev,
444 unsigned int pin,
445 unsigned long *configs,
446 unsigned int num_configs)
447 {
448 struct rk806_pctrl_info *pci = pinctrl_dev_get_drvdata(pctldev);
449 enum pin_config_param param;
450 u32 i, arg = 0;
451
452 for (i = 0; i < num_configs; i++) {
453 param = pinconf_to_config_param(configs[i]);
454 arg = pinconf_to_config_argument(configs[i]);
455
456 switch (param) {
457 case PIN_CONFIG_OUTPUT:
458 rk806_pmx_gpio_set_direction(pctldev, NULL, pin, false);
459 rk806_gpio_set(&pci->gpio_chip, pin, arg);
460 break;
461 case PIN_CONFIG_INPUT_ENABLE:
462 if (arg)
463 rk806_pmx_gpio_set_direction(pctldev,
464 NULL,
465 pin,
466 true);
467 break;
468 default:
469 dev_err(pci->dev, "Properties not supported\n");
470 return -EOPNOTSUPP;
471 }
472 }
473
474 return 0;
475 }
476
477 static const struct pinconf_ops rk806_pinconf_ops = {
478 .pin_config_get = rk806_pinconf_get,
479 .pin_config_set = rk806_pinconf_set,
480 };
481
482 static struct pinctrl_desc rk806_pinctrl_desc = {
483 .name = "rk806-pinctrl",
484 .pctlops = &rk806_pinctrl_ops,
485 .pmxops = &rk806_pinmux_ops,
486 .confops = &rk806_pinconf_ops,
487 .owner = THIS_MODULE,
488 };
489
rk806_pinctrl_probe(struct platform_device * pdev)490 static int rk806_pinctrl_probe(struct platform_device *pdev)
491 {
492 struct rk806_pctrl_info *pci;
493 struct device_node *np;
494 int ret;
495
496 pci = devm_kzalloc(&pdev->dev, sizeof(*pci), GFP_KERNEL);
497 if (!pci)
498 return -ENOMEM;
499
500 pci->dev = &pdev->dev;
501 np = of_get_child_by_name(pdev->dev.parent->of_node, "pinctrl_rk806");
502 if (np)
503 pci->dev->of_node = np;
504 else
505 pci->dev->of_node = pdev->dev.parent->of_node;
506 pci->rk806 = dev_get_drvdata(pdev->dev.parent);
507
508 platform_set_drvdata(pdev, pci);
509
510 pci->pinctrl_desc = rk806_pinctrl_desc;
511 pci->gpio_chip = rk806_gpio_chip;
512 pci->pins = rk806_pins_desc;
513 pci->num_pins = ARRAY_SIZE(rk806_pins_desc);
514 pci->functions = rk806_pin_functions;
515 pci->num_functions = ARRAY_SIZE(rk806_pin_functions);
516 pci->groups = rk806_pin_groups;
517 pci->num_pin_groups = ARRAY_SIZE(rk806_pin_groups);
518 pci->pinctrl_desc.pins = rk806_pins_desc;
519 pci->pinctrl_desc.npins = ARRAY_SIZE(rk806_pins_desc);
520 pci->pin_cfg = rk806_gpio_cfgs;
521 pci->gpio_chip.ngpio = ARRAY_SIZE(rk806_gpio_cfgs);
522
523 pci->gpio_chip.parent = &pdev->dev;
524
525 if (np)
526 pci->gpio_chip.of_node = np;
527 else
528 pci->gpio_chip.of_node = pdev->dev.parent->of_node;
529
530 /* Add gpiochip */
531 ret = devm_gpiochip_add_data(&pdev->dev, &pci->gpio_chip, pci);
532 if (ret < 0) {
533 dev_err(&pdev->dev, "Couldn't add gpiochip\n");
534 return ret;
535 }
536
537 /* Add pinctrl */
538 pci->pctl = devm_pinctrl_register(&pdev->dev, &pci->pinctrl_desc, pci);
539 if (IS_ERR(pci->pctl)) {
540 dev_err(&pdev->dev, "Couldn't add pinctrl\n");
541 return PTR_ERR(pci->pctl);
542 }
543
544 /* Add pin range */
545 ret = gpiochip_add_pin_range(&pci->gpio_chip,
546 dev_name(&pdev->dev),
547 0,
548 0,
549 pci->gpio_chip.ngpio);
550 if (ret < 0) {
551 dev_err(&pdev->dev, "Couldn't add gpiochip pin range\n");
552 return ret;
553 }
554
555 return 0;
556 }
557
558 static struct platform_driver rk806_pinctrl_driver = {
559 .probe = rk806_pinctrl_probe,
560 .driver = {
561 .name = "rk806-pinctrl",
562 },
563 };
564
rk806_pinctrl_driver_register(void)565 static int __init rk806_pinctrl_driver_register(void)
566 {
567 return platform_driver_register(&rk806_pinctrl_driver);
568 }
569 #ifdef CONFIG_ROCKCHIP_THUNDER_BOOT
570 subsys_initcall(rk806_pinctrl_driver_register);
571 #else
572 fs_initcall_sync(rk806_pinctrl_driver_register);
573 #endif
574
575 MODULE_DESCRIPTION("RK806 pin control and GPIO driver");
576 MODULE_AUTHOR("Xu Shengfei <xsf@rock-chips.com>");
577 MODULE_LICENSE("GPL v2");
578