1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Regulator driver for Rockchip RK806
4 *
5 * Copyright (c) 2021 Rockchip Electronics Co., Ltd.
6 *
7 * Author: Xu Shengfei <xsf@rock-chips.com>
8 */
9
10 #include <linux/delay.h>
11 #include <linux/gpio.h>
12 #include <linux/gpio/consumer.h>
13 #include <linux/mfd/rk806.h>
14 #include <linux/mod_devicetable.h>
15 #include <linux/module.h>
16 #include <linux/of_device.h>
17 #include <linux/platform_device.h>
18 #include <linux/regulator/driver.h>
19 #include "internal.h"
20
21 static int dbg_enable;
22
23 module_param_named(dbg_level, dbg_enable, int, 0644);
24
25 #define REG_DBG(args...) \
26 do { \
27 if (dbg_enable) { \
28 pr_info(args); \
29 } \
30 } while (0)
31
32 #define RK806_BUCK_MIN0 500000
33 #define RK806_BUCK_MAX0 1500000
34 #define RK806_BUCK_MIN1 1500000
35 #define RK806_BUCK_MAX1 3400000
36 #define RK806_BUCK_STP0 6250
37 #define RK806_BUCK_STP1 25000
38
39 #define RK806_NLDO_MIN 500000
40 #define RK806_NLDO_MAX 3400000
41 #define RK806_NLDO_STP0 1250
42 #define RK806_NLDO_SEL ((RK806_NLDO_MAX - RK806_NLDO_MIN) / RK806_NLDO_STP0 + 1)
43
44 #define ENABLE_MASK(id) (BIT(id) | BIT(4 + (id)))
45 #define DISABLE_VAL(id) (BIT(4 + (id)))
46 #define PWM_MODE_MSK BIT(0)
47 #define FPWM_MODE BIT(0)
48 #define AUTO_PWM_MODE 0
49
50 #define RK806_DCDC_SLP_REG_OFFSET 0x0A
51 #define RK806_NLDO_SLP_REG_OFFSET 0x05
52 #define RK806_PLDO_SLP_REG_OFFSET 0x06
53
54 #define RK806_BUCK_SEL_CNT 0xff
55 #define RK806_LDO_SEL_CNT 0xff
56
57 #define RK806_RAMP_RATE_4LSB_PER_1CLK 0x00/* LDO 100mV/uS buck 50mV/us */
58 #define RK806_RAMP_RATE_2LSB_PER_1CLK 0x01/* LDO 50mV/uS buck 25mV/us */
59 #define RK806_RAMP_RATE_1LSB_PER_1CLK 0x02/* LDO 25mV/uS buck 12.5mV/us */
60 #define RK806_RAMP_RATE_1LSB_PER_2CLK 0x03/* LDO 12.5mV/uS buck 6.25mV/us */
61
62 #define RK806_RAMP_RATE_1LSB_PER_4CLK 0x04/* LDO 6.28/2mV/uS buck 3.125mV/us */
63 #define RK806_RAMP_RATE_1LSB_PER_8CLK 0x05/* LDO 3.12mV/uS buck 1.56mV/us */
64 #define RK806_RAMP_RATE_1LSB_PER_13CLK 0x06/* LDO 1.9mV/uS buck 961mV/us */
65 #define RK806_RAMP_RATE_1LSB_PER_32CLK 0x07/* LDO 0.78mV/uS buck 0.39mV/us */
66
67 static int vsel_ctr_sel_id[RK806_ID_END] = {
68 BUCK1_VSEL_CTR_SEL,
69 BUCK2_VSEL_CTR_SEL,
70 BUCK3_VSEL_CTR_SEL,
71 BUCK4_VSEL_CTR_SEL,
72 BUCK5_VSEL_CTR_SEL,
73 BUCK6_VSEL_CTR_SEL,
74 BUCK7_VSEL_CTR_SEL,
75 BUCK8_VSEL_CTR_SEL,
76 BUCK9_VSEL_CTR_SEL,
77 BUCK10_VSEL_CTR_SEL,
78 NLDO1_VSEL_CTR_SEL,
79 NLDO2_VSEL_CTR_SEL,
80 NLDO3_VSEL_CTR_SEL,
81 NLDO4_VSEL_CTR_SEL,
82 NLDO5_VSEL_CTR_SEL,
83 PLDO1_VSEL_CTR_SEL,
84 PLDO2_VSEL_CTR_SEL,
85 PLDO3_VSEL_CTR_SEL,
86 PLDO4_VSEL_CTR_SEL,
87 PLDO5_VSEL_CTR_SEL,
88 PLDO6_VSEL_CTR_SEL,
89 };
90
91 static int start_dvs_id[RK806_ID_END] = {
92 BUCK1_DVS_CTR_SEL,
93 BUCK2_DVS_CTR_SEL,
94 BUCK3_DVS_CTR_SEL,
95 BUCK4_DVS_CTR_SEL,
96 BUCK5_DVS_CTR_SEL,
97 BUCK6_DVS_CTR_SEL,
98 BUCK7_DVS_CTR_SEL,
99 BUCK8_DVS_CTR_SEL,
100 BUCK9_DVS_CTR_SEL,
101 BUCK10_DVS_CTR_SEL,
102 NLDO1_DVS_CTR_SEL,
103 NLDO2_DVS_CTR_SEL,
104 NLDO3_DVS_CTR_SEL,
105 NLDO4_DVS_CTR_SEL,
106 NLDO5_DVS_CTR_SEL,
107 PLDO1_DVS_CTR_SEL,
108 PLDO2_DVS_CTR_SEL,
109 PLDO3_DVS_CTR_SEL,
110 PLDO4_DVS_CTR_SEL,
111 PLDO5_DVS_CTR_SEL,
112 PLDO6_DVS_CTR_SEL,
113 };
114
115 static const int rk806_buck_rate_config_field[10][2] = {
116 { BUCK1_RATE, BUCK1_RATE2 },
117 { BUCK2_RATE, BUCK2_RATE2 },
118 { BUCK3_RATE, BUCK3_RATE2 },
119 { BUCK4_RATE, BUCK4_RATE2 },
120 { BUCK5_RATE, BUCK5_RATE2 },
121 { BUCK6_RATE, BUCK6_RATE2 },
122 { BUCK7_RATE, BUCK7_RATE2 },
123 { BUCK8_RATE, BUCK8_RATE2 },
124 { BUCK9_RATE, BUCK9_RATE2 },
125 { BUCK10_RATE, BUCK10_RATE2 },
126 };
127
128 struct rk806_dvs_field {
129 int en_reg;
130 int en_bit;
131 int sleep_en;
132 int on_vsel;
133 int sleep_vsel;
134 int vsel_ctrl_sel;
135 };
136
137 struct rk806_dvs_status {
138 int en_reg_val;
139 int en_bit_val;
140 int sleep_en_val;
141 int on_vsel_val;
142 int sleep_vsel_val;
143 int vsel_ctrl_sel_val;
144 int dvs_gpio_level[3];
145 };
146
147 struct rk806_regulator_data {
148 struct device_node *dvs_dn[RK806_DVS_END][RK806_ID_END];
149 struct rk806_dvs_field dvs_field[RK806_ID_END];
150 struct rk806_dvs_status dvs_mode[RK806_ID_END];
151 struct rk806_dvs_status sleep_mode[RK806_ID_END];
152
153 int dvs_ctrl_mode_init[RK806_ID_END];
154 int dvs_ctrl_mode[RK806_ID_END];
155 int dvs_ctrl_id[RK806_ID_END];
156 int vsel_ctrl_id[RK806_ID_END];
157
158 int dvs_flag[RK806_DVS_END];
159 int dvs_used[RK806_DVS_END];
160 int dvs_count[RK806_DVS_END];
161
162 int regulator_init;
163 int support_dvs;
164 struct gpio_desc *dvs_gpios[3];
165 struct rk806 *rk806;
166 };
167
168 #define INIT_DVS_FIELD(_en_reg, _en_bit, _sleep_en, _on_vsel, \
169 _sleep_vsel, _vsel_ctrl_sel) \
170 { \
171 .en_reg = _en_reg, \
172 .en_bit = _en_bit, \
173 .sleep_en = _sleep_en, \
174 .on_vsel = _on_vsel, \
175 .sleep_vsel = _sleep_vsel, \
176 .vsel_ctrl_sel = _vsel_ctrl_sel, \
177 }
178
179 static const struct rk806_dvs_field rk806_dvs_fields[RK806_ID_END] = {
180 INIT_DVS_FIELD(POWER_EN0, BIT(0), BUCK1_SLP_EN,
181 BUCK1_ON_VSEL, BUCK1_SLP_VSEL, BUCK1_VSEL_CTR_SEL),
182 INIT_DVS_FIELD(POWER_EN0, BIT(1), BUCK2_SLP_EN,
183 BUCK2_ON_VSEL, BUCK2_SLP_VSEL, BUCK2_VSEL_CTR_SEL),
184 INIT_DVS_FIELD(POWER_EN0, BIT(2), BUCK3_SLP_EN,
185 BUCK3_ON_VSEL, BUCK3_SLP_VSEL, BUCK3_VSEL_CTR_SEL),
186 INIT_DVS_FIELD(POWER_EN0, BIT(3), BUCK4_SLP_EN,
187 BUCK4_ON_VSEL, BUCK4_SLP_VSEL, BUCK4_VSEL_CTR_SEL),
188
189 INIT_DVS_FIELD(POWER_EN1, BIT(0), BUCK5_SLP_EN,
190 BUCK5_ON_VSEL, BUCK5_SLP_VSEL, BUCK5_VSEL_CTR_SEL),
191 INIT_DVS_FIELD(POWER_EN1, BIT(1), BUCK6_SLP_EN,
192 BUCK6_ON_VSEL, BUCK6_SLP_VSEL, BUCK6_VSEL_CTR_SEL),
193 INIT_DVS_FIELD(POWER_EN1, BIT(2), BUCK7_SLP_EN,
194 BUCK7_ON_VSEL, BUCK7_SLP_VSEL, BUCK7_VSEL_CTR_SEL),
195 INIT_DVS_FIELD(POWER_EN1, BIT(3), BUCK8_SLP_EN,
196 BUCK8_ON_VSEL, BUCK8_SLP_VSEL, BUCK8_VSEL_CTR_SEL),
197
198 INIT_DVS_FIELD(POWER_EN2, BIT(0), BUCK9_SLP_EN,
199 BUCK9_ON_VSEL, BUCK9_SLP_VSEL, BUCK9_VSEL_CTR_SEL),
200 INIT_DVS_FIELD(POWER_EN2, BIT(1), BUCK10_SLP_EN,
201 BUCK10_ON_VSEL, BUCK10_SLP_VSEL, BUCK10_VSEL_CTR_SEL),
202
203 INIT_DVS_FIELD(POWER_EN3, BIT(0), NLDO1_SLP_EN,
204 NLDO1_ON_VSEL, NLDO1_SLP_VSEL, NLDO1_VSEL_CTR_SEL),
205 INIT_DVS_FIELD(POWER_EN3, BIT(1), NLDO2_SLP_EN,
206 NLDO2_ON_VSEL, NLDO2_SLP_VSEL, NLDO2_VSEL_CTR_SEL),
207 INIT_DVS_FIELD(POWER_EN3, BIT(2), NLDO3_SLP_EN,
208 NLDO3_ON_VSEL, NLDO3_SLP_VSEL, NLDO3_VSEL_CTR_SEL),
209 INIT_DVS_FIELD(POWER_EN3, BIT(3), NLDO4_SLP_EN,
210 NLDO4_ON_VSEL, NLDO4_SLP_VSEL, NLDO4_VSEL_CTR_SEL),
211
212 INIT_DVS_FIELD(POWER_EN5, BIT(2), NLDO5_SLP_EN,
213 NLDO5_ON_VSEL, NLDO5_SLP_VSEL, NLDO5_VSEL_CTR_SEL),
214
215 INIT_DVS_FIELD(POWER_EN4, BIT(1), PLDO1_SLP_EN,
216 PLDO1_ON_VSEL, PLDO1_SLP_VSEL, PLDO1_VSEL_CTR_SEL),
217 INIT_DVS_FIELD(POWER_EN4, BIT(2), PLDO2_SLP_EN,
218 PLDO2_ON_VSEL, PLDO2_SLP_VSEL, PLDO2_VSEL_CTR_SEL),
219 INIT_DVS_FIELD(POWER_EN4, BIT(3), PLDO3_SLP_EN,
220 PLDO3_ON_VSEL, PLDO3_SLP_VSEL, PLDO3_VSEL_CTR_SEL),
221 INIT_DVS_FIELD(POWER_EN5, BIT(0), PLDO4_SLP_EN,
222 PLDO4_ON_VSEL, PLDO4_SLP_VSEL, PLDO4_VSEL_CTR_SEL),
223
224 INIT_DVS_FIELD(POWER_EN5, BIT(1), PLDO5_SLP_EN,
225 PLDO5_ON_VSEL, PLDO5_SLP_VSEL, PLDO5_VSEL_CTR_SEL),
226 INIT_DVS_FIELD(POWER_EN4, BIT(0), PLDO6_SLP_EN,
227 PLDO6_ON_VSEL, PLDO6_SLP_VSEL, PLDO6_VSEL_CTR_SEL),
228 };
229
230 static const struct linear_range rk806_buck_voltage_ranges[] = {
231 REGULATOR_LINEAR_RANGE(500000, 0, 160, 6250), /* 500mV ~ 1500mV */
232 REGULATOR_LINEAR_RANGE(1500000, 161, 237, 25000), /* 1500mV ~ 3400mV */
233 REGULATOR_LINEAR_RANGE(3400000, 238, 255, 0),
234 };
235
236 static const struct linear_range rk806_ldo_voltage_ranges[] = {
237 REGULATOR_LINEAR_RANGE(500000, 0, 232, 12500), /* 500mV ~ 3400mV */
238 REGULATOR_LINEAR_RANGE(3400000, 233, 255, 0), /* 500mV ~ 3400mV */
239 };
240
get_count(int value)241 static int get_count(int value)
242 {
243 int count = 0;
244
245 while (value != 0) {
246 if (value % 2 == 1)
247 count++;
248 value >>= 1;
249 }
250
251 return count;
252 }
253
rk806_dvs_start_fun_init(struct regulator_dev * rdev)254 static void rk806_dvs_start_fun_init(struct regulator_dev *rdev)
255 {
256 struct rk806_regulator_data *pdata = rdev_get_drvdata(rdev);
257 struct rk806 *rk806 = pdata->rk806;
258 int rid = rdev_get_id(rdev);
259
260 rk806_field_write(rk806,
261 pdata->dvs_ctrl_id[rid],
262 pdata->dvs_ctrl_mode[rid]);
263 }
264
rk806_dvs_pwrctrl_fun_init(struct regulator_dev * rdev)265 static void rk806_dvs_pwrctrl_fun_init(struct regulator_dev *rdev)
266 {
267 struct rk806_regulator_data *pdata = rdev_get_drvdata(rdev);
268 struct rk806 *rk806 = pdata->rk806;
269 int rid = rdev_get_id(rdev);
270 int offset;
271
272 /* init dvs pin function */
273 offset = pdata->dvs_ctrl_mode[rid] - RK806_DVS_PWRCTRL1;
274 rk806_field_write(rk806, PWRCTRL1_FUN + offset, PWRCTRL_DVS_FUN);
275
276 rk806_field_write(rk806,
277 pdata->dvs_ctrl_id[rid],
278 pdata->dvs_ctrl_mode[rid] - RK806_DVS_START3);
279 }
280
rk806_dvs_start_pwrctrl_fun_init(struct regulator_dev * rdev)281 static void rk806_dvs_start_pwrctrl_fun_init(struct regulator_dev *rdev)
282 {
283 struct rk806_regulator_data *pdata = rdev_get_drvdata(rdev);
284 struct rk806 *rk806 = pdata->rk806;
285 int rid = rdev_get_id(rdev);
286 int offset;
287
288 /* init dvs pin function */
289 offset = pdata->dvs_ctrl_mode[rid] - RK806_DVS_START_PWRCTR1;
290 /*set pin polarity, active high */
291 rk806_field_write(rk806, PWRCTRL1_POL + offset, POL_HIGH);
292 rk806_field_write(rk806, PWRCTRL1_FUN + offset, PWRCTRL_DVS_FUN);
293
294 /* enable start bit dvs function */
295 rk806_field_write(rk806,
296 pdata->dvs_ctrl_id[rid],
297 pdata->dvs_ctrl_mode[rid] - RK806_DVS_PWRCTRL3);
298 rk806_field_write(rk806,
299 pdata->vsel_ctrl_id[rid],
300 pdata->dvs_ctrl_mode[rid] - RK806_DVS_PWRCTRL3);
301
302 }
303
rk806_dvs_mode_init(struct regulator_dev * rdev)304 static int rk806_dvs_mode_init(struct regulator_dev *rdev)
305 {
306 struct rk806_regulator_data *pdata = rdev_get_drvdata(rdev);
307 int rid = rdev_get_id(rdev);
308 int mode, j;
309
310 for (mode = RK806_DVS_START1; mode < RK806_DVS_END; mode++) {
311 for (j = 0; j < RK806_ID_END; j++) {
312 if ((pdata->dvs_dn[mode][j] == NULL) ||
313 (strcmp(pdata->dvs_dn[mode][j]->name, rdev->desc->name)))
314 continue;
315
316 pdata->dvs_ctrl_mode[rid] = mode;
317 pdata->dvs_ctrl_mode_init[rid] = 1;
318 pdata->dvs_flag[mode] |= BIT(rid);
319
320 /* init dvs function, dvs-pin or start bit */
321 if (mode <= RK806_DVS_START3)
322 rk806_dvs_start_fun_init(rdev);
323 else if (mode <= RK806_DVS_PWRCTRL3)
324 rk806_dvs_pwrctrl_fun_init(rdev);
325 else if (mode <= RK806_DVS_START_PWRCTR3)
326 rk806_dvs_start_pwrctrl_fun_init(rdev);
327 return pdata->dvs_ctrl_mode[rid];
328 }
329 }
330
331 return pdata->dvs_ctrl_mode[rid];
332 }
333
get_dvs_mode(struct regulator_dev * rdev)334 static int get_dvs_mode(struct regulator_dev *rdev)
335 {
336 struct rk806_regulator_data *pdata = rdev_get_drvdata(rdev);
337 int rid = rdev_get_id(rdev);
338
339 if (!pdata->support_dvs)
340 return RK806_DVS_NOT_SUPPORT;
341
342 if (pdata->dvs_ctrl_mode_init[rid] || pdata->regulator_init)
343 return pdata->dvs_ctrl_mode[rid];
344
345 return rk806_dvs_mode_init(rdev);
346 }
347
get_gpio_id(int mode)348 static int get_gpio_id(int mode)
349 {
350 int pid = -1;
351
352 if ((mode >= RK806_DVS_PWRCTRL1) && (mode <= RK806_DVS_PWRCTRL3))
353 pid = mode - RK806_DVS_PWRCTRL1;
354
355 return pid;
356 }
357
rk806_get_reg_offset(int id)358 static int rk806_get_reg_offset(int id)
359 {
360 int reg_offset = 0;
361
362 if (id >= RK806_ID_DCDC1 && id <= RK806_ID_DCDC10)
363 reg_offset = RK806_DCDC_SLP_REG_OFFSET;
364 else if ((id >= RK806_ID_NLDO1 && id <= RK806_ID_NLDO4) ||
365 (id == RK806_ID_NLDO5))
366 reg_offset = RK806_NLDO_SLP_REG_OFFSET;
367 else if (id >= RK806_ID_PLDO1 && id <= RK806_ID_PLDO6)
368 reg_offset = RK806_PLDO_SLP_REG_OFFSET;
369
370 return reg_offset;
371 }
372
rk806_get_read_vsel_register(struct regulator_dev * rdev)373 static int rk806_get_read_vsel_register(struct regulator_dev *rdev)
374 {
375 struct rk806_regulator_data *pdata = rdev_get_drvdata(rdev);
376 int level, vsel_reg, pid;
377 int rid = rdev_get_id(rdev);
378 int mode;
379
380 vsel_reg = rdev->desc->vsel_reg;
381 if (!pdata->support_dvs)
382 return vsel_reg;
383
384 mode = get_dvs_mode(rdev);
385 pid = get_gpio_id(mode);
386 if ((pid >= 0) && (pdata->dvs_gpios[pid] != NULL)) {
387 level = gpiod_get_value(pdata->dvs_gpios[pid]);
388 /* level == 0, the Output high level, the SLP_VSEL output */
389 if (level == 0)
390 vsel_reg = rdev->desc->vsel_reg + rk806_get_reg_offset(rid);
391 }
392
393 return vsel_reg;
394 }
395
rk806_get_write_vsel_register(struct regulator_dev * rdev)396 static int rk806_get_write_vsel_register(struct regulator_dev *rdev)
397 {
398 struct rk806_regulator_data *pdata = rdev_get_drvdata(rdev);
399 int level, vsel_reg, pid;
400 int rid = rdev_get_id(rdev);
401 int mode;
402
403 vsel_reg = rdev->desc->vsel_reg;
404 if (!pdata->support_dvs)
405 return vsel_reg;
406
407 mode = get_dvs_mode(rdev);
408 pid = get_gpio_id(mode);
409 if ((pid >= 0) && (pdata->dvs_gpios[pid] != NULL)) {
410 level = gpiod_get_value(pdata->dvs_gpios[pid]);
411 /* level == 1, output low level, the ON_VSEL output, next SLP_VSEL */
412 if (level == 1)
413 vsel_reg = rdev->desc->vsel_reg + rk806_get_reg_offset(rid);
414 }
415
416 return vsel_reg;
417 }
418
rk806_do_gpio_dvs(struct regulator_dev * rdev)419 static void rk806_do_gpio_dvs(struct regulator_dev *rdev)
420 {
421 struct rk806_regulator_data *pdata = rdev_get_drvdata(rdev);
422 char dvs_ctrl_name[10][32] = {
423 "dvs_default",
424 "start_dvs1_ctrl",
425 "start_dvs2_ctrl",
426 "start_dvs3_ctrl",
427 "dvs_pin1_ctrl",
428 "dvs_pin2_ctrl",
429 "dvs_pin3_ctrl",
430 "start_and_pwrctrl1",
431 "start_and_pwrctrl2",
432 "start_and_pwrctrl3"};
433 int rid = rdev_get_id(rdev);
434 int gpio_level, pid;
435 int mode, count;
436
437 mode = get_dvs_mode(rdev);
438 pdata->dvs_used[mode] |= BIT(rid);
439 count = get_count(pdata->dvs_used[mode]);
440
441 if ((pdata->dvs_used[mode] != pdata->dvs_flag[mode]) ||
442 (count != pdata->dvs_count[mode]))
443 return;
444
445 pdata->dvs_used[mode] = 0;
446
447 pid = get_gpio_id(mode);
448 if ((pid >= 0) && (pdata->dvs_gpios[pid] != NULL)) {
449 gpio_level = gpiod_get_value(pdata->dvs_gpios[pid]);
450 if (gpio_level == 1)
451 gpiod_set_value(pdata->dvs_gpios[pid], 0);
452 else
453 gpiod_set_value(pdata->dvs_gpios[pid], 1);
454 }
455 REG_DBG("pin: name: %s, %s\n", dvs_ctrl_name[mode], rdev->desc->name);
456 }
457
rk806_do_soft_dvs(struct regulator_dev * rdev)458 static void rk806_do_soft_dvs(struct regulator_dev *rdev)
459 {
460 struct rk806_regulator_data *pdata = rdev_get_drvdata(rdev);
461 char dvs_ctrl_name[10][32] = {
462 "dvs_default",
463 "start_dvs1_ctrl",
464 "start_dvs2_ctrl",
465 "start_dvs3_ctrl",
466 "dvs_pin1_ctrl",
467 "dvs_pin2_ctrl",
468 "dvs_pin3_ctrl",
469 "start_and_pwrctrl1",
470 "start_and_pwrctrl2",
471 "start_and_pwrctrl3"};
472 struct rk806 *rk806 = pdata->rk806;
473 int rid = rdev_get_id(rdev);
474 int soft_mode, count;
475 int offset;
476
477 soft_mode = get_dvs_mode(rdev);
478 pdata->dvs_used[soft_mode] |= BIT(rid);
479 count = get_count(pdata->dvs_used[soft_mode]);
480
481 if ((pdata->dvs_used[soft_mode] != pdata->dvs_flag[soft_mode]) ||
482 (count != pdata->dvs_count[soft_mode]))
483 return;
484
485 pdata->dvs_used[soft_mode] = 0;
486
487 if (soft_mode < RK806_DVS_START_PWRCTR1)
488 offset = soft_mode - RK806_DVS_START1;
489 else
490 offset = soft_mode - RK806_DVS_START_PWRCTR1;
491
492 rk806_field_write(rk806, DVS_START1 + offset, 0x01);
493 REG_DBG("soft:%s, %s\n", dvs_ctrl_name[soft_mode], rdev->desc->name);
494 }
495
rk806_regulator_sync_voltage(struct regulator_dev * rdev)496 static void rk806_regulator_sync_voltage(struct regulator_dev *rdev)
497 {
498 int mode;
499
500 mode = get_dvs_mode(rdev);
501 if (mode == RK806_DVS_NOT_SUPPORT)
502 return;
503
504 if ((mode >= RK806_DVS_PWRCTRL1) && (mode <= RK806_DVS_PWRCTRL3))
505 rk806_do_gpio_dvs(rdev);
506 else
507 rk806_do_soft_dvs(rdev);
508 }
509
rk806_regulator_of_map_mode(unsigned int mode)510 static unsigned int rk806_regulator_of_map_mode(unsigned int mode)
511 {
512 switch (mode) {
513 case 1:
514 return REGULATOR_MODE_FAST;
515 case 2:
516 return REGULATOR_MODE_NORMAL;
517 default:
518 return -EINVAL;
519 }
520 }
521
rk806_set_suspend_enable_ctrl(struct regulator_dev * rdev,unsigned int en)522 static int rk806_set_suspend_enable_ctrl(struct regulator_dev *rdev,
523 unsigned int en)
524 {
525 struct rk806_regulator_data *pdata = rdev_get_drvdata(rdev);
526 struct rk806 *rk806 = pdata->rk806;
527 int rid = rdev_get_id(rdev);
528 unsigned int val;
529
530 if (en)
531 val = 1;
532 else
533 val = 0;
534
535 if ((get_dvs_mode(rdev) < RK806_DVS_PWRCTRL1) ||
536 (get_dvs_mode(rdev) > RK806_DVS_PWRCTRL3))
537 return rk806_field_write(rk806, pdata->dvs_field[rid].sleep_en, val);
538
539 pdata->sleep_mode[rid].sleep_en_val = val;
540
541 return 0;
542 }
543
rk806_set_suspend_enable(struct regulator_dev * rdev)544 static int rk806_set_suspend_enable(struct regulator_dev *rdev)
545 {
546 return rk806_set_suspend_enable_ctrl(rdev, 1);
547 }
548
rk806_set_suspend_disable(struct regulator_dev * rdev)549 static int rk806_set_suspend_disable(struct regulator_dev *rdev)
550 {
551 return rk806_set_suspend_enable_ctrl(rdev, 0);
552 }
553
rk806_set_mode(struct regulator_dev * rdev,unsigned int mode)554 static int rk806_set_mode(struct regulator_dev *rdev, unsigned int mode)
555 {
556 int rid = rdev_get_id(rdev);
557 int ctr_bit, reg;
558
559 if (rid > RK806_ID_DCDC10)
560 return 0;
561
562 reg = RK806_POWER_FPWM_EN0 + rid / 8;
563 ctr_bit = rid % 8;
564
565 switch (mode) {
566 case REGULATOR_MODE_FAST:
567 return regmap_update_bits(rdev->regmap, reg,
568 PWM_MODE_MSK << ctr_bit,
569 FPWM_MODE << ctr_bit);
570 case REGULATOR_MODE_NORMAL:
571 return regmap_update_bits(rdev->regmap, reg,
572 PWM_MODE_MSK << ctr_bit,
573 AUTO_PWM_MODE << ctr_bit);
574 default:
575 dev_err(&rdev->dev, "do not support this mode\n");
576 return -EINVAL;
577 }
578
579 return 0;
580 }
581
rk806_get_mode(struct regulator_dev * rdev)582 static unsigned int rk806_get_mode(struct regulator_dev *rdev)
583 {
584 int rid = rdev_get_id(rdev);
585 int ctr_bit, reg;
586 unsigned int val;
587 int err;
588
589 if (rid > RK806_ID_DCDC10)
590 return 0;
591
592 reg = RK806_POWER_FPWM_EN0 + rid / 8;
593 ctr_bit = rid % 8;
594
595 err = regmap_read(rdev->regmap, reg, &val);
596 if (err)
597 return err;
598
599 if ((val >> ctr_bit) & FPWM_MODE)
600 return REGULATOR_MODE_FAST;
601 else
602 return REGULATOR_MODE_NORMAL;
603 }
604
rk806_regulator_sleep2dvs_mode(struct regulator_dev * rdev)605 static int rk806_regulator_sleep2dvs_mode(struct regulator_dev *rdev)
606 {
607 struct rk806_regulator_data *pdata = rdev_get_drvdata(rdev);
608 struct rk806 *rk806 = pdata->rk806;
609 int mode = get_dvs_mode(rdev);
610 int rid = rdev_get_id(rdev);
611 int pid = get_gpio_id(mode);
612 int gpio_level, j;
613
614 /* set slp_fun NULL*/
615 if (pdata->dvs_ctrl_mode[rid] == RK806_DVS_PWRCTRL1)
616 rk806_field_write(rk806, PWRCTRL1_FUN, PWRCTRL_DVS_FUN);
617 else if (pdata->dvs_ctrl_mode[rid] == RK806_DVS_PWRCTRL2)
618 rk806_field_write(rk806, PWRCTRL2_FUN, PWRCTRL_DVS_FUN);
619 else if (pdata->dvs_ctrl_mode[rid] == RK806_DVS_PWRCTRL3)
620 rk806_field_write(rk806, PWRCTRL3_FUN, PWRCTRL_DVS_FUN);
621
622
623 /* 3.check the used count 1*/
624 pdata->dvs_used[mode] |= BIT(rid);
625 if (pdata->dvs_used[mode] != pdata->dvs_flag[mode])
626 return 0;
627
628 pdata->dvs_used[mode] = 0;
629 /* 5.clear the SLP_CTRL_SEL */
630 for (j = 0; j < RK806_ID_END; j++)
631 if (pdata->dvs_ctrl_mode[j] == mode)
632 rk806_field_write(rk806,
633 pdata->dvs_field[j].vsel_ctrl_sel,
634 pdata->dvs_ctrl_mode[j]);
635
636 if ((pid >= 0) && (pdata->dvs_gpios[pid] != NULL)) {
637 gpio_level = pdata->dvs_mode[rid].dvs_gpio_level[pid];
638 if (gpio_level == 1) {
639 gpiod_set_value(pdata->dvs_gpios[pid], 0);
640 rk806_field_write(rk806,
641 pdata->dvs_field[rid].on_vsel,
642 pdata->dvs_mode[rid].on_vsel_val);
643 rk806_field_write(rk806,
644 pdata->dvs_field[rid].en_reg,
645 pdata->dvs_mode[rid].en_reg_val | (pdata->dvs_field[rid].en_bit << 4));
646 }
647 }
648 return 0;
649 }
650
rk806_regulator_resume(struct regulator_dev * rdev)651 static int rk806_regulator_resume(struct regulator_dev *rdev)
652 {
653 struct rk806_regulator_data *pdata = rdev_get_drvdata(rdev);
654 struct rk806 *rk806 = pdata->rk806;
655 int rid = rdev_get_id(rdev);
656 int j;
657
658 if (!pdata->support_dvs)
659 return 0;
660
661 if (rid == RK806_ID_DCDC1) {
662 for (j = 0; j < RK806_ID_END; j++) {
663 rk806_field_write(rk806,
664 pdata->dvs_field[j].vsel_ctrl_sel,
665 0x00);
666 rk806_field_write(rk806,
667 pdata->dvs_field[j].sleep_vsel,
668 pdata->dvs_mode[j].sleep_vsel_val);
669 rk806_field_write(rk806,
670 pdata->dvs_field[j].sleep_en,
671 pdata->dvs_mode[j].sleep_en_val);
672 }
673 }
674
675 if ((get_dvs_mode(rdev) >= RK806_DVS_PWRCTRL1) &&
676 (get_dvs_mode(rdev) <= RK806_DVS_PWRCTRL3))
677 rk806_regulator_sleep2dvs_mode(rdev);
678 return 0;
679 }
680
rk806_set_suspend_voltage_range(struct regulator_dev * rdev,int uv)681 static int rk806_set_suspend_voltage_range(struct regulator_dev *rdev, int uv)
682 {
683 struct rk806_regulator_data *pdata = rdev_get_drvdata(rdev);
684 int sel = regulator_map_voltage_linear_range(rdev, uv, uv);
685 struct rk806 *rk806 = pdata->rk806;
686 int rid = rdev_get_id(rdev);
687 int reg_offset;
688 unsigned int reg;
689
690 if (sel < 0)
691 return -EINVAL;
692
693 reg_offset = rk806_get_reg_offset(rid);
694 reg = rdev->desc->vsel_reg + reg_offset;
695
696 return regmap_update_bits(rk806->regmap, reg,
697 rdev->desc->vsel_mask,
698 sel);
699 }
700
rk806_get_voltage_sel_regmap(struct regulator_dev * rdev)701 static int rk806_get_voltage_sel_regmap(struct regulator_dev *rdev)
702 {
703 unsigned int val;
704 int vsel_reg;
705 int ret;
706
707 vsel_reg = rk806_get_read_vsel_register(rdev);
708
709 ret = regmap_read(rdev->regmap, vsel_reg, &val);
710 if (ret != 0)
711 return ret;
712
713 val &= rdev->desc->vsel_mask;
714 val >>= ffs(rdev->desc->vsel_mask) - 1;
715
716 return val;
717 }
718
rk806_set_voltage(struct regulator_dev * rdev,int req_min_uV,int req_max_uV,unsigned int * selector)719 static int rk806_set_voltage(struct regulator_dev *rdev,
720 int req_min_uV, int req_max_uV,
721 unsigned int *selector)
722 {
723 int vsel_reg;
724 int mode;
725 int ret;
726 int sel;
727
728 ret = regulator_map_voltage_linear_range(rdev, req_min_uV, req_max_uV);
729 if (ret >= 0) {
730 *selector = ret;
731 sel = ret;
732 } else {
733 return -EINVAL;
734 }
735
736 vsel_reg = rk806_get_write_vsel_register(rdev);
737
738 sel <<= ffs(rdev->desc->vsel_mask) - 1;
739
740 ret = regmap_update_bits(rdev->regmap, vsel_reg,
741 rdev->desc->vsel_mask, sel);
742
743 mode = get_dvs_mode(rdev);
744 if (mode == RK806_DVS_NOT_SUPPORT)
745 return ret;
746
747 if ((mode >= RK806_DVS_PWRCTRL1) &&
748 (mode <= RK806_DVS_PWRCTRL3))
749 rk806_do_gpio_dvs(rdev);
750 else
751 rk806_do_soft_dvs(rdev);
752
753 return ret;
754 }
755
rk806_regulator_is_enabled_regmap(struct regulator_dev * rdev)756 static int rk806_regulator_is_enabled_regmap(struct regulator_dev *rdev)
757 {
758 struct rk806_regulator_data *pdata = rdev_get_drvdata(rdev);
759 struct rk806 *rk806 = pdata->rk806;
760 int rid = rdev_get_id(rdev);
761 int gpio_level, pid;
762 unsigned int val;
763 int mode;
764
765 mode = get_dvs_mode(rdev);
766 pid = get_gpio_id(mode);
767 if ((pid >= 0) && (pdata->dvs_gpios[pid] != NULL)) {
768 gpio_level = gpiod_get_value(pdata->dvs_gpios[pid]);
769 if (gpio_level == 0)
770 return rk806_field_read(rk806, pdata->dvs_field[rid].sleep_en);
771 }
772
773 val = rk806_field_read(rk806, pdata->dvs_field[rid].en_reg);
774 return (val & rdev->desc->enable_val) != 0;
775 }
776
rk806_regulator_enable_regmap(struct regulator_dev * rdev)777 static int rk806_regulator_enable_regmap(struct regulator_dev *rdev)
778 {
779 struct rk806_regulator_data *pdata = rdev_get_drvdata(rdev);
780 struct rk806 *rk806 = pdata->rk806;
781 int rid = rdev_get_id(rdev);
782 int gpio_level, pid;
783 int mode;
784
785 mode = get_dvs_mode(rdev);
786 pid = get_gpio_id(mode);
787 if ((pid >= 0) && (pdata->dvs_gpios[pid] != NULL)) {
788 gpio_level = gpiod_get_value(pdata->dvs_gpios[pid]);
789 if (gpio_level == 0)
790 return rk806_field_write(rk806,
791 pdata->dvs_field[rid].sleep_en,
792 0x01);
793 }
794
795 return rk806_field_write(rk806,
796 pdata->dvs_field[rid].en_reg,
797 rdev->desc->enable_val);
798 }
799
rk806_regulator_disable_regmap(struct regulator_dev * rdev)800 static int rk806_regulator_disable_regmap(struct regulator_dev *rdev)
801 {
802 struct rk806_regulator_data *pdata = rdev_get_drvdata(rdev);
803 struct rk806 *rk806 = pdata->rk806;
804 int rid = rdev_get_id(rdev);
805 int gpio_level, pid;
806 int mode;
807
808 mode = get_dvs_mode(rdev);
809 pid = get_gpio_id(mode);
810 if ((pid >= 0) && (pdata->dvs_gpios[pid] != NULL)) {
811 gpio_level = gpiod_get_value(pdata->dvs_gpios[pid]);
812 if (gpio_level == 0)
813 return rk806_field_write(rk806,
814 pdata->dvs_field[rid].sleep_en,
815 0x00);
816 }
817
818 return rk806_field_write(rk806,
819 pdata->dvs_field[rid].en_reg,
820 rdev->desc->disable_val);
821 }
822
rk806_set_ramp_delay(struct regulator_dev * rdev,int ramp_delay)823 static int rk806_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)
824 {
825 unsigned int ramp_value = RK806_RAMP_RATE_2LSB_PER_1CLK;
826 struct rk806_regulator_data *pdata = rdev_get_drvdata(rdev);
827 struct rk806 *rk806 = pdata->rk806;
828 int rid = rdev_get_id(rdev);
829
830 if (rid <= RK806_ID_DCDC10) {
831 switch (ramp_delay) {
832 case 1 ... 390:
833 ramp_value = RK806_RAMP_RATE_1LSB_PER_32CLK;
834 break;
835 case 391 ... 961:
836 ramp_value = RK806_RAMP_RATE_1LSB_PER_13CLK;
837 break;
838 case 962 ... 1560:
839 ramp_value = RK806_RAMP_RATE_1LSB_PER_8CLK;
840 break;
841 case 1561 ... 3125:
842 ramp_value = RK806_RAMP_RATE_1LSB_PER_4CLK;
843 break;
844 case 3126 ... 6250:
845 ramp_value = RK806_RAMP_RATE_1LSB_PER_2CLK;
846 break;
847 case 6251 ... 12500:
848 ramp_value = RK806_RAMP_RATE_1LSB_PER_1CLK;
849 break;
850 case 12501 ... 25000:
851 ramp_value = RK806_RAMP_RATE_2LSB_PER_1CLK;
852 break;
853 case 25001 ... 50000: /* 50mV/us */
854 ramp_value = RK806_RAMP_RATE_4LSB_PER_1CLK;
855 break;
856 default:
857 pr_warn("%s ramp_delay: %d not supported, setting 10000\n",
858 rdev->desc->name, ramp_delay);
859 }
860
861 rk806_field_write(rk806,
862 rk806_buck_rate_config_field[rid][0],
863 ramp_value & 0x03);
864 return rk806_field_write(rk806,
865 rk806_buck_rate_config_field[rid][1],
866 (ramp_value & 0x4) >> 2);
867 } else {
868 switch (ramp_delay) {
869 case 1 ... 780:
870 ramp_value = RK806_RAMP_RATE_1LSB_PER_32CLK;
871 break;
872 case 781 ... 1900:
873 ramp_value = RK806_RAMP_RATE_1LSB_PER_13CLK;
874 break;
875 case 1901 ... 3120:
876 ramp_value = RK806_RAMP_RATE_1LSB_PER_8CLK;
877 break;
878 case 3121 ... 6280:
879 ramp_value = RK806_RAMP_RATE_1LSB_PER_4CLK;
880 break;
881 case 6281 ... 12500:
882 ramp_value = RK806_RAMP_RATE_1LSB_PER_2CLK;
883 break;
884 case 12501 ... 25000:
885 ramp_value = RK806_RAMP_RATE_1LSB_PER_1CLK;
886 break;
887 case 25001 ... 50000:
888 ramp_value = RK806_RAMP_RATE_2LSB_PER_1CLK;
889 break;
890 case 50001 ... 100000:
891 ramp_value = RK806_RAMP_RATE_4LSB_PER_1CLK;
892 break;
893 default:
894 pr_warn("%s ramp_delay: %d not supported, setting 10000\n",
895 rdev->desc->name, ramp_delay);
896 }
897 return rk806_field_write(rk806, LDO_RATE, ramp_value);
898 }
899 }
900
901 static const struct regulator_ops rk806_ops_dcdc = {
902 .list_voltage = regulator_list_voltage_linear_range,
903 .map_voltage = regulator_map_voltage_linear_range,
904
905 .get_voltage_sel = rk806_get_voltage_sel_regmap,
906 .set_voltage = rk806_set_voltage,
907 .set_voltage_time_sel = regulator_set_voltage_time_sel,
908 .set_mode = rk806_set_mode,
909 .get_mode = rk806_get_mode,
910
911 .enable = rk806_regulator_enable_regmap,
912 .disable = rk806_regulator_disable_regmap,
913 .is_enabled = rk806_regulator_is_enabled_regmap,
914
915 .set_suspend_mode = rk806_set_mode,
916 .set_ramp_delay = rk806_set_ramp_delay,
917
918 .set_suspend_voltage = rk806_set_suspend_voltage_range,
919 .resume = rk806_regulator_resume,
920 .set_suspend_enable = rk806_set_suspend_enable,
921 .set_suspend_disable = rk806_set_suspend_disable,
922 };
923
924 static const struct regulator_ops rk806_ops_ldo = {
925 .list_voltage = regulator_list_voltage_linear_range,
926 .map_voltage = regulator_map_voltage_linear_range,
927
928 .get_voltage_sel = rk806_get_voltage_sel_regmap,
929 .set_voltage = rk806_set_voltage,
930 .set_voltage_time_sel = regulator_set_voltage_time_sel,
931
932 .enable = rk806_regulator_enable_regmap,
933 .disable = rk806_regulator_disable_regmap,
934 .is_enabled = rk806_regulator_is_enabled_regmap,
935
936 .set_suspend_mode = rk806_set_mode,
937 .set_ramp_delay = rk806_set_ramp_delay,
938
939 .set_suspend_voltage = rk806_set_suspend_voltage_range,
940 .resume = rk806_regulator_resume,
941 .set_suspend_enable = rk806_set_suspend_enable,
942 .set_suspend_disable = rk806_set_suspend_disable,
943 };
944
945 #define RK806_REGULATOR(_name, _supply_name, _id, _ops,\
946 _n_voltages, _vr, _er, _lr, ctrl_bit)\
947 [_id] = {\
948 .name = _name,\
949 .supply_name = _supply_name,\
950 .of_match = of_match_ptr(_name),\
951 .regulators_node = of_match_ptr("regulators"),\
952 .id = _id,\
953 .ops = &_ops,\
954 .type = REGULATOR_VOLTAGE,\
955 .n_voltages = _n_voltages,\
956 .linear_ranges = _lr,\
957 .n_linear_ranges = ARRAY_SIZE(_lr),\
958 .vsel_reg = _vr,\
959 .vsel_mask = 0xff,\
960 .enable_reg = _er,\
961 .enable_mask = ENABLE_MASK(ctrl_bit),\
962 .enable_val = ENABLE_MASK(ctrl_bit),\
963 .disable_val = DISABLE_VAL(ctrl_bit),\
964 .of_map_mode = rk806_regulator_of_map_mode,\
965 .owner = THIS_MODULE,\
966 }
967
968 static const struct regulator_desc rk806_regulators[] = {
969 RK806_REGULATOR("DCDC_REG1", "vcc1", RK806_ID_DCDC1, rk806_ops_dcdc,
970 RK806_BUCK_SEL_CNT, RK806_BUCK1_ON_VSEL,
971 RK806_POWER_EN0, rk806_buck_voltage_ranges, 0),
972 RK806_REGULATOR("DCDC_REG2", "vcc2", RK806_ID_DCDC2, rk806_ops_dcdc,
973 RK806_BUCK_SEL_CNT, RK806_BUCK2_ON_VSEL,
974 RK806_POWER_EN0, rk806_buck_voltage_ranges, 1),
975 RK806_REGULATOR("DCDC_REG3", "vcc3", RK806_ID_DCDC3, rk806_ops_dcdc,
976 RK806_BUCK_SEL_CNT, RK806_BUCK3_ON_VSEL,
977 RK806_POWER_EN0, rk806_buck_voltage_ranges, 2),
978 RK806_REGULATOR("DCDC_REG4", "vcc4", RK806_ID_DCDC4, rk806_ops_dcdc,
979 RK806_BUCK_SEL_CNT, RK806_BUCK4_ON_VSEL,
980 RK806_POWER_EN0, rk806_buck_voltage_ranges, 3),
981
982 RK806_REGULATOR("DCDC_REG5", "vcc5", RK806_ID_DCDC5, rk806_ops_dcdc,
983 RK806_BUCK_SEL_CNT, RK806_BUCK5_ON_VSEL,
984 RK806_POWER_EN1, rk806_buck_voltage_ranges, 0),
985 RK806_REGULATOR("DCDC_REG6", "vcc6", RK806_ID_DCDC6, rk806_ops_dcdc,
986 RK806_BUCK_SEL_CNT, RK806_BUCK6_ON_VSEL,
987 RK806_POWER_EN1, rk806_buck_voltage_ranges, 1),
988 RK806_REGULATOR("DCDC_REG7", "vcc7", RK806_ID_DCDC7, rk806_ops_dcdc,
989 RK806_BUCK_SEL_CNT, RK806_BUCK7_ON_VSEL,
990 RK806_POWER_EN1, rk806_buck_voltage_ranges, 2),
991 RK806_REGULATOR("DCDC_REG8", "vcc8", RK806_ID_DCDC8, rk806_ops_dcdc,
992 RK806_BUCK_SEL_CNT, RK806_BUCK8_ON_VSEL,
993 RK806_POWER_EN1, rk806_buck_voltage_ranges, 3),
994
995 RK806_REGULATOR("DCDC_REG9", "vcc9", RK806_ID_DCDC9, rk806_ops_dcdc,
996 RK806_BUCK_SEL_CNT, RK806_BUCK9_ON_VSEL,
997 RK806_POWER_EN2, rk806_buck_voltage_ranges, 0),
998 RK806_REGULATOR("DCDC_REG10", "vcc10", RK806_ID_DCDC10, rk806_ops_dcdc,
999 RK806_BUCK_SEL_CNT, RK806_BUCK10_ON_VSEL,
1000 RK806_POWER_EN2, rk806_buck_voltage_ranges, 1),
1001
1002 RK806_REGULATOR("NLDO_REG1", "vcc13", RK806_ID_NLDO1, rk806_ops_ldo,
1003 RK806_LDO_SEL_CNT, RK806_NLDO1_ON_VSEL,
1004 RK806_POWER_EN3, rk806_ldo_voltage_ranges, 0),
1005 RK806_REGULATOR("NLDO_REG2", "vcc13", RK806_ID_NLDO2, rk806_ops_ldo,
1006 RK806_LDO_SEL_CNT, RK806_NLDO2_ON_VSEL,
1007 RK806_POWER_EN3, rk806_ldo_voltage_ranges, 1),
1008 RK806_REGULATOR("NLDO_REG3", "vcc13", RK806_ID_NLDO3, rk806_ops_ldo,
1009 RK806_LDO_SEL_CNT, RK806_NLDO3_ON_VSEL,
1010 RK806_POWER_EN3, rk806_ldo_voltage_ranges, 2),
1011 RK806_REGULATOR("NLDO_REG4", "vcc14", RK806_ID_NLDO4, rk806_ops_ldo,
1012 RK806_LDO_SEL_CNT, RK806_NLDO4_ON_VSEL,
1013 RK806_POWER_EN3, rk806_ldo_voltage_ranges, 3),
1014
1015 RK806_REGULATOR("NLDO_REG5", "vcc14", RK806_ID_NLDO5, rk806_ops_ldo,
1016 RK806_LDO_SEL_CNT, RK806_NLDO5_ON_VSEL,
1017 RK806_POWER_EN5, rk806_ldo_voltage_ranges, 2),
1018
1019 RK806_REGULATOR("PLDO_REG1", "vcc11", RK806_ID_PLDO1, rk806_ops_ldo,
1020 RK806_LDO_SEL_CNT, RK806_PLDO1_ON_VSEL,
1021 RK806_POWER_EN4, rk806_ldo_voltage_ranges, 1),
1022 RK806_REGULATOR("PLDO_REG2", "vcc11", RK806_ID_PLDO2, rk806_ops_ldo,
1023 RK806_LDO_SEL_CNT, RK806_PLDO2_ON_VSEL,
1024 RK806_POWER_EN4, rk806_ldo_voltage_ranges, 2),
1025 RK806_REGULATOR("PLDO_REG3", "vcc11", RK806_ID_PLDO3, rk806_ops_ldo,
1026 RK806_LDO_SEL_CNT, RK806_PLDO3_ON_VSEL,
1027 RK806_POWER_EN4, rk806_ldo_voltage_ranges, 3),
1028
1029 RK806_REGULATOR("PLDO_REG4", "vcc12", RK806_ID_PLDO4, rk806_ops_ldo,
1030 RK806_LDO_SEL_CNT, RK806_PLDO4_ON_VSEL,
1031 RK806_POWER_EN5, rk806_ldo_voltage_ranges, 0),
1032 RK806_REGULATOR("PLDO_REG5", "vcc12", RK806_ID_PLDO5, rk806_ops_ldo,
1033 RK806_LDO_SEL_CNT, RK806_PLDO5_ON_VSEL,
1034 RK806_POWER_EN5, rk806_ldo_voltage_ranges, 1),
1035
1036 RK806_REGULATOR("PLDO_REG6", "vcca", RK806_ID_PLDO6, rk806_ops_ldo,
1037 RK806_LDO_SEL_CNT, RK806_PLDO6_ON_VSEL,
1038 RK806_POWER_EN4, rk806_ldo_voltage_ranges, 0),
1039 };
1040
rk806_regulator_dt_parse_pdata(struct rk806 * rk806,struct regmap * map,struct rk806_regulator_data * pdata)1041 static void rk806_regulator_dt_parse_pdata(struct rk806 *rk806,
1042 struct regmap *map,
1043 struct rk806_regulator_data *pdata)
1044
1045 {
1046 char dvs_ctrl_name[10][32] = {
1047 "dvs_default",
1048 "start_dvs1_ctrl",
1049 "start_dvs2_ctrl",
1050 "start_dvs3_ctrl",
1051 "dvs_pin1_ctrl",
1052 "dvs_pin2_ctrl",
1053 "dvs_pin3_ctrl",
1054 "start_and_pwrctrl1",
1055 "start_and_pwrctrl2",
1056 "start_and_pwrctrl3"};
1057 char dvs_pin_name[3][30] = { "rk806,pmic-dvs-gpio1",
1058 "rk806,pmic-dvs-gpio2",
1059 "rk806,pmic-dvs-gpio3" };
1060 struct device_node *np = rk806->dev->of_node;
1061 struct device_node *dn;
1062 int i, j;
1063
1064 pdata->support_dvs = 0;
1065
1066 for (i = 0; i < RK806_ID_END; i++) {
1067 pdata->dvs_field[i] = rk806_dvs_fields[i];
1068 pdata->dvs_ctrl_id[i] = start_dvs_id[i];
1069 pdata->vsel_ctrl_id[i] = vsel_ctr_sel_id[i];
1070 }
1071
1072 for (j = 1; j < RK806_DVS_END; j++) {
1073 if (device_property_present(rk806->dev, dvs_ctrl_name[j])) {
1074 REG_DBG("%s:\n", dvs_ctrl_name[j]);
1075 for (i = 0;
1076 (dn = of_parse_phandle(np, dvs_ctrl_name[j], i));
1077 i++) {
1078 REG_DBG("\t%s\n", dn->name);
1079 pdata->support_dvs = 1;
1080 pdata->dvs_dn[j][i] = dn;
1081 pdata->dvs_count[j]++;
1082
1083 of_node_put(dn);
1084 if (i >= RK806_ID_END)
1085 break;
1086 }
1087 }
1088 }
1089 if (!pdata->support_dvs)
1090 return;
1091
1092 for (i = 0; i < 3; i++) {
1093 pdata->dvs_gpios[i] = devm_gpiod_get_optional(rk806->dev,
1094 dvs_pin_name[i],
1095 GPIOD_OUT_HIGH);
1096 if (IS_ERR(pdata->dvs_gpios[i])) {
1097 pdata->dvs_gpios[i] = NULL;
1098 dev_info(rk806->dev, "Failed to get %s\n", dvs_pin_name[i]);
1099 }
1100 }
1101 }
1102
rk806_regulator_probe(struct platform_device * pdev)1103 static int rk806_regulator_probe(struct platform_device *pdev)
1104 {
1105 struct rk806 *rk806 = dev_get_drvdata(pdev->dev.parent);
1106 struct rk806_regulator_data *pdata;
1107 struct regulator_config config = { };
1108 struct regulator_dev *rdev;
1109 int i;
1110
1111 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
1112 if (!pdata)
1113 return -ENOMEM;
1114
1115 rk806_regulator_dt_parse_pdata(rk806, rk806->regmap, pdata);
1116
1117 pdata->rk806 = rk806;
1118 platform_set_drvdata(pdev, pdata);
1119
1120 config.dev = &pdev->dev;
1121 config.driver_data = pdata;
1122 config.dev->of_node = rk806->dev->of_node;
1123 config.regmap = rk806->regmap;
1124
1125 for (i = 0; i < ARRAY_SIZE(rk806_regulators); i++) {
1126 rdev = devm_regulator_register(&pdev->dev,
1127 &rk806_regulators[i],
1128 &config);
1129 if (IS_ERR(rdev)) {
1130 dev_err(rk806->dev, "failed to register %s regulator\n",
1131 pdev->name);
1132 return PTR_ERR(rdev);
1133 }
1134
1135 rk806_regulator_sync_voltage(rdev);
1136 }
1137
1138 pdata->regulator_init = 1;
1139
1140 return 0;
1141 }
1142
rk806_suspend(struct device * dev)1143 static int __maybe_unused rk806_suspend(struct device *dev)
1144 {
1145 struct rk806 *rk806 = dev_get_drvdata(dev->parent);
1146 int i;
1147
1148 rk806_field_write(rk806, PWRCTRL1_FUN, PWRCTRL_NULL_FUN);
1149 rk806_field_write(rk806, PWRCTRL2_FUN, PWRCTRL_NULL_FUN);
1150 rk806_field_write(rk806, PWRCTRL3_FUN, PWRCTRL_NULL_FUN);
1151
1152 for (i = RK806_ID_DCDC1; i < RK806_ID_END; i++)
1153 rk806_field_write(rk806, BUCK1_VSEL_CTR_SEL + i, CTR_BY_NO_EFFECT);
1154
1155 rk806_field_write(rk806, PWRCTRL1_FUN, PWRCTRL_DVS_FUN);
1156
1157 for (i = RK806_ID_DCDC1; i < RK806_ID_END; i++)
1158 rk806_field_write(rk806, BUCK1_VSEL_CTR_SEL + i, CTR_BY_PWRCTRL1);
1159
1160 return 0;
1161 }
1162
rk806_resume(struct device * dev)1163 static int __maybe_unused rk806_resume(struct device *dev)
1164 {
1165 struct rk806 *rk806 = dev_get_drvdata(dev->parent);
1166 int i;
1167
1168 for (i = RK806_ID_DCDC1; i < RK806_ID_END; i++)
1169 rk806_field_write(rk806, BUCK1_VSEL_CTR_SEL + i, CTR_BY_NO_EFFECT);
1170
1171 rk806_field_write(rk806, PWRCTRL1_FUN, PWRCTRL_NULL_FUN);
1172
1173 return 0;
1174 }
1175 SIMPLE_DEV_PM_OPS(rk806_pm_ops, rk806_suspend, rk806_resume);
1176
rk806_regulator_shutdown(struct platform_device * pdev)1177 static void rk806_regulator_shutdown(struct platform_device *pdev)
1178 {
1179 struct rk806 *rk806 = dev_get_drvdata(pdev->dev.parent);
1180
1181 if (system_state == SYSTEM_POWER_OFF)
1182 if ((rk806->pins->p) && (rk806->pins->power_off))
1183 pinctrl_select_state(rk806->pins->p, rk806->pins->power_off);
1184
1185 if (system_state == SYSTEM_RESTART)
1186 if ((rk806->pins->p) && (rk806->pins->power_off))
1187 pinctrl_select_state(rk806->pins->p, rk806->pins->reset);
1188
1189 }
1190
1191 static const struct platform_device_id rk806_regulator_id_table[] = {
1192 { "rk806-regulator", },
1193 { /* sentinel */ }
1194 };
1195 MODULE_DEVICE_TABLE(platform, rk806_regulator_id_table);
1196
1197 static struct platform_driver rk806_regulator_driver = {
1198 .driver = {
1199 .name = "rk806-regulator",
1200 .pm = &rk806_pm_ops,
1201 },
1202 .probe = rk806_regulator_probe,
1203 .id_table = rk806_regulator_id_table,
1204 .shutdown = rk806_regulator_shutdown,
1205 };
1206 module_platform_driver(rk806_regulator_driver);
1207
1208 MODULE_AUTHOR("Xu Shengfei <xsf@rock-chips.com>");
1209 MODULE_DESCRIPTION("rk806 voltage regulator driver");
1210 MODULE_LICENSE("GPL v2");
1211