1 /******************************************************************************
2 * Copyright (c) 2022 Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
3 * All rights reserved.
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 *
17 *****************************************************************************/
18 #ifndef DRIVERS_GPIO_DEFAULT_H_
19 #define DRIVERS_GPIO_DEFAULT_H_
20
21 #include "compiler.h"
22 #include "gpio.h"
23 /**********************************************************************************************************************
24 * GPIO setting *
25 *********************************************************************************************************************/
26 #ifndef PA0_INPUT_ENABLE
27 #define PA0_INPUT_ENABLE 0
28 #endif
29 #ifndef PA1_INPUT_ENABLE
30 #define PA1_INPUT_ENABLE 0
31 #endif
32 #ifndef PA2_INPUT_ENABLE
33 #define PA2_INPUT_ENABLE 0
34 #endif
35 #ifndef PA3_INPUT_ENABLE
36 #define PA3_INPUT_ENABLE 0
37 #endif
38 #ifndef PA4_INPUT_ENABLE
39 #define PA4_INPUT_ENABLE 0
40 #endif
41 #ifndef PA5_INPUT_ENABLE
42 #define PA5_INPUT_ENABLE 0 // USB
43 #endif
44 #ifndef PA6_INPUT_ENABLE
45 #define PA6_INPUT_ENABLE 0 // USB
46 #endif
47 #ifndef PA7_INPUT_ENABLE
48 #define PA7_INPUT_ENABLE 1 // SWS
49 #endif
50 #ifndef PA0_OUTPUT_ENABLE
51 #define PA0_OUTPUT_ENABLE 0
52 #endif
53 #ifndef PA1_OUTPUT_ENABLE
54 #define PA1_OUTPUT_ENABLE 0
55 #endif
56 #ifndef PA2_OUTPUT_ENABLE
57 #define PA2_OUTPUT_ENABLE 0
58 #endif
59 #ifndef PA3_OUTPUT_ENABLE
60 #define PA3_OUTPUT_ENABLE 0
61 #endif
62 #ifndef PA4_OUTPUT_ENABLE
63 #define PA4_OUTPUT_ENABLE 0
64 #endif
65 #ifndef PA5_OUTPUT_ENABLE
66 #define PA5_OUTPUT_ENABLE 0
67 #endif
68 #ifndef PA6_OUTPUT_ENABLE
69 #define PA6_OUTPUT_ENABLE 0
70 #endif
71 #ifndef PA7_OUTPUT_ENABLE
72 #define PA7_OUTPUT_ENABLE 0
73 #endif
74 #ifndef PA0_DATA_STRENGTH
75 #define PA0_DATA_STRENGTH 1
76 #endif
77 #ifndef PA1_DATA_STRENGTH
78 #define PA1_DATA_STRENGTH 1
79 #endif
80 #ifndef PA2_DATA_STRENGTH
81 #define PA2_DATA_STRENGTH 1
82 #endif
83 #ifndef PA3_DATA_STRENGTH
84 #define PA3_DATA_STRENGTH 1
85 #endif
86 #ifndef PA4_DATA_STRENGTH
87 #define PA4_DATA_STRENGTH 1
88 #endif
89 #ifndef PA5_DATA_STRENGTH
90 #define PA5_DATA_STRENGTH 1
91 #endif
92 #ifndef PA6_DATA_STRENGTH
93 #define PA6_DATA_STRENGTH 1
94 #endif
95 #ifndef PA7_DATA_STRENGTH
96 #define PA7_DATA_STRENGTH 1
97 #endif
98 #ifndef PA0_DATA_OUT
99 #define PA0_DATA_OUT 0
100 #endif
101 #ifndef PA1_DATA_OUT
102 #define PA1_DATA_OUT 0
103 #endif
104 #ifndef PA2_DATA_OUT
105 #define PA2_DATA_OUT 0
106 #endif
107 #ifndef PA3_DATA_OUT
108 #define PA3_DATA_OUT 0
109 #endif
110 #ifndef PA4_DATA_OUT
111 #define PA4_DATA_OUT 0
112 #endif
113 #ifndef PA5_DATA_OUT
114 #define PA5_DATA_OUT 0
115 #endif
116 #ifndef PA6_DATA_OUT
117 #define PA6_DATA_OUT 0
118 #endif
119 #ifndef PA7_DATA_OUT
120 #define PA7_DATA_OUT 0
121 #endif
122 #ifndef PA0_FUNC
123 #define PA0_FUNC AS_GPIO
124 #endif
125 #ifndef PA1_FUNC
126 #define PA1_FUNC AS_GPIO
127 #endif
128 #ifndef PA2_FUNC
129 #define PA2_FUNC AS_GPIO
130 #endif
131 #ifndef PA3_FUNC
132 #define PA3_FUNC AS_GPIO
133 #endif
134 #ifndef PA4_FUNC
135 #define PA4_FUNC AS_GPIO
136 #endif
137 #ifndef PA5_FUNC
138 #define PA5_FUNC AS_GPIO
139 #endif
140 #ifndef PA6_FUNC
141 #define PA6_FUNC AS_GPIO
142 #endif
143 #ifndef PA7_FUNC
144 #define PA7_FUNC AS_SWS
145 #endif
146 #ifndef PULL_WAKEUP_SRC_PA0
147 #define PULL_WAKEUP_SRC_PA0 0
148 #endif
149 #ifndef PULL_WAKEUP_SRC_PA1
150 #define PULL_WAKEUP_SRC_PA1 0
151 #endif
152 #ifndef PULL_WAKEUP_SRC_PA2
153 #define PULL_WAKEUP_SRC_PA2 0
154 #endif
155 #ifndef PULL_WAKEUP_SRC_PA3
156 #define PULL_WAKEUP_SRC_PA3 0
157 #endif
158 #ifndef PULL_WAKEUP_SRC_PA4
159 #define PULL_WAKEUP_SRC_PA4 0
160 #endif
161 #ifndef PULL_WAKEUP_SRC_PA5
162 #define PULL_WAKEUP_SRC_PA5 0
163 #endif
164 #ifndef PULL_WAKEUP_SRC_PA6
165 #define PULL_WAKEUP_SRC_PA6 0
166 #endif
167 #ifndef PULL_WAKEUP_SRC_PA7
168 #define PULL_WAKEUP_SRC_PA7 GPIO_PIN_PULLUP_1M // sws pullup
169 #endif
170
171 //////////////////////////////////////////////////
172 #ifndef PB0_INPUT_ENABLE
173 #define PB0_INPUT_ENABLE 0
174 #endif
175 #ifndef PB1_INPUT_ENABLE
176 #define PB1_INPUT_ENABLE 0
177 #endif
178 #ifndef PB2_INPUT_ENABLE
179 #define PB2_INPUT_ENABLE 0
180 #endif
181 #ifndef PB3_INPUT_ENABLE
182 #define PB3_INPUT_ENABLE 0
183 #endif
184 #ifndef PB4_INPUT_ENABLE
185 #define PB4_INPUT_ENABLE 0
186 #endif
187 #ifndef PB5_INPUT_ENABLE
188 #define PB5_INPUT_ENABLE 0
189 #endif
190 #ifndef PB6_INPUT_ENABLE
191 #define PB6_INPUT_ENABLE 0
192 #endif
193 #ifndef PB7_INPUT_ENABLE
194 #define PB7_INPUT_ENABLE 0
195 #endif
196 #ifndef PB0_OUTPUT_ENABLE
197 #define PB0_OUTPUT_ENABLE 0
198 #endif
199 #ifndef PB1_OUTPUT_ENABLE
200 #define PB1_OUTPUT_ENABLE 0
201 #endif
202 #ifndef PB2_OUTPUT_ENABLE
203 #define PB2_OUTPUT_ENABLE 0
204 #endif
205 #ifndef PB3_OUTPUT_ENABLE
206 #define PB3_OUTPUT_ENABLE 0
207 #endif
208 #ifndef PB4_OUTPUT_ENABLE
209 #define PB4_OUTPUT_ENABLE 0
210 #endif
211 #ifndef PB5_OUTPUT_ENABLE
212 #define PB5_OUTPUT_ENABLE 0
213 #endif
214 #ifndef PB6_OUTPUT_ENABLE
215 #define PB6_OUTPUT_ENABLE 0
216 #endif
217 #ifndef PB7_OUTPUT_ENABLE
218 #define PB7_OUTPUT_ENABLE 0
219 #endif
220 #ifndef PB0_DATA_STRENGTH
221 #define PB0_DATA_STRENGTH 1
222 #endif
223 #ifndef PB1_DATA_STRENGTH
224 #define PB1_DATA_STRENGTH 1
225 #endif
226 #ifndef PB2_DATA_STRENGTH
227 #define PB2_DATA_STRENGTH 1
228 #endif
229 #ifndef PB3_DATA_STRENGTH
230 #define PB3_DATA_STRENGTH 1
231 #endif
232 #ifndef PB4_DATA_STRENGTH
233 #define PB4_DATA_STRENGTH 1
234 #endif
235 #ifndef PB5_DATA_STRENGTH
236 #define PB5_DATA_STRENGTH 1
237 #endif
238 #ifndef PB6_DATA_STRENGTH
239 #define PB6_DATA_STRENGTH 1
240 #endif
241 #ifndef PB7_DATA_STRENGTH
242 #define PB7_DATA_STRENGTH 1
243 #endif
244 #ifndef PB0_DATA_OUT
245 #define PB0_DATA_OUT 0
246 #endif
247 #ifndef PB1_DATA_OUT
248 #define PB1_DATA_OUT 0
249 #endif
250 #ifndef PB2_DATA_OUT
251 #define PB2_DATA_OUT 0
252 #endif
253 #ifndef PB3_DATA_OUT
254 #define PB3_DATA_OUT 0
255 #endif
256 #ifndef PB4_DATA_OUT
257 #define PB4_DATA_OUT 0
258 #endif
259 #ifndef PB5_DATA_OUT
260 #define PB5_DATA_OUT 0
261 #endif
262 #ifndef PB6_DATA_OUT
263 #define PB6_DATA_OUT 0
264 #endif
265 #ifndef PB7_DATA_OUT
266 #define PB7_DATA_OUT 0
267 #endif
268 #ifndef PB0_FUNC
269 #define PB0_FUNC AS_GPIO
270 #endif
271 #ifndef PB1_FUNC
272 #define PB1_FUNC AS_GPIO
273 #endif
274 #ifndef PB2_FUNC
275 #define PB2_FUNC AS_GPIO
276 #endif
277 #ifndef PB3_FUNC
278 #define PB3_FUNC AS_GPIO
279 #endif
280 #ifndef PB4_FUNC
281 #define PB4_FUNC AS_GPIO
282 #endif
283 #ifndef PB5_FUNC
284 #define PB5_FUNC AS_GPIO
285 #endif
286 #ifndef PB6_FUNC
287 #define PB6_FUNC AS_GPIO
288 #endif
289 #ifndef PB7_FUNC
290 #define PB7_FUNC AS_GPIO
291 #endif
292 #ifndef PULL_WAKEUP_SRC_PB0
293 #define PULL_WAKEUP_SRC_PB0 0
294 #endif
295 #ifndef PULL_WAKEUP_SRC_PB1
296 #define PULL_WAKEUP_SRC_PB1 0
297 #endif
298 #ifndef PULL_WAKEUP_SRC_PB2
299 #define PULL_WAKEUP_SRC_PB2 0
300 #endif
301 #ifndef PULL_WAKEUP_SRC_PB3
302 #define PULL_WAKEUP_SRC_PB3 0
303 #endif
304 #ifndef PULL_WAKEUP_SRC_PB4
305 #define PULL_WAKEUP_SRC_PB4 0
306 #endif
307 #ifndef PULL_WAKEUP_SRC_PB5
308 #define PULL_WAKEUP_SRC_PB5 0
309 #endif
310 #ifndef PULL_WAKEUP_SRC_PB6
311 #define PULL_WAKEUP_SRC_PB6 0
312 #endif
313 #ifndef PULL_WAKEUP_SRC_PB7
314 #define PULL_WAKEUP_SRC_PB7 0
315 #endif
316
317 //////////////////////////////////////////////////
318 #ifndef PC0_INPUT_ENABLE
319 #define PC0_INPUT_ENABLE 0
320 #endif
321 #ifndef PC1_INPUT_ENABLE
322 #define PC1_INPUT_ENABLE 0
323 #endif
324 #ifndef PC2_INPUT_ENABLE
325 #define PC2_INPUT_ENABLE 0
326 #endif
327 #ifndef PC3_INPUT_ENABLE
328 #define PC3_INPUT_ENABLE 0
329 #endif
330 #ifndef PC4_INPUT_ENABLE
331 #define PC4_INPUT_ENABLE 0
332 #endif
333 #ifndef PC5_INPUT_ENABLE
334 #define PC5_INPUT_ENABLE 0
335 #endif
336 #ifndef PC6_INPUT_ENABLE
337 #define PC6_INPUT_ENABLE 0
338 #endif
339 #ifndef PC7_INPUT_ENABLE
340 #define PC7_INPUT_ENABLE 0
341 #endif
342 #ifndef PC0_OUTPUT_ENABLE
343 #define PC0_OUTPUT_ENABLE 0
344 #endif
345 #ifndef PC1_OUTPUT_ENABLE
346 #define PC1_OUTPUT_ENABLE 0
347 #endif
348 #ifndef PC2_OUTPUT_ENABLE
349 #define PC2_OUTPUT_ENABLE 0
350 #endif
351 #ifndef PC3_OUTPUT_ENABLE
352 #define PC3_OUTPUT_ENABLE 0
353 #endif
354 #ifndef PC4_OUTPUT_ENABLE
355 #define PC4_OUTPUT_ENABLE 0
356 #endif
357 #ifndef PC5_OUTPUT_ENABLE
358 #define PC5_OUTPUT_ENABLE 0
359 #endif
360 #ifndef PC6_OUTPUT_ENABLE
361 #define PC6_OUTPUT_ENABLE 0
362 #endif
363 #ifndef PC7_OUTPUT_ENABLE
364 #define PC7_OUTPUT_ENABLE 0
365 #endif
366 #ifndef PC0_DATA_STRENGTH
367 #define PC0_DATA_STRENGTH 1
368 #endif
369 #ifndef PC1_DATA_STRENGTH
370 #define PC1_DATA_STRENGTH 1
371 #endif
372 #ifndef PC2_DATA_STRENGTH
373 #define PC2_DATA_STRENGTH 1
374 #endif
375 #ifndef PC3_DATA_STRENGTH
376 #define PC3_DATA_STRENGTH 1
377 #endif
378 #ifndef PC4_DATA_STRENGTH
379 #define PC4_DATA_STRENGTH 1
380 #endif
381 #ifndef PC5_DATA_STRENGTH
382 #define PC5_DATA_STRENGTH 1
383 #endif
384 #ifndef PC6_DATA_STRENGTH
385 #define PC6_DATA_STRENGTH 1
386 #endif
387 #ifndef PC7_DATA_STRENGTH
388 #define PC7_DATA_STRENGTH 1
389 #endif
390 #ifndef PC0_DATA_OUT
391 #define PC0_DATA_OUT 0
392 #endif
393 #ifndef PC1_DATA_OUT
394 #define PC1_DATA_OUT 0
395 #endif
396 #ifndef PC2_DATA_OUT
397 #define PC2_DATA_OUT 0
398 #endif
399 #ifndef PC3_DATA_OUT
400 #define PC3_DATA_OUT 0
401 #endif
402 #ifndef PC4_DATA_OUT
403 #define PC4_DATA_OUT 0
404 #endif
405 #ifndef PC5_DATA_OUT
406 #define PC5_DATA_OUT 0
407 #endif
408 #ifndef PC6_DATA_OUT
409 #define PC6_DATA_OUT 0
410 #endif
411 #ifndef PC7_DATA_OUT
412 #define PC7_DATA_OUT 0
413 #endif
414 #ifndef PC0_FUNC
415 #define PC0_FUNC AS_GPIO
416 #endif
417 #ifndef PC1_FUNC
418 #define PC1_FUNC AS_GPIO
419 #endif
420 #ifndef PC2_FUNC
421 #define PC2_FUNC AS_GPIO
422 #endif
423 #ifndef PC3_FUNC
424 #define PC3_FUNC AS_GPIO
425 #endif
426 #ifndef PC4_FUNC
427 #define PC4_FUNC AS_GPIO
428 #endif
429 #ifndef PC5_FUNC
430 #define PC5_FUNC AS_GPIO
431 #endif
432 #ifndef PC6_FUNC
433 #define PC6_FUNC AS_GPIO
434 #endif
435 #ifndef PC7_FUNC
436 #define PC7_FUNC AS_GPIO
437 #endif
438 #ifndef PULL_WAKEUP_SRC_PC0
439 #define PULL_WAKEUP_SRC_PC0 0
440 #endif
441 #ifndef PULL_WAKEUP_SRC_PC1
442 #define PULL_WAKEUP_SRC_PC1 0
443 #endif
444 #ifndef PULL_WAKEUP_SRC_PC2
445 #define PULL_WAKEUP_SRC_PC2 0
446 #endif
447 #ifndef PULL_WAKEUP_SRC_PC3
448 #define PULL_WAKEUP_SRC_PC3 0
449 #endif
450 #ifndef PULL_WAKEUP_SRC_PC4
451 #define PULL_WAKEUP_SRC_PC4 0
452 #endif
453 #ifndef PULL_WAKEUP_SRC_PC5
454 #define PULL_WAKEUP_SRC_PC5 0
455 #endif
456 #ifndef PULL_WAKEUP_SRC_PC6
457 #define PULL_WAKEUP_SRC_PC6 0
458 #endif
459 #ifndef PULL_WAKEUP_SRC_PC7
460 #define PULL_WAKEUP_SRC_PC7 0
461 #endif
462
463 //////////////////////////////////////////////////
464 #ifndef PD0_INPUT_ENABLE
465 #define PD0_INPUT_ENABLE 0
466 #endif
467 #ifndef PD1_INPUT_ENABLE
468 #define PD1_INPUT_ENABLE 0
469 #endif
470 #ifndef PD2_INPUT_ENABLE
471 #define PD2_INPUT_ENABLE 0
472 #endif
473 #ifndef PD3_INPUT_ENABLE
474 #define PD3_INPUT_ENABLE 0
475 #endif
476 #ifndef PD4_INPUT_ENABLE
477 #define PD4_INPUT_ENABLE 0
478 #endif
479 #ifndef PD5_INPUT_ENABLE
480 #define PD5_INPUT_ENABLE 0
481 #endif
482 #ifndef PD6_INPUT_ENABLE
483 #define PD6_INPUT_ENABLE 0
484 #endif
485 #ifndef PD7_INPUT_ENABLE
486 #define PD7_INPUT_ENABLE 0
487 #endif
488 #ifndef PD0_OUTPUT_ENABLE
489 #define PD0_OUTPUT_ENABLE 0
490 #endif
491 #ifndef PD1_OUTPUT_ENABLE
492 #define PD1_OUTPUT_ENABLE 0
493 #endif
494 #ifndef PD2_OUTPUT_ENABLE
495 #define PD2_OUTPUT_ENABLE 0
496 #endif
497 #ifndef PD3_OUTPUT_ENABLE
498 #define PD3_OUTPUT_ENABLE 0
499 #endif
500 #ifndef PD4_OUTPUT_ENABLE
501 #define PD4_OUTPUT_ENABLE 0
502 #endif
503 #ifndef PD5_OUTPUT_ENABLE
504 #define PD5_OUTPUT_ENABLE 0
505 #endif
506 #ifndef PD6_OUTPUT_ENABLE
507 #define PD6_OUTPUT_ENABLE 0
508 #endif
509 #ifndef PD7_OUTPUT_ENABLE
510 #define PD7_OUTPUT_ENABLE 0
511 #endif
512 #ifndef PD0_DATA_STRENGTH
513 #define PD0_DATA_STRENGTH 1
514 #endif
515 #ifndef PD1_DATA_STRENGTH
516 #define PD1_DATA_STRENGTH 1
517 #endif
518 #ifndef PD2_DATA_STRENGTH
519 #define PD2_DATA_STRENGTH 1
520 #endif
521 #ifndef PD3_DATA_STRENGTH
522 #define PD3_DATA_STRENGTH 1
523 #endif
524 #ifndef PD4_DATA_STRENGTH
525 #define PD4_DATA_STRENGTH 1
526 #endif
527 #ifndef PD5_DATA_STRENGTH
528 #define PD5_DATA_STRENGTH 1
529 #endif
530 #ifndef PD6_DATA_STRENGTH
531 #define PD6_DATA_STRENGTH 1
532 #endif
533 #ifndef PD7_DATA_STRENGTH
534 #define PD7_DATA_STRENGTH 1
535 #endif
536 #ifndef PD0_DATA_OUT
537 #define PD0_DATA_OUT 0
538 #endif
539 #ifndef PD1_DATA_OUT
540 #define PD1_DATA_OUT 0
541 #endif
542 #ifndef PD2_DATA_OUT
543 #define PD2_DATA_OUT 0
544 #endif
545 #ifndef PD3_DATA_OUT
546 #define PD3_DATA_OUT 0
547 #endif
548 #ifndef PD4_DATA_OUT
549 #define PD4_DATA_OUT 0
550 #endif
551 #ifndef PD5_DATA_OUT
552 #define PD5_DATA_OUT 0
553 #endif
554 #ifndef PD6_DATA_OUT
555 #define PD6_DATA_OUT 0
556 #endif
557 #ifndef PD7_DATA_OUT
558 #define PD7_DATA_OUT 0
559 #endif
560 #ifndef PD0_FUNC
561 #define PD0_FUNC AS_GPIO
562 #endif
563 #ifndef PD1_FUNC
564 #define PD1_FUNC AS_GPIO
565 #endif
566 #ifndef PD2_FUNC
567 #define PD2_FUNC AS_GPIO
568 #endif
569 #ifndef PD3_FUNC
570 #define PD3_FUNC AS_GPIO
571 #endif
572 #ifndef PD4_FUNC
573 #define PD4_FUNC AS_GPIO
574 #endif
575 #ifndef PD5_FUNC
576 #define PD5_FUNC AS_GPIO
577 #endif
578 #ifndef PD6_FUNC
579 #define PD6_FUNC AS_GPIO
580 #endif
581 #ifndef PD7_FUNC
582 #define PD7_FUNC AS_GPIO
583 #endif
584 #ifndef PULL_WAKEUP_SRC_PD0
585 #define PULL_WAKEUP_SRC_PD0 0
586 #endif
587 #ifndef PULL_WAKEUP_SRC_PD1
588 #define PULL_WAKEUP_SRC_PD1 0
589 #endif
590 #ifndef PULL_WAKEUP_SRC_PD2
591 #define PULL_WAKEUP_SRC_PD2 0
592 #endif
593 #ifndef PULL_WAKEUP_SRC_PD3
594 #define PULL_WAKEUP_SRC_PD3 0
595 #endif
596 #ifndef PULL_WAKEUP_SRC_PD4
597 #define PULL_WAKEUP_SRC_PD4 0
598 #endif
599 #ifndef PULL_WAKEUP_SRC_PD5
600 #define PULL_WAKEUP_SRC_PD5 0
601 #endif
602 #ifndef PULL_WAKEUP_SRC_PD6
603 #define PULL_WAKEUP_SRC_PD6 0
604 #endif
605 #ifndef PULL_WAKEUP_SRC_PD7
606 #define PULL_WAKEUP_SRC_PD7 0
607 #endif
608
609 //////////////////////////////////////////////////
610 #ifndef PE0_INPUT_ENABLE
611 #define PE0_INPUT_ENABLE 0
612 #endif
613 #ifndef PE1_INPUT_ENABLE
614 #define PE1_INPUT_ENABLE 0
615 #endif
616 #ifndef PE2_INPUT_ENABLE
617 #define PE2_INPUT_ENABLE 0
618 #endif
619 #ifndef PE3_INPUT_ENABLE
620 #define PE3_INPUT_ENABLE 0
621 #endif
622 #ifndef PE4_INPUT_ENABLE
623 #define PE4_INPUT_ENABLE 0
624 #endif
625 #ifndef PE5_INPUT_ENABLE
626 #define PE5_INPUT_ENABLE 0
627 #endif
628 #ifndef PE6_INPUT_ENABLE
629 #define PE6_INPUT_ENABLE 1
630 #endif
631 #ifndef PE7_INPUT_ENABLE
632 #define PE7_INPUT_ENABLE 1
633 #endif
634
635 #ifndef PE0_OUTPUT_ENABLE
636 #define PE0_OUTPUT_ENABLE 0
637 #endif
638 #ifndef PE1_OUTPUT_ENABLE
639 #define PE1_OUTPUT_ENABLE 0
640 #endif
641 #ifndef PE2_OUTPUT_ENABLE
642 #define PE2_OUTPUT_ENABLE 0
643 #endif
644 #ifndef PE3_OUTPUT_ENABLE
645 #define PE3_OUTPUT_ENABLE 0
646 #endif
647 #ifndef PE4_OUTPUT_ENABLE
648 #define PE4_OUTPUT_ENABLE 0
649 #endif
650 #ifndef PE5_OUTPUT_ENABLE
651 #define PE5_OUTPUT_ENABLE 0
652 #endif
653 #ifndef PE6_OUTPUT_ENABLE
654 #define PE6_OUTPUT_ENABLE 0
655 #endif
656 #ifndef PE7_OUTPUT_ENABLE
657 #define PE7_OUTPUT_ENABLE 0
658 #endif
659
660 #ifndef PE0_DATA_STRENGTH
661 #define PE0_DATA_STRENGTH 1
662 #endif
663 #ifndef PE1_DATA_STRENGTH
664 #define PE1_DATA_STRENGTH 1
665 #endif
666 #ifndef PE2_DATA_STRENGTH
667 #define PE2_DATA_STRENGTH 1
668 #endif
669 #ifndef PE3_DATA_STRENGTH
670 #define PE3_DATA_STRENGTH 1
671 #endif
672 #ifndef PE4_DATA_STRENGTH
673 #define PE4_DATA_STRENGTH 1
674 #endif
675 #ifndef PE5_DATA_STRENGTH
676 #define PE5_DATA_STRENGTH 1
677 #endif
678 #ifndef PE6_DATA_STRENGTH
679 #define PE6_DATA_STRENGTH 1
680 #endif
681 #ifndef PE7_DATA_STRENGTH
682 #define PE7_DATA_STRENGTH 1
683 #endif
684
685 #ifndef PE0_DATA_OUT
686 #define PE0_DATA_OUT 0
687 #endif
688 #ifndef PE1_DATA_OUT
689 #define PE1_DATA_OUT 0
690 #endif
691 #ifndef PE2_DATA_OUT
692 #define PE2_DATA_OUT 0
693 #endif
694 #ifndef PE3_DATA_OUT
695 #define PE3_DATA_OUT 0
696 #endif
697 #ifndef PE4_DATA_OUT
698 #define PE4_DATA_OUT 0
699 #endif
700 #ifndef PE5_DATA_OUT
701 #define PE5_DATA_OUT 0
702 #endif
703 #ifndef PE6_DATA_OUT
704 #define PE6_DATA_OUT 0
705 #endif
706 #ifndef PE7_DATA_OUT
707 #define PE7_DATA_OUT 0
708 #endif
709
710 #ifndef PE0_FUNC
711 #define PE0_FUNC AS_GPIO
712 #endif
713 #ifndef PE1_FUNC
714 #define PE1_FUNC AS_GPIO
715 #endif
716 #ifndef PE2_FUNC
717 #define PE2_FUNC AS_GPIO
718 #endif
719 #ifndef PE3_FUNC
720 #define PE3_FUNC AS_GPIO
721 #endif
722 #ifndef PE4_FUNC
723 #define PE4_FUNC AS_GPIO
724 #endif
725 #ifndef PE5_FUNC
726 #define PE5_FUNC AS_GPIO
727 #endif
728 #ifndef PE6_FUNC
729 #define PE6_FUNC AS_TMS
730 #endif
731 #ifndef PE7_FUNC
732 #define PE7_FUNC AS_TCK
733 #endif
734 #ifndef PULL_WAKEUP_SRC_PE0
735 #define PULL_WAKEUP_SRC_PE0 0
736 #endif
737 #ifndef PULL_WAKEUP_SRC_PE1
738 #define PULL_WAKEUP_SRC_PE1 0
739 #endif
740 #ifndef PULL_WAKEUP_SRC_PE2
741 #define PULL_WAKEUP_SRC_PE2 0
742 #endif
743 #ifndef PULL_WAKEUP_SRC_PE3
744 #define PULL_WAKEUP_SRC_PE3 0
745 #endif
746 #ifndef PULL_WAKEUP_SRC_PE4
747 #define PULL_WAKEUP_SRC_PE4 0
748 #endif
749 #ifndef PULL_WAKEUP_SRC_PE5
750 #define PULL_WAKEUP_SRC_PE5 0
751 #endif
752 #ifndef PULL_WAKEUP_SRC_PE6
753 #define PULL_WAKEUP_SRC_PE6 0
754 #endif
755 #ifndef PULL_WAKEUP_SRC_PE7
756 #define PULL_WAKEUP_SRC_PE7 0
757 #endif
758 //////////////////////////////////////////////////
759 #ifndef PF0_INPUT_ENABLE
760 #define PF0_INPUT_ENABLE 1 // MSPI
761 #endif
762 #ifndef PF1_INPUT_ENABLE
763 #define PF1_INPUT_ENABLE 1 // MSPI
764 #endif
765 #ifndef PF2_INPUT_ENABLE
766 #define PF2_INPUT_ENABLE 1 // MSPI
767 #endif
768 #ifndef PF3_INPUT_ENABLE
769 #define PF3_INPUT_ENABLE 1 // MSPI
770 #endif
771 #ifndef PF4_INPUT_ENABLE
772 #define PF4_INPUT_ENABLE 1 // MSPI
773 #endif
774 #ifndef PF5_INPUT_ENABLE
775 #define PF5_INPUT_ENABLE 1 // MSPI
776 #endif
777 #ifndef PF0_OUTPUT_ENABLE
778 #define PF0_OUTPUT_ENABLE 0
779 #endif
780 #ifndef PF1_OUTPUT_ENABLE
781 #define PF1_OUTPUT_ENABLE 0
782 #endif
783 #ifndef PF2_OUTPUT_ENABLE
784 #define PF2_OUTPUT_ENABLE 0
785 #endif
786 #ifndef PF3_OUTPUT_ENABLE
787 #define PF3_OUTPUT_ENABLE 0
788 #endif
789 #ifndef PF4_OUTPUT_ENABLE
790 #define PF4_OUTPUT_ENABLE 0
791 #endif
792 #ifndef PF5_OUTPUT_ENABLE
793 #define PF5_OUTPUT_ENABLE 0
794 #endif
795
796 #ifndef PF0_DATA_STRENGTH
797 #define PF0_DATA_STRENGTH 1
798 #endif
799 #ifndef PF1_DATA_STRENGTH
800 #define PF1_DATA_STRENGTH 1
801 #endif
802 #ifndef PF2_DATA_STRENGTH
803 #define PF2_DATA_STRENGTH 1
804 #endif
805 #ifndef PF3_DATA_STRENGTH
806 #define PF3_DATA_STRENGTH 1
807 #endif
808 #ifndef PF4_DATA_STRENGTH
809 #define PF4_DATA_STRENGTH 1
810 #endif
811 #ifndef PF5_DATA_STRENGTH
812 #define PF5_DATA_STRENGTH 1
813 #endif
814
815 #ifndef PF0_DATA_OUT
816 #define PF0_DATA_OUT 0
817 #endif
818 #ifndef PF1_DATA_OUT
819 #define PF1_DATA_OUT 0
820 #endif
821 #ifndef PF2_DATA_OUT
822 #define PF2_DATA_OUT 0
823 #endif
824 #ifndef PF3_DATA_OUT
825 #define PF3_DATA_OUT 0
826 #endif
827 #ifndef PF4_DATA_OUT
828 #define PF4_DATA_OUT 0
829 #endif
830 #ifndef PF5_DATA_OUT
831 #define PF5_DATA_OUT 0
832 #endif
833
834 #ifndef PF0_FUNC
835 #define PF0_FUNC AS_MSPI
836 #endif
837 #ifndef PF1_FUNC
838 #define PF1_FUNC AS_MSPI
839 #endif
840 #ifndef PF2_FUNC
841 #define PF2_FUNC AS_MSPI
842 #endif
843 #ifndef PF3_FUNC
844 #define PF3_FUNC AS_MSPI
845 #endif
846 #ifndef PF4_FUNC
847 #define PF4_FUNC AS_MSPI
848 #endif
849 #ifndef PF5_FUNC
850 #define PF5_FUNC AS_MSPI
851 #endif
852
853 /**
854 * @brief This function servers to initiate pull up-down resistor of all gpio.
855 * @param[in] none
856 * @return none.
857 * @attention Processing methods of unused GPIO
858 * Set it to high resistance state and set it to open pull-up or pull-down resistance to
859 * let it be in the determined state.When GPIO uses internal pull-up or pull-down resistance,
860 * do not use pull-up or pull-down resistance on the board in the process of practical
861 * application because it may have the risk of electric leakage .
862 */
gpio_analog_resistance_init(void)863 static inline void gpio_analog_resistance_init(void)
864 {
865 // A<3:0>
866 analog_write_reg8(0x0e, PULL_WAKEUP_SRC_PA0 | (PULL_WAKEUP_SRC_PA1 << 2) | (PULL_WAKEUP_SRC_PA2 << 4) |
867 (PULL_WAKEUP_SRC_PA3 << 6));
868 // A<7:4>
869 analog_write_reg8(0x0f, PULL_WAKEUP_SRC_PA4 | (PULL_WAKEUP_SRC_PA5 << 2) | (PULL_WAKEUP_SRC_PA6 << 4) |
870 (PULL_WAKEUP_SRC_PA7 << 6));
871 // B<3:0>
872 analog_write_reg8(0x10, PULL_WAKEUP_SRC_PB0 | (PULL_WAKEUP_SRC_PB1 << 2) | (PULL_WAKEUP_SRC_PB2 << 4) |
873 (PULL_WAKEUP_SRC_PB3 << 6));
874 // B<7:4>
875 analog_write_reg8(0x11, PULL_WAKEUP_SRC_PB4 | (PULL_WAKEUP_SRC_PB5 << 2) | (PULL_WAKEUP_SRC_PB6 << 4) |
876 (PULL_WAKEUP_SRC_PB7 << 6));
877
878 // C<3:0>
879 analog_write_reg8(0x12, PULL_WAKEUP_SRC_PC0 | (PULL_WAKEUP_SRC_PC1 << 2) | (PULL_WAKEUP_SRC_PC2 << 4) |
880 (PULL_WAKEUP_SRC_PC3 << 6));
881 // C<7:4>
882 analog_write_reg8(0x13, PULL_WAKEUP_SRC_PC4 | (PULL_WAKEUP_SRC_PC5 << 2) | (PULL_WAKEUP_SRC_PC6 << 4) |
883 (PULL_WAKEUP_SRC_PC7 << 6));
884
885 // D<3:0>
886 analog_write_reg8(0x14, PULL_WAKEUP_SRC_PD0 | (PULL_WAKEUP_SRC_PD1 << 2) | (PULL_WAKEUP_SRC_PD2 << 4) |
887 (PULL_WAKEUP_SRC_PD3 << 6));
888 // D<7:4>
889 analog_write_reg8(0x15, PULL_WAKEUP_SRC_PD4 | (PULL_WAKEUP_SRC_PD5 << 2) | (PULL_WAKEUP_SRC_PD6 << 4) |
890 (PULL_WAKEUP_SRC_PD7 << 6));
891 // E<3:0>
892 analog_write_reg8(0x16, PULL_WAKEUP_SRC_PE0 | (PULL_WAKEUP_SRC_PE1 << 2) | (PULL_WAKEUP_SRC_PE2 << 4) |
893 (PULL_WAKEUP_SRC_PE3 << 6));
894 // E<7:4>
895 analog_write_reg8(0x17, PULL_WAKEUP_SRC_PE4 | (PULL_WAKEUP_SRC_PE5 << 2) | (PULL_WAKEUP_SRC_PE6 << 4) |
896 (PULL_WAKEUP_SRC_PE7 << 6));
897 }
898
gpio_init(int anaRes_init_en)899 _attribute_ram_code_sec_ static inline void gpio_init(int anaRes_init_en)
900 {
901 // PA group
902 reg_gpio_pa_setting1 = (PA0_INPUT_ENABLE << 8) | (PA1_INPUT_ENABLE << 9) | (PA2_INPUT_ENABLE << 10) |
903 (PA3_INPUT_ENABLE << 11) | (PA4_INPUT_ENABLE << 12) | (PA5_INPUT_ENABLE << 13) |
904 (PA6_INPUT_ENABLE << 14) | (PA7_INPUT_ENABLE << 15) | ((PA0_OUTPUT_ENABLE ? 0 : 1) << 16) |
905 ((PA1_OUTPUT_ENABLE ? 0 : 1) << 17) | ((PA2_OUTPUT_ENABLE ? 0 : 1) << 18) |
906 ((PA3_OUTPUT_ENABLE ? 0 : 1) << 19) | ((PA4_OUTPUT_ENABLE ? 0 : 1) << 20) |
907 ((PA5_OUTPUT_ENABLE ? 0 : 1) << 21) | ((PA6_OUTPUT_ENABLE ? 0 : 1) << 22) |
908 ((PA7_OUTPUT_ENABLE ? 0 : 1) << 23) | (PA0_DATA_OUT << 24) | (PA1_DATA_OUT << 25) |
909 (PA2_DATA_OUT << 26) | (PA3_DATA_OUT << 27) | (PA4_DATA_OUT << 28) | (PA5_DATA_OUT << 29) |
910 (PA6_DATA_OUT << 30) | (PA7_DATA_OUT << 31);
911 reg_gpio_pa_setting2 = (PA0_DATA_STRENGTH << 8) | (PA1_DATA_STRENGTH << 9) | (PA2_DATA_STRENGTH << 10) |
912 (PA3_DATA_STRENGTH << 11) | (PA4_DATA_STRENGTH << 12) | (PA5_DATA_STRENGTH << 13) |
913 (PA6_DATA_STRENGTH << 14) | (PA7_DATA_STRENGTH << 15) |
914 (PA0_FUNC == AS_GPIO ? BIT(16) : 0) | (PA1_FUNC == AS_GPIO ? BIT(17) : 0) |
915 (PA2_FUNC == AS_GPIO ? BIT(18) : 0) | (PA3_FUNC == AS_GPIO ? BIT(19) : 0) |
916 (PA4_FUNC == AS_GPIO ? BIT(20) : 0) | (PA5_FUNC == AS_GPIO ? BIT(21) : 0) |
917 (PA6_FUNC == AS_GPIO ? BIT(22) : 0) | (PA7_FUNC == AS_GPIO ? BIT(23) : 0);
918
919 // PB group
920 reg_gpio_pb_setting1 = (PB0_INPUT_ENABLE << 8) | (PB1_INPUT_ENABLE << 9) | (PB2_INPUT_ENABLE << 10) |
921 (PB3_INPUT_ENABLE << 11) | (PB4_INPUT_ENABLE << 12) | (PB5_INPUT_ENABLE << 13) |
922 (PB6_INPUT_ENABLE << 14) | (PB7_INPUT_ENABLE << 15) | ((PB0_OUTPUT_ENABLE ? 0 : 1) << 16) |
923 ((PB1_OUTPUT_ENABLE ? 0 : 1) << 17) | ((PB2_OUTPUT_ENABLE ? 0 : 1) << 18) |
924 ((PB3_OUTPUT_ENABLE ? 0 : 1) << 19) | ((PB4_OUTPUT_ENABLE ? 0 : 1) << 20) |
925 ((PB5_OUTPUT_ENABLE ? 0 : 1) << 21) | ((PB6_OUTPUT_ENABLE ? 0 : 1) << 22) |
926 ((PB7_OUTPUT_ENABLE ? 0 : 1) << 23) | (PB0_DATA_OUT << 24) | (PB1_DATA_OUT << 25) |
927 (PB2_DATA_OUT << 26) | (PB3_DATA_OUT << 27) | (PB4_DATA_OUT << 28) | (PB5_DATA_OUT << 29) |
928 (PB6_DATA_OUT << 30) | (PB7_DATA_OUT << 31);
929 reg_gpio_pb_setting2 = (PB0_DATA_STRENGTH << 8) | (PB1_DATA_STRENGTH << 9) | (PB2_DATA_STRENGTH << 10) |
930 (PB3_DATA_STRENGTH << 11) | (PB4_DATA_STRENGTH << 12) | (PB5_DATA_STRENGTH << 13) |
931 (PB6_DATA_STRENGTH << 14) | (PB7_DATA_STRENGTH << 15) |
932 (PB0_FUNC == AS_GPIO ? BIT(16) : 0) | (PB1_FUNC == AS_GPIO ? BIT(17) : 0) |
933 (PB2_FUNC == AS_GPIO ? BIT(18) : 0) | (PB3_FUNC == AS_GPIO ? BIT(19) : 0) |
934 (PB4_FUNC == AS_GPIO ? BIT(20) : 0) | (PB5_FUNC == AS_GPIO ? BIT(21) : 0) |
935 (PB6_FUNC == AS_GPIO ? BIT(22) : 0) | (PB7_FUNC == AS_GPIO ? BIT(23) : 0);
936
937 // PC group
938 // ie
939 analog_write_reg8(areg_gpio_pc_ie, (PC0_INPUT_ENABLE << 0) | (PC1_INPUT_ENABLE << 1) | (PC2_INPUT_ENABLE << 2) |
940 (PC3_INPUT_ENABLE << 3) | (PC4_INPUT_ENABLE << 4) |
941 (PC5_INPUT_ENABLE << 5) | (PC6_INPUT_ENABLE << 6) |
942 (PC7_INPUT_ENABLE << 7));
943
944 // oen
945 reg_gpio_pc_oen = ((PC0_OUTPUT_ENABLE ? 0 : 1) << 0) | ((PC1_OUTPUT_ENABLE ? 0 : 1) << 1) |
946 ((PC2_OUTPUT_ENABLE ? 0 : 1) << 2) | ((PC3_OUTPUT_ENABLE ? 0 : 1) << 3) |
947 ((PC4_OUTPUT_ENABLE ? 0 : 1) << 4) | ((PC5_OUTPUT_ENABLE ? 0 : 1) << 5) |
948 ((PC6_OUTPUT_ENABLE ? 0 : 1) << 6) | ((PC7_OUTPUT_ENABLE ? 0 : 1) << 7);
949 // dataO
950 reg_gpio_pc_out = (PC0_DATA_OUT << 0) | (PC1_DATA_OUT << 1) | (PC2_DATA_OUT << 2) | (PC3_DATA_OUT << 3) |
951 (PC4_DATA_OUT << 4) | (PC5_DATA_OUT << 5) | (PC6_DATA_OUT << 6) | (PC7_DATA_OUT << 7);
952
953 // ds
954 analog_write_reg8(areg_gpio_pc_ds, (PC0_DATA_STRENGTH << 0) | (PC1_DATA_STRENGTH << 1) | (PC2_DATA_STRENGTH << 2) |
955 (PC3_DATA_STRENGTH << 3) | (PC4_DATA_STRENGTH << 4) |
956 (PC5_DATA_STRENGTH << 5) | (PC6_DATA_STRENGTH << 6) |
957 (PC7_DATA_STRENGTH << 7));
958
959 reg_gpio_pc_gpio = (PC0_FUNC == AS_GPIO ? BIT(0) : 0) | (PC1_FUNC == AS_GPIO ? BIT(1) : 0) |
960 (PC2_FUNC == AS_GPIO ? BIT(2) : 0) | (PC3_FUNC == AS_GPIO ? BIT(3) : 0) |
961 (PC4_FUNC == AS_GPIO ? BIT(4) : 0) | (PC5_FUNC == AS_GPIO ? BIT(5) : 0) |
962 (PC6_FUNC == AS_GPIO ? BIT(6) : 0) | (PC7_FUNC == AS_GPIO ? BIT(7) : 0);
963
964 // PD group
965 // ie
966 analog_write_reg8(areg_gpio_pd_ie, (PD0_INPUT_ENABLE << 0) | (PD1_INPUT_ENABLE << 1) | (PD2_INPUT_ENABLE << 2) |
967 (PD3_INPUT_ENABLE << 3) | (PD4_INPUT_ENABLE << 4) |
968 (PD5_INPUT_ENABLE << 5) | (PD6_INPUT_ENABLE << 6) |
969 (PD7_INPUT_ENABLE << 7));
970
971 // oen
972 reg_gpio_pd_oen = ((PD0_OUTPUT_ENABLE ? 0 : 1) << 0) | ((PD1_OUTPUT_ENABLE ? 0 : 1) << 1) |
973 ((PD2_OUTPUT_ENABLE ? 0 : 1) << 2) | ((PD3_OUTPUT_ENABLE ? 0 : 1) << 3) |
974 ((PD4_OUTPUT_ENABLE ? 0 : 1) << 4) | ((PD5_OUTPUT_ENABLE ? 0 : 1) << 5) |
975 ((PD6_OUTPUT_ENABLE ? 0 : 1) << 6) | ((PD7_OUTPUT_ENABLE ? 0 : 1) << 7);
976 // dataO
977 reg_gpio_pd_out = (PD0_DATA_OUT << 0) | (PD1_DATA_OUT << 1) | (PD2_DATA_OUT << 2) | (PD3_DATA_OUT << 3) |
978 (PD4_DATA_OUT << 4) | (PD5_DATA_OUT << 5) | (PD6_DATA_OUT << 6) | (PD7_DATA_OUT << 7);
979
980 // ds
981 analog_write_reg8(areg_gpio_pd_ds, (PD0_DATA_STRENGTH << 0) | (PD1_DATA_STRENGTH << 1) | (PD2_DATA_STRENGTH << 2) |
982 (PD3_DATA_STRENGTH << 3) | (PD4_DATA_STRENGTH << 4) |
983 (PD5_DATA_STRENGTH << 5) | (PD6_DATA_STRENGTH << 6) |
984 (PD7_DATA_STRENGTH << 7));
985
986 reg_gpio_pd_gpio = (PD0_FUNC == AS_GPIO ? BIT(0) : 0) | (PD1_FUNC == AS_GPIO ? BIT(1) : 0) |
987 (PD2_FUNC == AS_GPIO ? BIT(2) : 0) | (PD3_FUNC == AS_GPIO ? BIT(3) : 0) |
988 (PD4_FUNC == AS_GPIO ? BIT(4) : 0) | (PD5_FUNC == AS_GPIO ? BIT(5) : 0) |
989 (PD6_FUNC == AS_GPIO ? BIT(6) : 0) | (PD7_FUNC == AS_GPIO ? BIT(7) : 0);
990
991 // PE group
992 reg_gpio_pe_setting1 = (PE0_INPUT_ENABLE << 8) | (PE1_INPUT_ENABLE << 9) | (PE2_INPUT_ENABLE << 10) |
993 (PE3_INPUT_ENABLE << 11) | (PE4_INPUT_ENABLE << 12) | (PE5_INPUT_ENABLE << 13) |
994 (PE6_INPUT_ENABLE << 14) | (PE7_INPUT_ENABLE << 15) | ((PE0_OUTPUT_ENABLE ? 0 : 1) << 16) |
995 ((PE1_OUTPUT_ENABLE ? 0 : 1) << 17) | ((PE2_OUTPUT_ENABLE ? 0 : 1) << 18) |
996 ((PE3_OUTPUT_ENABLE ? 0 : 1) << 19) | ((PE4_OUTPUT_ENABLE ? 0 : 1) << 20) |
997 ((PE5_OUTPUT_ENABLE ? 0 : 1) << 21) | ((PE6_OUTPUT_ENABLE ? 0 : 1) << 22) |
998 ((PE7_OUTPUT_ENABLE ? 0 : 1) << 23) | (PE0_DATA_OUT << 24) | (PE1_DATA_OUT << 25) |
999 (PE2_DATA_OUT << 26) | (PE3_DATA_OUT << 27) | (PE4_DATA_OUT << 28) | (PE5_DATA_OUT << 29) |
1000 (PE6_DATA_OUT << 30) | (PE7_DATA_OUT << 31);
1001 reg_gpio_pe_setting2 = (PE0_DATA_STRENGTH << 8) | (PE1_DATA_STRENGTH << 9) | (PE2_DATA_STRENGTH << 10) |
1002 (PE3_DATA_STRENGTH << 11) | (PE4_DATA_STRENGTH << 12) | (PE5_DATA_STRENGTH << 13) |
1003 (PE6_DATA_STRENGTH << 14) | (PE7_DATA_STRENGTH << 15) |
1004 (PE0_FUNC == AS_GPIO ? BIT(16) : 0) | (PE1_FUNC == AS_GPIO ? BIT(17) : 0) |
1005 (PE2_FUNC == AS_GPIO ? BIT(18) : 0) | (PE3_FUNC == AS_GPIO ? BIT(19) : 0) |
1006 (PE4_FUNC == AS_GPIO ? BIT(20) : 0) | (PE5_FUNC == AS_GPIO ? BIT(21) : 0) |
1007 (PE6_FUNC == AS_GPIO ? BIT(22) : 0) | (PE7_FUNC == AS_GPIO ? BIT(23) : 0);
1008
1009 if (anaRes_init_en) {
1010 gpio_analog_resistance_init();
1011 }
1012 }
1013
1014 #endif /* DRIVERS_GPIO_SETTING_H_ */
1015