1 /* 2 * Copyright (C) 2023 Huawei Device Co., Ltd. 3 * Licensed under the Apache License, Version 2.0 (the "License"); 4 * you may not use this file except in compliance with the License. 5 * You may obtain a copy of the License at 6 * 7 * http://www.apache.org/licenses/LICENSE-2.0 8 * 9 * Unless required by applicable law or agreed to in writing, software 10 * distributed under the License is distributed on an "AS IS" BASIS, 11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 12 * See the License for the specific language governing permissions and 13 * limitations under the License. 14 */ 15 16 #ifndef API_RENDER_DEVICE_PIPELINE_LAYOUT_DESC_H 17 #define API_RENDER_DEVICE_PIPELINE_LAYOUT_DESC_H 18 19 #include <cstdint> 20 21 #include <base/containers/array_view.h> 22 #include <base/containers/vector.h> 23 #include <render/device/pipeline_state_desc.h> 24 #include <render/namespace.h> 25 26 RENDER_BEGIN_NAMESPACE() 27 /** \addtogroup group_render_pipelinelayoutdesc 28 * @{ 29 */ 30 /** Pipeline layout constants */ 31 struct PipelineLayoutConstants { 32 /** Max descriptor set count */ 33 static constexpr uint32_t MAX_DESCRIPTOR_SET_COUNT { 4u }; 34 /** Max dynamic descriptor offset count */ 35 static constexpr uint32_t MAX_DYNAMIC_DESCRIPTOR_OFFSET_COUNT { 16u }; 36 /** Invalid index */ 37 static constexpr uint32_t INVALID_INDEX { ~0u }; 38 /** Max push constant byte size */ 39 static constexpr uint32_t MAX_PUSH_CONSTANT_BYTE_SIZE { 128u }; 40 /** Max binding count in a set */ 41 static constexpr uint32_t MAX_DESCRIPTOR_SET_BINDING_COUNT { 16u }; 42 /** Max push constant ranges */ 43 static constexpr uint32_t MAX_PUSH_CONSTANT_RANGE_COUNT { 1u }; 44 /** Max UBO bind byte size */ 45 static constexpr uint32_t MAX_UBO_BIND_BYTE_SIZE { 16u * 1024u }; 46 /** UBO bind offset alignemtn */ 47 static constexpr uint32_t MIN_UBO_BIND_OFFSET_ALIGNMENT_BYTE_SIZE { 256u }; 48 }; 49 50 /** Descriptor set layout binding */ 51 struct DescriptorSetLayoutBinding { 52 /** Binding */ 53 uint32_t binding { PipelineLayoutConstants::INVALID_INDEX }; 54 /** Descriptor type */ 55 DescriptorType descriptorType { DescriptorType::CORE_DESCRIPTOR_TYPE_MAX_ENUM }; 56 /** Descriptor count */ 57 uint32_t descriptorCount { 0 }; 58 /** Stage flags */ 59 ShaderStageFlags shaderStageFlags { 0 }; 60 }; 61 62 /** Descriptor set layout bindings */ 63 struct DescriptorSetLayoutBindings { 64 /** Bindings array */ 65 BASE_NS::vector<DescriptorSetLayoutBinding> binding; 66 }; 67 68 /** Descriptor set layout binding resource */ 69 struct DescriptorSetLayoutBindingResource { 70 /** Binding */ 71 DescriptorSetLayoutBinding binding; 72 /** Resource index to typed data */ 73 uint32_t resourceIndex { PipelineLayoutConstants::INVALID_INDEX }; 74 }; 75 76 /** Bindable buffer */ 77 struct BindableBuffer { 78 /** Handle */ 79 RenderHandle handle {}; 80 /** Byte offset to buffer */ 81 uint32_t byteOffset { 0u }; 82 /** Byte size for buffer binding */ 83 uint32_t byteSize { PipelineStateConstants::GPU_BUFFER_WHOLE_SIZE }; 84 }; 85 86 /** Bindable image */ 87 struct BindableImage { 88 /** Handle */ 89 RenderHandle handle {}; 90 /** Mip level for specific binding */ 91 uint32_t mip { PipelineStateConstants::GPU_IMAGE_ALL_MIP_LEVELS }; 92 /** Layer level for specific binding */ 93 uint32_t layer { PipelineStateConstants::GPU_IMAGE_ALL_LAYERS }; 94 /** Custom image layout */ 95 ImageLayout imageLayout { ImageLayout::CORE_IMAGE_LAYOUT_UNDEFINED }; 96 /** Sampler handle for combined image sampler */ 97 RenderHandle samplerHandle {}; 98 }; 99 100 /** Bindable sampler */ 101 struct BindableSampler { 102 /** Handle */ 103 RenderHandle handle {}; 104 }; 105 106 /** Descriptor structure for buffer */ 107 struct BufferDescriptor { 108 /** Descriptor set layout binding */ 109 DescriptorSetLayoutBinding binding {}; 110 /** Bindable resource structure with handle */ 111 BindableBuffer resource {}; 112 /** Resource state in the pipeline */ 113 GpuResourceState state {}; 114 115 /** Array offset to resources for array descriptors */ 116 uint32_t arrayOffset { 0 }; 117 }; 118 119 /** Descriptor structure for image */ 120 struct ImageDescriptor { 121 /** Descriptor set layout binding */ 122 DescriptorSetLayoutBinding binding {}; 123 /** Bindable resource structure with handle */ 124 BindableImage resource {}; 125 /** Resource state in the pipeline */ 126 GpuResourceState state {}; 127 128 /** Array offset to resources for array descriptors */ 129 uint32_t arrayOffset { 0 }; 130 }; 131 132 /** Descriptor structure for sampler */ 133 struct SamplerDescriptor { 134 /** Descriptor set layout binding */ 135 DescriptorSetLayoutBinding binding {}; 136 /** Bindable resource structure with handle */ 137 BindableSampler resource {}; 138 139 /** Array offset to resources for array descriptors */ 140 uint32_t arrayOffset { 0 }; 141 }; 142 143 /** Descriptor structure for acceleration structure */ 144 struct AccelerationStructureDescriptor { 145 /** Descriptor set layout binding */ 146 DescriptorSetLayoutBinding binding {}; 147 /** Bindable resource structure with handle */ 148 BindableBuffer resource {}; 149 /** Resource state in the pipeline */ 150 GpuResourceState state {}; 151 152 /** Array offset to resources for array descriptors */ 153 uint32_t arrayOffset { 0 }; 154 }; 155 156 /** Descriptor set layout binding resources */ 157 struct DescriptorSetLayoutBindingResources { 158 /** Bindings */ 159 BASE_NS::array_view<const DescriptorSetLayoutBindingResource> bindings; 160 161 /** Buffer descriptors */ 162 BASE_NS::array_view<const BufferDescriptor> buffers; 163 /** Image descriptors */ 164 BASE_NS::array_view<const ImageDescriptor> images; 165 /** Sampler descriptors */ 166 BASE_NS::array_view<const SamplerDescriptor> samplers; 167 168 /** Mask of bindings in the descriptor set. Max uint is value which means that not set */ 169 uint32_t descriptorSetBindingMask { ~0u }; 170 /** Current binding mask. Max uint is value which means that not set */ 171 uint32_t bindingMask { ~0u }; 172 }; 173 174 /** Descriptor set layout */ 175 struct DescriptorSetLayout { 176 /** Set */ 177 uint32_t set { PipelineLayoutConstants::INVALID_INDEX }; 178 /** Bindings */ 179 BASE_NS::vector<DescriptorSetLayoutBinding> bindings; 180 }; 181 182 /** Push constant */ 183 struct PushConstant { 184 /** Shader stage flags */ 185 ShaderStageFlags shaderStageFlags { 0 }; 186 /** Byte size */ 187 uint32_t byteSize { 0 }; 188 }; 189 190 /** Pipeline layout */ 191 struct PipelineLayout { 192 /** Push constant */ 193 PushConstant pushConstant; 194 /** Descriptor set count */ 195 uint32_t descriptorSetCount { 0 }; 196 /** Descriptor sets */ 197 DescriptorSetLayout descriptorSetLayouts[PipelineLayoutConstants::MAX_DESCRIPTOR_SET_COUNT] {}; 198 }; 199 200 /** Shader thread group variables (can be used with group count and group sizes */ 201 struct ShaderThreadGroup { 202 /** Thread group variable X */ 203 uint32_t x { 1u }; 204 /** Thread group variable Y */ 205 uint32_t y { 1u }; 206 /** Thread group variable Z */ 207 uint32_t z { 1u }; 208 }; 209 /** @} */ 210 RENDER_END_NAMESPACE() 211 212 #endif // API_RENDER_DEVICE_PIPELINE_LAYOUT_DESC_H 213