1// SPDX-License-Identifier: GPL-2.0-or-later 2// Copyright 2019 IBM Corp. 3/dts-v1/; 4 5#include "aspeed-g6.dtsi" 6#include <dt-bindings/gpio/aspeed-gpio.h> 7#include <dt-bindings/i2c/i2c.h> 8#include <dt-bindings/leds/leds-pca955x.h> 9 10/ { 11 model = "Rainier"; 12 compatible = "ibm,rainier-bmc", "aspeed,ast2600"; 13 14 aliases { 15 serial4 = &uart5; 16 i2c16 = &i2c2mux0; 17 i2c17 = &i2c2mux1; 18 i2c18 = &i2c2mux2; 19 i2c19 = &i2c2mux3; 20 21 spi10 = &cfam0_spi0; 22 spi11 = &cfam0_spi1; 23 spi12 = &cfam0_spi2; 24 spi13 = &cfam0_spi3; 25 spi20 = &cfam1_spi0; 26 spi21 = &cfam1_spi1; 27 spi22 = &cfam1_spi2; 28 spi23 = &cfam1_spi3; 29 spi30 = &cfam2_spi0; 30 spi31 = &cfam2_spi1; 31 spi32 = &cfam2_spi2; 32 spi33 = &cfam2_spi3; 33 }; 34 35 chosen { 36 stdout-path = &uart5; 37 bootargs = "console=ttyS4,115200n8"; 38 }; 39 40 memory@80000000 { 41 device_type = "memory"; 42 reg = <0x80000000 0x40000000>; 43 }; 44 45 reserved-memory { 46 #address-cells = <1>; 47 #size-cells = <1>; 48 ranges; 49 50 flash_memory: region@B8000000 { 51 no-map; 52 reg = <0xB8000000 0x04000000>; /* 64M */ 53 }; 54 55 vga_memory: region@bf000000 { 56 no-map; 57 compatible = "shared-dma-pool"; 58 reg = <0xbf000000 0x01000000>; /* 16M */ 59 }; 60 }; 61 62 gpio-keys { 63 compatible = "gpio-keys"; 64 65 ps0-presence { 66 label = "ps0-presence"; 67 gpios = <&gpio0 ASPEED_GPIO(S, 0) GPIO_ACTIVE_LOW>; 68 linux,code = <ASPEED_GPIO(S, 0)>; 69 }; 70 71 ps1-presence { 72 label = "ps1-presence"; 73 gpios = <&gpio0 ASPEED_GPIO(S, 1) GPIO_ACTIVE_LOW>; 74 linux,code = <ASPEED_GPIO(S, 1)>; 75 }; 76 77 ps2-presence { 78 label = "ps2-presence"; 79 gpios = <&gpio0 ASPEED_GPIO(S, 2) GPIO_ACTIVE_LOW>; 80 linux,code = <ASPEED_GPIO(S, 2)>; 81 }; 82 83 ps3-presence { 84 label = "ps3-presence"; 85 gpios = <&gpio0 ASPEED_GPIO(S, 3) GPIO_ACTIVE_LOW>; 86 linux,code = <ASPEED_GPIO(S, 3)>; 87 }; 88 }; 89 90 i2c2mux: i2cmux { 91 compatible = "i2c-mux-gpio"; 92 #address-cells = <1>; 93 #size-cells = <0>; 94 status = "okay"; 95 96 i2c-parent = <&i2c2>; 97 mux-gpios = <&gpio0 ASPEED_GPIO(G, 4) GPIO_ACTIVE_HIGH>, 98 <&gpio0 ASPEED_GPIO(G, 5) GPIO_ACTIVE_HIGH>; 99 idle-state = <0>; 100 101 i2c2mux0: i2c@0 { 102 #address-cells = <1>; 103 #size-cells = <0>; 104 reg = <0>; 105 }; 106 107 i2c2mux1: i2c@1 { 108 #address-cells = <1>; 109 #size-cells = <0>; 110 reg = <1>; 111 }; 112 113 i2c2mux2: i2c@2 { 114 #address-cells = <1>; 115 #size-cells = <0>; 116 reg = <2>; 117 }; 118 119 i2c2mux3: i2c@3 { 120 #address-cells = <1>; 121 #size-cells = <0>; 122 reg = <3>; 123 }; 124 }; 125}; 126 127&ehci1 { 128 status = "okay"; 129}; 130 131&gpio0 { 132 gpio-line-names = 133 /*A0-A7*/ "","","","","","","","", 134 /*B0-B7*/ "","","","","","","checkstop","", 135 /*C0-C7*/ "","","","","","","","", 136 /*D0-D7*/ "","","","","","","","", 137 /*E0-E7*/ "","","","","","","","", 138 /*F0-F7*/ "","","","","","","","", 139 /*G0-G7*/ "","","","","","","","", 140 /*H0-H7*/ "","","","","","","","", 141 /*I0-I7*/ "","","","","","","","", 142 /*J0-J7*/ "","","","","","","","", 143 /*K0-K7*/ "","","","","","","","", 144 /*L0-L7*/ "","","","","","","","", 145 /*M0-M7*/ "","","","","","","","", 146 /*N0-N7*/ "","","","","","","","", 147 /*O0-O7*/ "","","","usb-power","","","","", 148 /*P0-P7*/ "","","","","","","","", 149 /*Q0-Q7*/ "cfam-reset","","","","","","","", 150 /*R0-R7*/ "","","","","","","","", 151 /*S0-S7*/ "presence-ps0","presence-ps1","presence-ps2","presence-ps3", 152 "","","","", 153 /*T0-T7*/ "","","","","","","","", 154 /*U0-U7*/ "","","","","","","","", 155 /*V0-V7*/ "","","","","","","","", 156 /*W0-W7*/ "","","","","","","","", 157 /*X0-X7*/ "","","","","","","","", 158 /*Y0-Y7*/ "","","","","","","","", 159 /*Z0-Z7*/ "","","","","","","",""; 160 161 pin_mclr_vpp { 162 gpio-hog; 163 gpios = <ASPEED_GPIO(P, 7) GPIO_OPEN_DRAIN>; 164 output-high; 165 line-name = "mclr_vpp"; 166 }; 167 168 i2c3_mux_oe_n { 169 gpio-hog; 170 gpios = <ASPEED_GPIO(G, 6) GPIO_ACTIVE_LOW>; 171 output-high; 172 line-name = "I2C3_MUX_OE_N"; 173 }; 174}; 175 176&emmc_controller { 177 status = "okay"; 178}; 179 180&pinctrl_emmc_default { 181 bias-disable; 182}; 183 184&emmc { 185 status = "okay"; 186}; 187 188&fsim0 { 189 status = "okay"; 190 191 #address-cells = <2>; 192 #size-cells = <0>; 193 194 /* 195 * CFAM Reset is supposed to be active low but pass1 hardware is wired 196 * active high. 197 */ 198 cfam-reset-gpios = <&gpio0 ASPEED_GPIO(Q, 0) GPIO_ACTIVE_HIGH>; 199 200 cfam@0,0 { 201 reg = <0 0>; 202 #address-cells = <1>; 203 #size-cells = <1>; 204 chip-id = <0>; 205 206 scom@1000 { 207 compatible = "ibm,fsi2pib"; 208 reg = <0x1000 0x400>; 209 }; 210 211 i2c@1800 { 212 compatible = "ibm,fsi-i2c-master"; 213 reg = <0x1800 0x400>; 214 #address-cells = <1>; 215 #size-cells = <0>; 216 }; 217 218 fsi2spi@1c00 { 219 compatible = "ibm,fsi2spi"; 220 reg = <0x1c00 0x400>; 221 #address-cells = <1>; 222 #size-cells = <0>; 223 224 cfam0_spi0: spi@0 { 225 reg = <0x0>; 226 #address-cells = <1>; 227 #size-cells = <0>; 228 229 eeprom@0 { 230 at25,byte-len = <0x80000>; 231 at25,addr-mode = <4>; 232 at25,page-size = <256>; 233 234 compatible = "atmel,at25"; 235 reg = <0>; 236 spi-max-frequency = <1000000>; 237 }; 238 }; 239 240 cfam0_spi1: spi@20 { 241 reg = <0x20>; 242 #address-cells = <1>; 243 #size-cells = <0>; 244 245 eeprom@0 { 246 at25,byte-len = <0x80000>; 247 at25,addr-mode = <4>; 248 at25,page-size = <256>; 249 250 compatible = "atmel,at25"; 251 reg = <0>; 252 spi-max-frequency = <1000000>; 253 }; 254 }; 255 256 cfam0_spi2: spi@40 { 257 reg = <0x40>; 258 #address-cells = <1>; 259 #size-cells = <0>; 260 261 eeprom@0 { 262 at25,byte-len = <0x80000>; 263 at25,addr-mode = <4>; 264 at25,page-size = <256>; 265 266 compatible = "atmel,at25"; 267 reg = <0>; 268 spi-max-frequency = <1000000>; 269 }; 270 }; 271 272 cfam0_spi3: spi@60 { 273 reg = <0x60>; 274 #address-cells = <1>; 275 #size-cells = <0>; 276 277 eeprom@0 { 278 at25,byte-len = <0x80000>; 279 at25,addr-mode = <4>; 280 at25,page-size = <256>; 281 282 compatible = "atmel,at25"; 283 reg = <0>; 284 spi-max-frequency = <1000000>; 285 }; 286 }; 287 }; 288 289 sbefifo@2400 { 290 compatible = "ibm,p9-sbefifo"; 291 reg = <0x2400 0x400>; 292 #address-cells = <1>; 293 #size-cells = <0>; 294 295 fsi_occ0: occ { 296 compatible = "ibm,p10-occ"; 297 }; 298 }; 299 300 fsi_hub0: hub@3400 { 301 compatible = "fsi-master-hub"; 302 reg = <0x3400 0x400>; 303 #address-cells = <2>; 304 #size-cells = <0>; 305 306 no-scan-on-init; 307 }; 308 }; 309}; 310 311&fsi_hub0 { 312 cfam@1,0 { 313 reg = <1 0>; 314 #address-cells = <1>; 315 #size-cells = <1>; 316 chip-id = <1>; 317 318 scom@1000 { 319 compatible = "ibm,fsi2pib"; 320 reg = <0x1000 0x400>; 321 }; 322 323 i2c@1800 { 324 compatible = "ibm,fsi-i2c-master"; 325 reg = <0x1800 0x400>; 326 #address-cells = <1>; 327 #size-cells = <0>; 328 }; 329 330 fsi2spi@1c00 { 331 compatible = "ibm,fsi2spi"; 332 reg = <0x1c00 0x400>; 333 #address-cells = <1>; 334 #size-cells = <0>; 335 336 cfam1_spi0: spi@0 { 337 reg = <0x0>; 338 #address-cells = <1>; 339 #size-cells = <0>; 340 341 eeprom@0 { 342 at25,byte-len = <0x80000>; 343 at25,addr-mode = <4>; 344 at25,page-size = <256>; 345 346 compatible = "atmel,at25"; 347 reg = <0>; 348 spi-max-frequency = <1000000>; 349 }; 350 }; 351 352 cfam1_spi1: spi@20 { 353 reg = <0x20>; 354 #address-cells = <1>; 355 #size-cells = <0>; 356 357 eeprom@0 { 358 at25,byte-len = <0x80000>; 359 at25,addr-mode = <4>; 360 at25,page-size = <256>; 361 362 compatible = "atmel,at25"; 363 reg = <0>; 364 spi-max-frequency = <1000000>; 365 }; 366 }; 367 368 cfam1_spi2: spi@40 { 369 reg = <0x40>; 370 #address-cells = <1>; 371 #size-cells = <0>; 372 373 eeprom@0 { 374 at25,byte-len = <0x80000>; 375 at25,addr-mode = <4>; 376 at25,page-size = <256>; 377 378 compatible = "atmel,at25"; 379 reg = <0>; 380 spi-max-frequency = <1000000>; 381 }; 382 }; 383 384 cfam1_spi3: spi@60 { 385 reg = <0x60>; 386 #address-cells = <1>; 387 #size-cells = <0>; 388 389 eeprom@0 { 390 at25,byte-len = <0x80000>; 391 at25,addr-mode = <4>; 392 at25,page-size = <256>; 393 394 compatible = "atmel,at25"; 395 reg = <0>; 396 spi-max-frequency = <1000000>; 397 }; 398 }; 399 }; 400 401 sbefifo@2400 { 402 compatible = "ibm,p9-sbefifo"; 403 reg = <0x2400 0x400>; 404 #address-cells = <1>; 405 #size-cells = <0>; 406 407 fsi_occ1: occ { 408 compatible = "ibm,p10-occ"; 409 }; 410 }; 411 412 fsi_hub1: hub@3400 { 413 compatible = "fsi-master-hub"; 414 reg = <0x3400 0x400>; 415 #address-cells = <2>; 416 #size-cells = <0>; 417 418 no-scan-on-init; 419 }; 420 }; 421 422 cfam@2,0 { 423 reg = <2 0>; 424 #address-cells = <1>; 425 #size-cells = <1>; 426 chip-id = <2>; 427 428 scom@1000 { 429 compatible = "ibm,fsi2pib"; 430 reg = <0x1000 0x400>; 431 }; 432 433 i2c@1800 { 434 compatible = "ibm,fsi-i2c-master"; 435 reg = <0x1800 0x400>; 436 #address-cells = <1>; 437 #size-cells = <0>; 438 }; 439 440 fsi2spi@1c00 { 441 compatible = "ibm,fsi2spi"; 442 reg = <0x1c00 0x400>; 443 #address-cells = <1>; 444 #size-cells = <0>; 445 446 cfam2_spi0: spi@0 { 447 reg = <0x0>; 448 #address-cells = <1>; 449 #size-cells = <0>; 450 451 eeprom@0 { 452 at25,byte-len = <0x80000>; 453 at25,addr-mode = <4>; 454 at25,page-size = <256>; 455 456 compatible = "atmel,at25"; 457 reg = <0>; 458 spi-max-frequency = <1000000>; 459 }; 460 }; 461 462 cfam2_spi1: spi@20 { 463 reg = <0x20>; 464 #address-cells = <1>; 465 #size-cells = <0>; 466 467 eeprom@0 { 468 at25,byte-len = <0x80000>; 469 at25,addr-mode = <4>; 470 at25,page-size = <256>; 471 472 compatible = "atmel,at25"; 473 reg = <0>; 474 spi-max-frequency = <1000000>; 475 }; 476 }; 477 478 cfam2_spi2: spi@40 { 479 reg = <0x40>; 480 #address-cells = <1>; 481 #size-cells = <0>; 482 483 eeprom@0 { 484 at25,byte-len = <0x80000>; 485 at25,addr-mode = <4>; 486 at25,page-size = <256>; 487 488 compatible = "atmel,at25"; 489 reg = <0>; 490 spi-max-frequency = <1000000>; 491 }; 492 }; 493 494 cfam2_spi3: spi@60 { 495 reg = <0x60>; 496 #address-cells = <1>; 497 #size-cells = <0>; 498 499 eeprom@0 { 500 at25,byte-len = <0x80000>; 501 at25,addr-mode = <4>; 502 at25,page-size = <256>; 503 504 compatible = "atmel,at25"; 505 reg = <0>; 506 spi-max-frequency = <1000000>; 507 }; 508 }; 509 }; 510 511 sbefifo@2400 { 512 compatible = "ibm,p9-sbefifo"; 513 reg = <0x2400 0x400>; 514 #address-cells = <1>; 515 #size-cells = <0>; 516 517 fsi_occ2: occ { 518 compatible = "ibm,p10-occ"; 519 }; 520 }; 521 522 fsi_hub2: hub@3400 { 523 compatible = "fsi-master-hub"; 524 reg = <0x3400 0x400>; 525 #address-cells = <2>; 526 #size-cells = <0>; 527 528 no-scan-on-init; 529 }; 530 }; 531}; 532 533/* Legacy OCC numbering (to get rid of when userspace is fixed) */ 534&fsi_occ0 { 535 reg = <1>; 536}; 537 538&fsi_occ1 { 539 reg = <2>; 540}; 541 542&fsi_occ2 { 543 reg = <3>; 544}; 545 546&ibt { 547 status = "okay"; 548}; 549 550&i2c0 { 551 status = "okay"; 552 553 eeprom@51 { 554 compatible = "atmel,24c64"; 555 reg = <0x51>; 556 }; 557 558 tca9554@40 { 559 compatible = "ti,tca9554"; 560 reg = <0x40>; 561 gpio-controller; 562 #gpio-cells = <2>; 563 564 smbus0 { 565 gpio-hog; 566 gpios = <4 GPIO_ACTIVE_HIGH>; 567 output-high; 568 line-name = "smbus0"; 569 }; 570 }; 571 572}; 573 574&i2c1 { 575 status = "okay"; 576}; 577 578&i2c2 { 579 status = "okay"; 580}; 581 582&i2c3 { 583 status = "okay"; 584 585 power-supply@68 { 586 compatible = "ibm,cffps"; 587 reg = <0x68>; 588 }; 589 590 power-supply@69 { 591 compatible = "ibm,cffps"; 592 reg = <0x69>; 593 }; 594 595 power-supply@6a { 596 compatible = "ibm,cffps"; 597 reg = <0x6a>; 598 }; 599 600 power-supply@6b { 601 compatible = "ibm,cffps"; 602 reg = <0x6b>; 603 }; 604}; 605 606&i2c4 { 607 status = "okay"; 608 609 tmp275@48 { 610 compatible = "ti,tmp275"; 611 reg = <0x48>; 612 }; 613 614 tmp275@49 { 615 compatible = "ti,tmp275"; 616 reg = <0x49>; 617 }; 618 619 tmp275@4a { 620 compatible = "ti,tmp275"; 621 reg = <0x4a>; 622 }; 623 624 eeprom@50 { 625 compatible = "atmel,24c64"; 626 reg = <0x50>; 627 }; 628 629 eeprom@51 { 630 compatible = "atmel,24c64"; 631 reg = <0x51>; 632 }; 633 634 eeprom@52 { 635 compatible = "atmel,24c64"; 636 reg = <0x52>; 637 }; 638}; 639 640&i2c5 { 641 status = "okay"; 642 643 tmp275@48 { 644 compatible = "ti,tmp275"; 645 reg = <0x48>; 646 }; 647 648 tmp275@49 { 649 compatible = "ti,tmp275"; 650 reg = <0x49>; 651 }; 652 653 eeprom@50 { 654 compatible = "atmel,24c64"; 655 reg = <0x50>; 656 }; 657 658 eeprom@51 { 659 compatible = "atmel,24c64"; 660 reg = <0x51>; 661 }; 662}; 663 664&i2c6 { 665 status = "okay"; 666 667 tmp275@48 { 668 compatible = "ti,tmp275"; 669 reg = <0x48>; 670 }; 671 672 tmp275@4a { 673 compatible = "ti,tmp275"; 674 reg = <0x4a>; 675 }; 676 677 tmp275@4b { 678 compatible = "ti,tmp275"; 679 reg = <0x4b>; 680 }; 681 682 eeprom@50 { 683 compatible = "atmel,24c64"; 684 reg = <0x50>; 685 }; 686 687 eeprom@51 { 688 compatible = "atmel,24c64"; 689 reg = <0x51>; 690 }; 691 692 eeprom@52 { 693 compatible = "atmel,24c64"; 694 reg = <0x52>; 695 }; 696 697 eeprom@53 { 698 compatible = "atmel,24c64"; 699 reg = <0x53>; 700 }; 701}; 702 703&i2c7 { 704 multi-master; 705 status = "okay"; 706 707 si7021-a20@40 { 708 compatible = "silabs,si7020"; 709 reg = <0x40>; 710 }; 711 712 tmp275@48 { 713 compatible = "ti,tmp275"; 714 reg = <0x48>; 715 }; 716 717 max31785@52 { 718 compatible = "maxim,max31785a"; 719 reg = <0x52>; 720 #address-cells = <1>; 721 #size-cells = <0>; 722 723 fan@0 { 724 compatible = "pmbus-fan"; 725 reg = <0>; 726 tach-pulses = <2>; 727 }; 728 729 fan@1 { 730 compatible = "pmbus-fan"; 731 reg = <1>; 732 tach-pulses = <2>; 733 }; 734 735 fan@2 { 736 compatible = "pmbus-fan"; 737 reg = <2>; 738 tach-pulses = <2>; 739 }; 740 741 fan@3 { 742 compatible = "pmbus-fan"; 743 reg = <3>; 744 tach-pulses = <2>; 745 }; 746 }; 747 748 pca0: pca9552@61 { 749 compatible = "nxp,pca9552"; 750 reg = <0x61>; 751 #address-cells = <1>; 752 #size-cells = <0>; 753 754 gpio-controller; 755 #gpio-cells = <2>; 756 757 gpio@0 { 758 reg = <0>; 759 type = <PCA955X_TYPE_GPIO>; 760 }; 761 762 gpio@1 { 763 reg = <1>; 764 type = <PCA955X_TYPE_GPIO>; 765 }; 766 767 gpio@2 { 768 reg = <2>; 769 type = <PCA955X_TYPE_GPIO>; 770 }; 771 772 gpio@3 { 773 reg = <3>; 774 type = <PCA955X_TYPE_GPIO>; 775 }; 776 777 gpio@4 { 778 reg = <4>; 779 type = <PCA955X_TYPE_GPIO>; 780 }; 781 782 gpio@5 { 783 reg = <5>; 784 type = <PCA955X_TYPE_GPIO>; 785 }; 786 787 gpio@6 { 788 reg = <6>; 789 type = <PCA955X_TYPE_GPIO>; 790 }; 791 792 gpio@7 { 793 reg = <7>; 794 type = <PCA955X_TYPE_GPIO>; 795 }; 796 797 gpio@8 { 798 reg = <8>; 799 type = <PCA955X_TYPE_GPIO>; 800 }; 801 802 gpio@9 { 803 reg = <9>; 804 type = <PCA955X_TYPE_GPIO>; 805 }; 806 807 gpio@10 { 808 reg = <10>; 809 type = <PCA955X_TYPE_GPIO>; 810 }; 811 812 gpio@11 { 813 reg = <11>; 814 type = <PCA955X_TYPE_GPIO>; 815 }; 816 817 gpio@12 { 818 reg = <12>; 819 type = <PCA955X_TYPE_GPIO>; 820 }; 821 822 gpio@13 { 823 reg = <13>; 824 type = <PCA955X_TYPE_GPIO>; 825 }; 826 827 gpio@14 { 828 reg = <14>; 829 type = <PCA955X_TYPE_GPIO>; 830 }; 831 832 gpio@15 { 833 reg = <15>; 834 type = <PCA955X_TYPE_GPIO>; 835 }; 836 }; 837 838 ibm-panel@62 { 839 compatible = "ibm,op-panel"; 840 reg = <(0x62 | I2C_OWN_SLAVE_ADDRESS)>; 841 }; 842 843 dps: dps310@76 { 844 compatible = "infineon,dps310"; 845 reg = <0x76>; 846 #io-channel-cells = <0>; 847 }; 848 849 eeprom@50 { 850 compatible = "atmel,24c64"; 851 reg = <0x50>; 852 }; 853 854 eeprom@51 { 855 compatible = "atmel,24c64"; 856 reg = <0x51>; 857 }; 858}; 859 860&i2c8 { 861 status = "okay"; 862 863 ucd90320@11 { 864 compatible = "ti,ucd90320"; 865 reg = <0x11>; 866 }; 867 868 rtc@32 { 869 compatible = "epson,rx8900"; 870 reg = <0x32>; 871 }; 872 873 tmp275@48 { 874 compatible = "ti,tmp275"; 875 reg = <0x48>; 876 }; 877 878 tmp275@4a { 879 compatible = "ti,tmp275"; 880 reg = <0x4a>; 881 }; 882 883 eeprom@50 { 884 compatible = "atmel,24c64"; 885 reg = <0x50>; 886 }; 887 888 eeprom@51 { 889 compatible = "atmel,24c64"; 890 reg = <0x51>; 891 }; 892 893 pca1: pca9552@61 { 894 compatible = "nxp,pca9552"; 895 reg = <0x61>; 896 #address-cells = <1>; 897 #size-cells = <0>; 898 gpio-controller; 899 #gpio-cells = <2>; 900 901 gpio@0 { 902 reg = <0>; 903 type = <PCA955X_TYPE_GPIO>; 904 }; 905 906 gpio@1 { 907 reg = <1>; 908 type = <PCA955X_TYPE_GPIO>; 909 }; 910 911 gpio@2 { 912 reg = <2>; 913 type = <PCA955X_TYPE_GPIO>; 914 }; 915 916 gpio@3 { 917 reg = <3>; 918 type = <PCA955X_TYPE_GPIO>; 919 }; 920 921 gpio@4 { 922 reg = <4>; 923 type = <PCA955X_TYPE_GPIO>; 924 }; 925 926 gpio@5 { 927 reg = <5>; 928 type = <PCA955X_TYPE_GPIO>; 929 }; 930 931 gpio@6 { 932 reg = <6>; 933 type = <PCA955X_TYPE_GPIO>; 934 }; 935 936 gpio@7 { 937 reg = <7>; 938 type = <PCA955X_TYPE_GPIO>; 939 }; 940 941 gpio@8 { 942 reg = <8>; 943 type = <PCA955X_TYPE_GPIO>; 944 }; 945 946 gpio@9 { 947 reg = <9>; 948 type = <PCA955X_TYPE_GPIO>; 949 }; 950 951 gpio@10 { 952 reg = <10>; 953 type = <PCA955X_TYPE_GPIO>; 954 }; 955 956 gpio@11 { 957 reg = <11>; 958 type = <PCA955X_TYPE_GPIO>; 959 }; 960 961 gpio@12 { 962 reg = <12>; 963 type = <PCA955X_TYPE_GPIO>; 964 }; 965 966 gpio@13 { 967 reg = <13>; 968 type = <PCA955X_TYPE_GPIO>; 969 }; 970 971 gpio@14 { 972 reg = <14>; 973 type = <PCA955X_TYPE_GPIO>; 974 }; 975 976 gpio@15 { 977 reg = <15>; 978 type = <PCA955X_TYPE_GPIO>; 979 }; 980 }; 981 982}; 983 984&i2c9 { 985 status = "okay"; 986 987 tmp423a@4c { 988 compatible = "ti,tmp423"; 989 reg = <0x4c>; 990 }; 991 992 tmp423b@4d { 993 compatible = "ti,tmp423"; 994 reg = <0x4d>; 995 }; 996 997 eeprom@50 { 998 compatible = "atmel,24c128"; 999 reg = <0x50>; 1000 }; 1001}; 1002 1003&i2c10 { 1004 status = "okay"; 1005 1006 tmp423a@4c { 1007 compatible = "ti,tmp423"; 1008 reg = <0x4c>; 1009 }; 1010 1011 tmp423b@4d { 1012 compatible = "ti,tmp423"; 1013 reg = <0x4d>; 1014 }; 1015 1016 eeprom@50 { 1017 compatible = "atmel,24c128"; 1018 reg = <0x50>; 1019 }; 1020}; 1021 1022&i2c11 { 1023 status = "okay"; 1024 1025 tmp275@48 { 1026 compatible = "ti,tmp275"; 1027 reg = <0x48>; 1028 }; 1029 1030 tmp275@49 { 1031 compatible = "ti,tmp275"; 1032 reg = <0x49>; 1033 }; 1034 1035 eeprom@50 { 1036 compatible = "atmel,24c64"; 1037 reg = <0x50>; 1038 }; 1039 1040 eeprom@51 { 1041 compatible = "atmel,24c64"; 1042 reg = <0x51>; 1043 }; 1044}; 1045 1046&i2c12 { 1047 status = "okay"; 1048}; 1049 1050&i2c13 { 1051 status = "okay"; 1052 1053 eeprom@50 { 1054 compatible = "atmel,24c64"; 1055 reg = <0x50>; 1056 }; 1057}; 1058 1059&i2c14 { 1060 status = "okay"; 1061 1062 eeprom@50 { 1063 compatible = "atmel,24c64"; 1064 reg = <0x50>; 1065 }; 1066}; 1067 1068&i2c15 { 1069 status = "okay"; 1070 1071 eeprom@50 { 1072 compatible = "atmel,24c64"; 1073 reg = <0x50>; 1074 }; 1075}; 1076 1077&vuart1 { 1078 status = "okay"; 1079}; 1080 1081&vuart2 { 1082 status = "okay"; 1083}; 1084 1085&lpc_ctrl { 1086 status = "okay"; 1087 memory-region = <&flash_memory>; 1088}; 1089 1090&mac2 { 1091 status = "okay"; 1092 pinctrl-names = "default"; 1093 pinctrl-0 = <&pinctrl_rmii3_default>; 1094 clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>, 1095 <&syscon ASPEED_CLK_MAC3RCLK>; 1096 clock-names = "MACCLK", "RCLK"; 1097 use-ncsi; 1098}; 1099 1100&mac3 { 1101 status = "okay"; 1102 pinctrl-names = "default"; 1103 pinctrl-0 = <&pinctrl_rmii4_default>; 1104 clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>, 1105 <&syscon ASPEED_CLK_MAC4RCLK>; 1106 clock-names = "MACCLK", "RCLK"; 1107 use-ncsi; 1108}; 1109 1110&fmc { 1111 status = "okay"; 1112 flash@0 { 1113 status = "okay"; 1114 m25p,fast-read; 1115 label = "bmc"; 1116 spi-max-frequency = <50000000>; 1117#include "openbmc-flash-layout-128.dtsi" 1118 }; 1119}; 1120 1121&spi1 { 1122 status = "okay"; 1123 pinctrl-names = "default"; 1124 pinctrl-0 = <&pinctrl_spi1_default>; 1125 1126 flash@0 { 1127 status = "okay"; 1128 m25p,fast-read; 1129 label = "pnor"; 1130 spi-max-frequency = <100000000>; 1131 }; 1132}; 1133 1134&xdma { 1135 status = "okay"; 1136 memory-region = <&vga_memory>; 1137}; 1138