1/* SPDX-License-Identifier: GPL-2.0-or-later */ 2/* 3 NetWinder Floating Point Emulator 4 (c) Rebel.COM, 1998 5 (c) 1998, 1999 Philip Blundell 6 7 Direct questions, comments to Scott Bambrough <scottb@netwinder.org> 8 9*/ 10#include <asm/assembler.h> 11#include <asm/extable.h> 12#include <asm/opcodes.h> 13 14/* This is the kernel's entry point into the floating point emulator. 15It is called from the kernel with code similar to this: 16 17 sub r4, r5, #4 18 ldrt r0, [r4] @ r0 = instruction 19 adrsvc al, r9, ret_from_exception @ r9 = normal FP return 20 adrsvc al, lr, fpundefinstr @ lr = undefined instr return 21 22 get_current_task r10 23 mov r8, #1 24 strb r8, [r10, #TSK_USED_MATH] @ set current->used_math 25 add r10, r10, #TSS_FPESAVE @ r10 = workspace 26 ldr r4, .LC2 27 ldr pc, [r4] @ Call FP emulator entry point 28 29The kernel expects the emulator to return via one of two possible 30points of return it passes to the emulator. The emulator, if 31successful in its emulation, jumps to ret_from_exception (passed in 32r9) and the kernel takes care of returning control from the trap to 33the user code. If the emulator is unable to emulate the instruction, 34it returns via _fpundefinstr (passed via lr) and the kernel halts the 35user program with a core dump. 36 37On entry to the emulator r10 points to an area of private FP workspace 38reserved in the thread structure for this process. This is where the 39emulator saves its registers across calls. The first word of this area 40is used as a flag to detect the first time a process uses floating point, 41so that the emulator startup cost can be avoided for tasks that don't 42want it. 43 44This routine does three things: 45 461) The kernel has created a struct pt_regs on the stack and saved the 47user registers into it. See /usr/include/asm/proc/ptrace.h for details. 48 492) It calls EmulateAll to emulate a floating point instruction. 50EmulateAll returns 1 if the emulation was successful, or 0 if not. 51 523) If an instruction has been emulated successfully, it looks ahead at 53the next instruction. If it is a floating point instruction, it 54executes the instruction, without returning to user space. In this 55way it repeatedly looks ahead and executes floating point instructions 56until it encounters a non floating point instruction, at which time it 57returns via _fpreturn. 58 59This is done to reduce the effect of the trap overhead on each 60floating point instructions. GCC attempts to group floating point 61instructions to allow the emulator to spread the cost of the trap over 62several floating point instructions. */ 63 64#include <asm/asm-offsets.h> 65 66 .globl nwfpe_enter 67nwfpe_enter: 68 mov r4, lr @ save the failure-return addresses 69 mov sl, sp @ we access the registers via 'sl' 70 71 ldr r5, [sp, #S_PC] @ get contents of PC; 72 mov r6, r0 @ save the opcode 73emulate: 74 ldr r1, [sp, #S_PSR] @ fetch the PSR 75 bl arm_check_condition @ check the condition 76 cmp r0, #ARM_OPCODE_CONDTEST_PASS @ condition passed? 77 78 @ if condition code failed to match, next insn 79 bne next @ get the next instruction; 80 81 mov r0, r6 @ prepare for EmulateAll() 82 bl EmulateAll @ emulate the instruction 83 cmp r0, #0 @ was emulation successful 84 reteq r4 @ no, return failure 85 86next: 87 uaccess_enable r3 88.Lx1: ldrt r6, [r5], #4 @ get the next instruction and 89 @ increment PC 90 uaccess_disable r3 91 and r2, r6, #0x0F000000 @ test for FP insns 92 teq r2, #0x0C000000 93 teqne r2, #0x0D000000 94 teqne r2, #0x0E000000 95 retne r9 @ return ok if not a fp insn 96 97 str r5, [sp, #S_PC] @ update PC copy in regs 98 99 mov r0, r6 @ save a copy 100 b emulate @ check condition and emulate 101 102 @ We need to be prepared for the instructions at .Lx1 and .Lx2 103 @ to fault. Emit the appropriate exception gunk to fix things up. 104 @ ??? For some reason, faults can happen at .Lx2 even with a 105 @ plain LDR instruction. Weird, but it seems harmless. 106 .pushsection .text.fixup,"ax" 107 .align 2 108.Lfix: ret r9 @ let the user eat segfaults 109 .popsection 110 111 ex_entry .Lx1, .Lfix 112