1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2018 Amlogic, Inc. All rights reserved. 4 */ 5 6#include "meson-g12.dtsi" 7 8/ { 9 compatible = "amlogic,g12a"; 10 11 cpus { 12 #address-cells = <0x2>; 13 #size-cells = <0x0>; 14 15 cpu0: cpu@0 { 16 device_type = "cpu"; 17 compatible = "arm,cortex-a53"; 18 reg = <0x0 0x0>; 19 enable-method = "psci"; 20 next-level-cache = <&l2>; 21 #cooling-cells = <2>; 22 }; 23 24 cpu1: cpu@1 { 25 device_type = "cpu"; 26 compatible = "arm,cortex-a53"; 27 reg = <0x0 0x1>; 28 enable-method = "psci"; 29 next-level-cache = <&l2>; 30 #cooling-cells = <2>; 31 }; 32 33 cpu2: cpu@2 { 34 device_type = "cpu"; 35 compatible = "arm,cortex-a53"; 36 reg = <0x0 0x2>; 37 enable-method = "psci"; 38 next-level-cache = <&l2>; 39 #cooling-cells = <2>; 40 }; 41 42 cpu3: cpu@3 { 43 device_type = "cpu"; 44 compatible = "arm,cortex-a53"; 45 reg = <0x0 0x3>; 46 enable-method = "psci"; 47 next-level-cache = <&l2>; 48 #cooling-cells = <2>; 49 }; 50 51 l2: l2-cache0 { 52 compatible = "cache"; 53 }; 54 }; 55 56 cpu_opp_table: opp-table { 57 compatible = "operating-points-v2"; 58 opp-shared; 59 60 opp-1000000000 { 61 opp-hz = /bits/ 64 <1000000000>; 62 opp-microvolt = <731000>; 63 }; 64 65 opp-1200000000 { 66 opp-hz = /bits/ 64 <1200000000>; 67 opp-microvolt = <731000>; 68 }; 69 70 opp-1398000000 { 71 opp-hz = /bits/ 64 <1398000000>; 72 opp-microvolt = <761000>; 73 }; 74 75 opp-1512000000 { 76 opp-hz = /bits/ 64 <1512000000>; 77 opp-microvolt = <791000>; 78 }; 79 80 opp-1608000000 { 81 opp-hz = /bits/ 64 <1608000000>; 82 opp-microvolt = <831000>; 83 }; 84 85 opp-1704000000 { 86 opp-hz = /bits/ 64 <1704000000>; 87 opp-microvolt = <861000>; 88 }; 89 90 opp-1800000000 { 91 opp-hz = /bits/ 64 <1800000000>; 92 opp-microvolt = <981000>; 93 }; 94 }; 95}; 96 97&cpu_thermal { 98 cooling-maps { 99 map0 { 100 trip = <&cpu_passive>; 101 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 102 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 103 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 104 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 105 }; 106 107 map1 { 108 trip = <&cpu_hot>; 109 cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 110 <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 111 <&cpu2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 112 <&cpu3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 113 }; 114 }; 115}; 116