• Home
  • Line#
  • Scopes#
  • Navigate#
  • Raw
  • Download
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright 2020, Compass Electronics Group, LLC
4 */
5
6#include <dt-bindings/gpio/gpio.h>
7
8/ {
9	memory@48000000 {
10		device_type = "memory";
11		/* first 128MB is reserved for secure area. */
12		reg = <0x0 0x48000000 0x0 0x78000000>;
13	};
14
15	memory@600000000 {
16		device_type = "memory";
17		reg = <0x6 0x00000000 0x0 0x80000000>;
18	};
19
20	osc_32k: osc_32k {
21		compatible = "fixed-clock";
22		#clock-cells = <0>;
23		clock-frequency = <32768>;
24		clock-output-names = "osc_32k";
25	};
26
27	reg_1p8v: regulator0 {
28		compatible = "regulator-fixed";
29		regulator-name = "fixed-1.8V";
30		regulator-min-microvolt = <1800000>;
31		regulator-max-microvolt = <1800000>;
32		regulator-boot-on;
33		regulator-always-on;
34	};
35
36	reg_3p3v: regulator1 {
37		compatible = "regulator-fixed";
38		regulator-name = "fixed-3.3V";
39		regulator-min-microvolt = <3300000>;
40		regulator-max-microvolt = <3300000>;
41		regulator-boot-on;
42		regulator-always-on;
43	};
44
45	wlan_pwrseq: wlan_pwrseq {
46		compatible = "mmc-pwrseq-simple";
47		reset-gpios = <&pca9654 1 GPIO_ACTIVE_LOW>;
48		clocks = <&osc_32k>;
49		clock-names = "ext_clock";
50		post-power-on-delay-ms = <80>;
51	};
52};
53
54&avb {
55	pinctrl-0 = <&avb_pins>;
56	pinctrl-names = "default";
57	phy-mode = "rgmii-rxid";
58	phy-handle = <&phy0>;
59	rx-internal-delay-ps = <1800>;
60	tx-internal-delay-ps = <2000>;
61	status = "okay";
62
63	phy0: ethernet-phy@0 {
64		reg = <0>;
65		interrupt-parent = <&gpio2>;
66		interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
67		reset-gpios = <&gpio2 10 GPIO_ACTIVE_LOW>;
68	};
69};
70
71&extal_clk {
72	clock-frequency = <16666666>;
73};
74
75&extalr_clk {
76	clock-frequency = <32768>;
77};
78
79&gpio6 {
80	usb_hub_reset {
81		gpio-hog;
82		gpios = <10 GPIO_ACTIVE_HIGH>;
83		output-high;
84		line-name = "usb-hub-reset";
85	};
86};
87
88&hscif0 {
89	pinctrl-0 = <&hscif0_pins>;
90	pinctrl-names = "default";
91	uart-has-rtscts;
92	status = "okay";
93
94	bluetooth {
95		compatible = "brcm,bcm43438-bt";
96		shutdown-gpios = <&pca9654 2 GPIO_ACTIVE_HIGH>;
97		host-wakeup-gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
98		device-wakeup-gpios = <&pca9654 5 GPIO_ACTIVE_HIGH>;
99		clocks = <&osc_32k>;
100		clock-names = "extclk";
101		max-speed = <4000000>;
102	};
103};
104
105&hscif2 {
106	status = "okay";
107	pinctrl-0 = <&hscif2_pins>;
108	pinctrl-names = "default";
109};
110
111&i2c4 {
112	status = "okay";
113	clock-frequency = <400000>;
114
115	pca9654: gpio@20 {
116		compatible = "onnn,pca9654";
117		reg = <0x20>;
118		gpio-controller;
119		#gpio-cells = <2>;
120		gpio-line-names =
121			"i2c4_20_0",
122			"wl_reg_on",
123			"bt_reg_on",
124			"i2c4_20_3",
125			"i2c4_20_4",
126			"bt_dev_wake",
127			"i2c4_20_6",
128			"i2c4_20_7";
129	};
130
131	pca9654_lte: gpio@21 {
132		compatible = "onnn,pca9654";
133		reg = <0x21>;
134		interrupt-parent = <&gpio5>;
135		interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
136		interrupt-controller;
137		#interrupt-cells = <2>;
138		gpio-controller;
139		#gpio-cells = <2>;
140		gpio-line-names =
141			"i2c4_21_0",
142			"zoe_pwr_on",
143			"zoe_extint",
144			"zoe_reset_n",
145			"sara_reset",
146			"i2c4_21_5",
147			"sara_pwr_off",
148			"sara_networking_status";
149	};
150
151	eeprom@50 {
152		compatible = "microchip,24c64", "atmel,24c64";
153		pagesize = <32>;
154		read-only;	/* Manufacturing EEPROM programmed at factory */
155		reg = <0x50>;
156	};
157
158	rtc@51 {
159		compatible = "nxp,pcf85263";
160		reg = <0x51>;
161	};
162
163	versaclock5: versaclock_som@6a {
164		compatible = "idt,5p49v6965";
165		reg = <0x6a>;
166		#clock-cells = <1>;
167		clocks = <&x304_clk>;
168		clock-names = "xin";
169		/* du_dotclkin0, du_dotclkin2, usb_extal, avb_txcrefclk */
170		assigned-clocks = <&versaclock5 1>,
171				   <&versaclock5 2>,
172				   <&versaclock5 3>,
173				   <&versaclock5 4>;
174		assigned-clock-rates = <33333333>, <33333333>, <50000000>, <125000000>;
175	};
176};
177
178&pfc {
179	pinctrl-0 = <&scif_clk_pins>;
180	pinctrl-names = "default";
181
182	avb_pins: avb {
183		mux {
184			groups = "avb_link", "avb_mdio", "avb_mii";
185			function = "avb";
186		};
187
188		pins_mdio {
189			groups = "avb_mdio";
190			drive-strength = <24>;
191		};
192
193		pins_mii_tx {
194			pins = "PIN_AVB_TX_CTL", "PIN_AVB_TXC", "PIN_AVB_TD0",
195			       "PIN_AVB_TD1", "PIN_AVB_TD2", "PIN_AVB_TD3";
196			drive-strength = <12>;
197		};
198	};
199
200	scif2_pins: scif2 {
201		groups = "scif2_data_a";
202		function = "scif2";
203	};
204
205	hscif0_pins: hscif0 {
206		groups = "hscif0_data", "hscif0_ctrl";
207		function = "hscif0";
208	};
209
210	hscif1_pins: hscif1 {
211		groups = "hscif1_data_a", "hscif1_ctrl_a";
212		function = "hscif1";
213	};
214
215	hscif2_pins: hscif2 {
216		groups = "hscif2_data_a";
217		function = "hscif2";
218	};
219
220	scif0_pins: scif0 {
221		groups = "scif0_data";
222		function = "scif0";
223	};
224
225	scif5_pins: scif5 {
226		groups = "scif5_data_a";
227		function = "scif5";
228	};
229
230	scif_clk_pins: scif_clk {
231		groups = "scif_clk_a";
232		function = "scif_clk";
233	};
234
235	i2c0_pins: i2c0 {
236		groups = "i2c0";
237		function = "i2c0";
238	};
239
240	sdhi2_pins: sd2 {
241		groups = "sdhi2_data4", "sdhi2_ctrl";
242		function = "sdhi2";
243		power-source = <1800>;
244	};
245
246	sdhi3_pins: sd3 {
247		groups = "sdhi3_data8", "sdhi3_ctrl", "sdhi3_ds";
248		function = "sdhi3";
249		power-source = <1800>;
250	};
251};
252
253&scif_clk {
254	clock-frequency = <14745600>;
255};
256
257&scif2 {
258	pinctrl-0 = <&scif2_pins>;
259	pinctrl-names = "default";
260	status = "okay";
261};
262
263&sdhi2 {
264	pinctrl-names = "default";
265	pinctrl-0 = <&sdhi2_pins>;
266	bus-width = <4>;
267	vmmc-supply = <&reg_3p3v>;
268	vqmmc-supply = <&reg_1p8v>;
269	non-removable;
270	cap-power-off-card;
271	pm-ignore-notify;
272	keep-power-in-suspend;
273	mmc-pwrseq = <&wlan_pwrseq>;
274	status = "okay";
275	#address-cells = <1>;
276	#size-cells = <0>;
277
278	brcmf: bcrmf@1 {
279		reg = <1>;
280		compatible = "brcm,bcm4329-fmac";
281		interrupt-parent = <&gpio1>;
282		interrupts = <27 IRQ_TYPE_LEVEL_LOW>;
283		interrupt-names = "host-wake";
284	};
285};
286
287&sdhi3 {
288	pinctrl-0 = <&sdhi3_pins>;
289	pinctrl-1 = <&sdhi3_pins>;
290	pinctrl-names = "default", "state_uhs";
291	vmmc-supply = <&reg_3p3v>;
292	vqmmc-supply = <&reg_1p8v>;
293	bus-width = <8>;
294	mmc-hs200-1_8v;
295	non-removable;
296	fixed-emmc-driver-type = <1>;
297	status = "okay";
298};
299
300&usb2_clksel {
301	clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>,
302		  <&versaclock5 3>, <&usb3s0_clk>;
303	status = "okay";
304};
305
306&usb3s0_clk {
307	clock-frequency = <100000000>;
308};
309
310&vspb {
311	status = "okay";
312};
313
314&vspi0 {
315	status = "okay";
316};
317