1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car E3 (R8A77990) SoC 4 * 5 * Copyright (C) 2018-2019 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a77990-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a77990-sysc.h> 11 12/ { 13 compatible = "renesas,r8a77990"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 aliases { 18 i2c0 = &i2c0; 19 i2c1 = &i2c1; 20 i2c2 = &i2c2; 21 i2c3 = &i2c3; 22 i2c4 = &i2c4; 23 i2c5 = &i2c5; 24 i2c6 = &i2c6; 25 i2c7 = &i2c7; 26 }; 27 28 /* 29 * The external audio clocks are configured as 0 Hz fixed frequency 30 * clocks by default. 31 * Boards that provide audio clocks should override them. 32 */ 33 audio_clk_a: audio_clk_a { 34 compatible = "fixed-clock"; 35 #clock-cells = <0>; 36 clock-frequency = <0>; 37 }; 38 39 audio_clk_b: audio_clk_b { 40 compatible = "fixed-clock"; 41 #clock-cells = <0>; 42 clock-frequency = <0>; 43 }; 44 45 audio_clk_c: audio_clk_c { 46 compatible = "fixed-clock"; 47 #clock-cells = <0>; 48 clock-frequency = <0>; 49 }; 50 51 /* External CAN clock - to be overridden by boards that provide it */ 52 can_clk: can { 53 compatible = "fixed-clock"; 54 #clock-cells = <0>; 55 clock-frequency = <0>; 56 }; 57 58 cluster1_opp: opp_table10 { 59 compatible = "operating-points-v2"; 60 opp-shared; 61 opp-800000000 { 62 opp-hz = /bits/ 64 <800000000>; 63 clock-latency-ns = <300000>; 64 }; 65 opp-1000000000 { 66 opp-hz = /bits/ 64 <1000000000>; 67 clock-latency-ns = <300000>; 68 }; 69 opp-1200000000 { 70 opp-hz = /bits/ 64 <1200000000>; 71 clock-latency-ns = <300000>; 72 opp-suspend; 73 }; 74 }; 75 76 cpus { 77 #address-cells = <1>; 78 #size-cells = <0>; 79 80 a53_0: cpu@0 { 81 compatible = "arm,cortex-a53"; 82 reg = <0>; 83 device_type = "cpu"; 84 #cooling-cells = <2>; 85 power-domains = <&sysc R8A77990_PD_CA53_CPU0>; 86 next-level-cache = <&L2_CA53>; 87 enable-method = "psci"; 88 cpu-idle-states = <&CPU_SLEEP_0>; 89 dynamic-power-coefficient = <277>; 90 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>; 91 operating-points-v2 = <&cluster1_opp>; 92 }; 93 94 a53_1: cpu@1 { 95 compatible = "arm,cortex-a53"; 96 reg = <1>; 97 device_type = "cpu"; 98 power-domains = <&sysc R8A77990_PD_CA53_CPU1>; 99 next-level-cache = <&L2_CA53>; 100 enable-method = "psci"; 101 cpu-idle-states = <&CPU_SLEEP_0>; 102 clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>; 103 operating-points-v2 = <&cluster1_opp>; 104 }; 105 106 L2_CA53: cache-controller-0 { 107 compatible = "cache"; 108 power-domains = <&sysc R8A77990_PD_CA53_SCU>; 109 cache-unified; 110 cache-level = <2>; 111 }; 112 113 idle-states { 114 entry-method = "psci"; 115 116 CPU_SLEEP_0: cpu-sleep-0 { 117 compatible = "arm,idle-state"; 118 arm,psci-suspend-param = <0x0010000>; 119 local-timer-stop; 120 entry-latency-us = <700>; 121 exit-latency-us = <700>; 122 min-residency-us = <5000>; 123 }; 124 }; 125 }; 126 127 extal_clk: extal { 128 compatible = "fixed-clock"; 129 #clock-cells = <0>; 130 /* This value must be overridden by the board */ 131 clock-frequency = <0>; 132 }; 133 134 /* External PCIe clock - can be overridden by the board */ 135 pcie_bus_clk: pcie_bus { 136 compatible = "fixed-clock"; 137 #clock-cells = <0>; 138 clock-frequency = <0>; 139 }; 140 141 pmu_a53 { 142 compatible = "arm,cortex-a53-pmu"; 143 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 144 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; 145 interrupt-affinity = <&a53_0>, <&a53_1>; 146 }; 147 148 psci { 149 compatible = "arm,psci-1.0", "arm,psci-0.2"; 150 method = "smc"; 151 }; 152 153 /* External SCIF clock - to be overridden by boards that provide it */ 154 scif_clk: scif { 155 compatible = "fixed-clock"; 156 #clock-cells = <0>; 157 clock-frequency = <0>; 158 }; 159 160 soc: soc { 161 compatible = "simple-bus"; 162 interrupt-parent = <&gic>; 163 #address-cells = <2>; 164 #size-cells = <2>; 165 ranges; 166 167 rwdt: watchdog@e6020000 { 168 compatible = "renesas,r8a77990-wdt", 169 "renesas,rcar-gen3-wdt"; 170 reg = <0 0xe6020000 0 0x0c>; 171 clocks = <&cpg CPG_MOD 402>; 172 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 173 resets = <&cpg 402>; 174 status = "disabled"; 175 }; 176 177 gpio0: gpio@e6050000 { 178 compatible = "renesas,gpio-r8a77990", 179 "renesas,rcar-gen3-gpio"; 180 reg = <0 0xe6050000 0 0x50>; 181 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 182 #gpio-cells = <2>; 183 gpio-controller; 184 gpio-ranges = <&pfc 0 0 18>; 185 #interrupt-cells = <2>; 186 interrupt-controller; 187 clocks = <&cpg CPG_MOD 912>; 188 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 189 resets = <&cpg 912>; 190 }; 191 192 gpio1: gpio@e6051000 { 193 compatible = "renesas,gpio-r8a77990", 194 "renesas,rcar-gen3-gpio"; 195 reg = <0 0xe6051000 0 0x50>; 196 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 197 #gpio-cells = <2>; 198 gpio-controller; 199 gpio-ranges = <&pfc 0 32 23>; 200 #interrupt-cells = <2>; 201 interrupt-controller; 202 clocks = <&cpg CPG_MOD 911>; 203 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 204 resets = <&cpg 911>; 205 }; 206 207 gpio2: gpio@e6052000 { 208 compatible = "renesas,gpio-r8a77990", 209 "renesas,rcar-gen3-gpio"; 210 reg = <0 0xe6052000 0 0x50>; 211 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 212 #gpio-cells = <2>; 213 gpio-controller; 214 gpio-ranges = <&pfc 0 64 26>; 215 #interrupt-cells = <2>; 216 interrupt-controller; 217 clocks = <&cpg CPG_MOD 910>; 218 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 219 resets = <&cpg 910>; 220 }; 221 222 gpio3: gpio@e6053000 { 223 compatible = "renesas,gpio-r8a77990", 224 "renesas,rcar-gen3-gpio"; 225 reg = <0 0xe6053000 0 0x50>; 226 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 227 #gpio-cells = <2>; 228 gpio-controller; 229 gpio-ranges = <&pfc 0 96 16>; 230 #interrupt-cells = <2>; 231 interrupt-controller; 232 clocks = <&cpg CPG_MOD 909>; 233 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 234 resets = <&cpg 909>; 235 }; 236 237 gpio4: gpio@e6054000 { 238 compatible = "renesas,gpio-r8a77990", 239 "renesas,rcar-gen3-gpio"; 240 reg = <0 0xe6054000 0 0x50>; 241 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 242 #gpio-cells = <2>; 243 gpio-controller; 244 gpio-ranges = <&pfc 0 128 11>; 245 #interrupt-cells = <2>; 246 interrupt-controller; 247 clocks = <&cpg CPG_MOD 908>; 248 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 249 resets = <&cpg 908>; 250 }; 251 252 gpio5: gpio@e6055000 { 253 compatible = "renesas,gpio-r8a77990", 254 "renesas,rcar-gen3-gpio"; 255 reg = <0 0xe6055000 0 0x50>; 256 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 257 #gpio-cells = <2>; 258 gpio-controller; 259 gpio-ranges = <&pfc 0 160 20>; 260 #interrupt-cells = <2>; 261 interrupt-controller; 262 clocks = <&cpg CPG_MOD 907>; 263 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 264 resets = <&cpg 907>; 265 }; 266 267 gpio6: gpio@e6055400 { 268 compatible = "renesas,gpio-r8a77990", 269 "renesas,rcar-gen3-gpio"; 270 reg = <0 0xe6055400 0 0x50>; 271 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 272 #gpio-cells = <2>; 273 gpio-controller; 274 gpio-ranges = <&pfc 0 192 18>; 275 #interrupt-cells = <2>; 276 interrupt-controller; 277 clocks = <&cpg CPG_MOD 906>; 278 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 279 resets = <&cpg 906>; 280 }; 281 282 pfc: pinctrl@e6060000 { 283 compatible = "renesas,pfc-r8a77990"; 284 reg = <0 0xe6060000 0 0x508>; 285 }; 286 287 i2c_dvfs: i2c@e60b0000 { 288 #address-cells = <1>; 289 #size-cells = <0>; 290 compatible = "renesas,iic-r8a77990"; 291 reg = <0 0xe60b0000 0 0x15>; 292 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 293 clocks = <&cpg CPG_MOD 926>; 294 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 295 resets = <&cpg 926>; 296 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 297 dma-names = "tx", "rx"; 298 status = "disabled"; 299 }; 300 301 cmt0: timer@e60f0000 { 302 compatible = "renesas,r8a77990-cmt0", 303 "renesas,rcar-gen3-cmt0"; 304 reg = <0 0xe60f0000 0 0x1004>; 305 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 306 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 307 clocks = <&cpg CPG_MOD 303>; 308 clock-names = "fck"; 309 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 310 resets = <&cpg 303>; 311 status = "disabled"; 312 }; 313 314 cmt1: timer@e6130000 { 315 compatible = "renesas,r8a77990-cmt1", 316 "renesas,rcar-gen3-cmt1"; 317 reg = <0 0xe6130000 0 0x1004>; 318 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 319 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 320 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 321 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 322 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 323 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 324 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 325 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 326 clocks = <&cpg CPG_MOD 302>; 327 clock-names = "fck"; 328 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 329 resets = <&cpg 302>; 330 status = "disabled"; 331 }; 332 333 cmt2: timer@e6140000 { 334 compatible = "renesas,r8a77990-cmt1", 335 "renesas,rcar-gen3-cmt1"; 336 reg = <0 0xe6140000 0 0x1004>; 337 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 338 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 339 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 340 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 341 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 342 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 343 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 344 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 345 clocks = <&cpg CPG_MOD 301>; 346 clock-names = "fck"; 347 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 348 resets = <&cpg 301>; 349 status = "disabled"; 350 }; 351 352 cmt3: timer@e6148000 { 353 compatible = "renesas,r8a77990-cmt1", 354 "renesas,rcar-gen3-cmt1"; 355 reg = <0 0xe6148000 0 0x1004>; 356 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 357 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 358 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 359 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 360 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 361 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 362 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 363 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 364 clocks = <&cpg CPG_MOD 300>; 365 clock-names = "fck"; 366 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 367 resets = <&cpg 300>; 368 status = "disabled"; 369 }; 370 371 cpg: clock-controller@e6150000 { 372 compatible = "renesas,r8a77990-cpg-mssr"; 373 reg = <0 0xe6150000 0 0x1000>; 374 clocks = <&extal_clk>; 375 clock-names = "extal"; 376 #clock-cells = <2>; 377 #power-domain-cells = <0>; 378 #reset-cells = <1>; 379 }; 380 381 rst: reset-controller@e6160000 { 382 compatible = "renesas,r8a77990-rst"; 383 reg = <0 0xe6160000 0 0x0200>; 384 }; 385 386 sysc: system-controller@e6180000 { 387 compatible = "renesas,r8a77990-sysc"; 388 reg = <0 0xe6180000 0 0x0400>; 389 #power-domain-cells = <1>; 390 }; 391 392 thermal: thermal@e6190000 { 393 compatible = "renesas,thermal-r8a77990"; 394 reg = <0 0xe6190000 0 0x10>, <0 0xe6190100 0 0x38>; 395 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 396 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 397 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 398 clocks = <&cpg CPG_MOD 522>; 399 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 400 resets = <&cpg 522>; 401 #thermal-sensor-cells = <0>; 402 }; 403 404 intc_ex: interrupt-controller@e61c0000 { 405 compatible = "renesas,intc-ex-r8a77990", "renesas,irqc"; 406 #interrupt-cells = <2>; 407 interrupt-controller; 408 reg = <0 0xe61c0000 0 0x200>; 409 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 410 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 411 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 412 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 413 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 414 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 415 clocks = <&cpg CPG_MOD 407>; 416 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 417 resets = <&cpg 407>; 418 }; 419 420 i2c0: i2c@e6500000 { 421 #address-cells = <1>; 422 #size-cells = <0>; 423 compatible = "renesas,i2c-r8a77990", 424 "renesas,rcar-gen3-i2c"; 425 reg = <0 0xe6500000 0 0x40>; 426 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 427 clocks = <&cpg CPG_MOD 931>; 428 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 429 resets = <&cpg 931>; 430 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 431 <&dmac2 0x91>, <&dmac2 0x90>; 432 dma-names = "tx", "rx", "tx", "rx"; 433 i2c-scl-internal-delay-ns = <110>; 434 status = "disabled"; 435 }; 436 437 i2c1: i2c@e6508000 { 438 #address-cells = <1>; 439 #size-cells = <0>; 440 compatible = "renesas,i2c-r8a77990", 441 "renesas,rcar-gen3-i2c"; 442 reg = <0 0xe6508000 0 0x40>; 443 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 444 clocks = <&cpg CPG_MOD 930>; 445 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 446 resets = <&cpg 930>; 447 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 448 <&dmac2 0x93>, <&dmac2 0x92>; 449 dma-names = "tx", "rx", "tx", "rx"; 450 i2c-scl-internal-delay-ns = <6>; 451 status = "disabled"; 452 }; 453 454 i2c2: i2c@e6510000 { 455 #address-cells = <1>; 456 #size-cells = <0>; 457 compatible = "renesas,i2c-r8a77990", 458 "renesas,rcar-gen3-i2c"; 459 reg = <0 0xe6510000 0 0x40>; 460 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 461 clocks = <&cpg CPG_MOD 929>; 462 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 463 resets = <&cpg 929>; 464 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 465 <&dmac2 0x95>, <&dmac2 0x94>; 466 dma-names = "tx", "rx", "tx", "rx"; 467 i2c-scl-internal-delay-ns = <6>; 468 status = "disabled"; 469 }; 470 471 i2c3: i2c@e66d0000 { 472 #address-cells = <1>; 473 #size-cells = <0>; 474 compatible = "renesas,i2c-r8a77990", 475 "renesas,rcar-gen3-i2c"; 476 reg = <0 0xe66d0000 0 0x40>; 477 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 478 clocks = <&cpg CPG_MOD 928>; 479 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 480 resets = <&cpg 928>; 481 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 482 dma-names = "tx", "rx"; 483 i2c-scl-internal-delay-ns = <110>; 484 status = "disabled"; 485 }; 486 487 i2c4: i2c@e66d8000 { 488 #address-cells = <1>; 489 #size-cells = <0>; 490 compatible = "renesas,i2c-r8a77990", 491 "renesas,rcar-gen3-i2c"; 492 reg = <0 0xe66d8000 0 0x40>; 493 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 494 clocks = <&cpg CPG_MOD 927>; 495 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 496 resets = <&cpg 927>; 497 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 498 dma-names = "tx", "rx"; 499 i2c-scl-internal-delay-ns = <6>; 500 status = "disabled"; 501 }; 502 503 i2c5: i2c@e66e0000 { 504 #address-cells = <1>; 505 #size-cells = <0>; 506 compatible = "renesas,i2c-r8a77990", 507 "renesas,rcar-gen3-i2c"; 508 reg = <0 0xe66e0000 0 0x40>; 509 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 510 clocks = <&cpg CPG_MOD 919>; 511 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 512 resets = <&cpg 919>; 513 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 514 dma-names = "tx", "rx"; 515 i2c-scl-internal-delay-ns = <6>; 516 status = "disabled"; 517 }; 518 519 i2c6: i2c@e66e8000 { 520 #address-cells = <1>; 521 #size-cells = <0>; 522 compatible = "renesas,i2c-r8a77990", 523 "renesas,rcar-gen3-i2c"; 524 reg = <0 0xe66e8000 0 0x40>; 525 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 526 clocks = <&cpg CPG_MOD 918>; 527 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 528 resets = <&cpg 918>; 529 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 530 dma-names = "tx", "rx"; 531 i2c-scl-internal-delay-ns = <6>; 532 status = "disabled"; 533 }; 534 535 i2c7: i2c@e6690000 { 536 #address-cells = <1>; 537 #size-cells = <0>; 538 compatible = "renesas,i2c-r8a77990", 539 "renesas,rcar-gen3-i2c"; 540 reg = <0 0xe6690000 0 0x40>; 541 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 542 clocks = <&cpg CPG_MOD 1003>; 543 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 544 resets = <&cpg 1003>; 545 i2c-scl-internal-delay-ns = <6>; 546 status = "disabled"; 547 }; 548 549 hscif0: serial@e6540000 { 550 compatible = "renesas,hscif-r8a77990", 551 "renesas,rcar-gen3-hscif", 552 "renesas,hscif"; 553 reg = <0 0xe6540000 0 0x60>; 554 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 555 clocks = <&cpg CPG_MOD 520>, 556 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 557 <&scif_clk>; 558 clock-names = "fck", "brg_int", "scif_clk"; 559 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 560 <&dmac2 0x31>, <&dmac2 0x30>; 561 dma-names = "tx", "rx", "tx", "rx"; 562 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 563 resets = <&cpg 520>; 564 status = "disabled"; 565 }; 566 567 hscif1: serial@e6550000 { 568 compatible = "renesas,hscif-r8a77990", 569 "renesas,rcar-gen3-hscif", 570 "renesas,hscif"; 571 reg = <0 0xe6550000 0 0x60>; 572 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 573 clocks = <&cpg CPG_MOD 519>, 574 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 575 <&scif_clk>; 576 clock-names = "fck", "brg_int", "scif_clk"; 577 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 578 <&dmac2 0x33>, <&dmac2 0x32>; 579 dma-names = "tx", "rx", "tx", "rx"; 580 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 581 resets = <&cpg 519>; 582 status = "disabled"; 583 }; 584 585 hscif2: serial@e6560000 { 586 compatible = "renesas,hscif-r8a77990", 587 "renesas,rcar-gen3-hscif", 588 "renesas,hscif"; 589 reg = <0 0xe6560000 0 0x60>; 590 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 591 clocks = <&cpg CPG_MOD 518>, 592 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 593 <&scif_clk>; 594 clock-names = "fck", "brg_int", "scif_clk"; 595 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 596 <&dmac2 0x35>, <&dmac2 0x34>; 597 dma-names = "tx", "rx", "tx", "rx"; 598 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 599 resets = <&cpg 518>; 600 status = "disabled"; 601 }; 602 603 hscif3: serial@e66a0000 { 604 compatible = "renesas,hscif-r8a77990", 605 "renesas,rcar-gen3-hscif", 606 "renesas,hscif"; 607 reg = <0 0xe66a0000 0 0x60>; 608 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 609 clocks = <&cpg CPG_MOD 517>, 610 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 611 <&scif_clk>; 612 clock-names = "fck", "brg_int", "scif_clk"; 613 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 614 dma-names = "tx", "rx"; 615 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 616 resets = <&cpg 517>; 617 status = "disabled"; 618 }; 619 620 hscif4: serial@e66b0000 { 621 compatible = "renesas,hscif-r8a77990", 622 "renesas,rcar-gen3-hscif", 623 "renesas,hscif"; 624 reg = <0 0xe66b0000 0 0x60>; 625 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 626 clocks = <&cpg CPG_MOD 516>, 627 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 628 <&scif_clk>; 629 clock-names = "fck", "brg_int", "scif_clk"; 630 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 631 dma-names = "tx", "rx"; 632 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 633 resets = <&cpg 516>; 634 status = "disabled"; 635 }; 636 637 hsusb: usb@e6590000 { 638 compatible = "renesas,usbhs-r8a77990", 639 "renesas,rcar-gen3-usbhs"; 640 reg = <0 0xe6590000 0 0x200>; 641 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 642 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 643 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 644 <&usb_dmac1 0>, <&usb_dmac1 1>; 645 dma-names = "ch0", "ch1", "ch2", "ch3"; 646 renesas,buswait = <11>; 647 phys = <&usb2_phy0 3>; 648 phy-names = "usb"; 649 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 650 resets = <&cpg 704>, <&cpg 703>; 651 status = "disabled"; 652 }; 653 654 usb_dmac0: dma-controller@e65a0000 { 655 compatible = "renesas,r8a77990-usb-dmac", 656 "renesas,usb-dmac"; 657 reg = <0 0xe65a0000 0 0x100>; 658 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 659 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 660 interrupt-names = "ch0", "ch1"; 661 clocks = <&cpg CPG_MOD 330>; 662 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 663 resets = <&cpg 330>; 664 #dma-cells = <1>; 665 dma-channels = <2>; 666 }; 667 668 usb_dmac1: dma-controller@e65b0000 { 669 compatible = "renesas,r8a77990-usb-dmac", 670 "renesas,usb-dmac"; 671 reg = <0 0xe65b0000 0 0x100>; 672 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 673 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 674 interrupt-names = "ch0", "ch1"; 675 clocks = <&cpg CPG_MOD 331>; 676 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 677 resets = <&cpg 331>; 678 #dma-cells = <1>; 679 dma-channels = <2>; 680 }; 681 682 arm_cc630p: crypto@e6601000 { 683 compatible = "arm,cryptocell-630p-ree"; 684 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 685 reg = <0x0 0xe6601000 0 0x1000>; 686 clocks = <&cpg CPG_MOD 229>; 687 resets = <&cpg 229>; 688 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 689 }; 690 691 dmac0: dma-controller@e6700000 { 692 compatible = "renesas,dmac-r8a77990", 693 "renesas,rcar-dmac"; 694 reg = <0 0xe6700000 0 0x10000>; 695 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 696 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 697 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 698 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 699 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 700 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 701 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 702 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 703 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 704 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 705 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 706 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 707 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 708 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 709 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 710 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 711 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 712 interrupt-names = "error", 713 "ch0", "ch1", "ch2", "ch3", 714 "ch4", "ch5", "ch6", "ch7", 715 "ch8", "ch9", "ch10", "ch11", 716 "ch12", "ch13", "ch14", "ch15"; 717 clocks = <&cpg CPG_MOD 219>; 718 clock-names = "fck"; 719 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 720 resets = <&cpg 219>; 721 #dma-cells = <1>; 722 dma-channels = <16>; 723 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 724 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 725 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 726 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 727 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 728 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 729 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 730 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 731 }; 732 733 dmac1: dma-controller@e7300000 { 734 compatible = "renesas,dmac-r8a77990", 735 "renesas,rcar-dmac"; 736 reg = <0 0xe7300000 0 0x10000>; 737 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 738 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 739 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 740 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 741 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 742 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 743 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 744 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 745 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 746 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 747 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 748 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 749 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 750 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 751 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 752 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 753 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 754 interrupt-names = "error", 755 "ch0", "ch1", "ch2", "ch3", 756 "ch4", "ch5", "ch6", "ch7", 757 "ch8", "ch9", "ch10", "ch11", 758 "ch12", "ch13", "ch14", "ch15"; 759 clocks = <&cpg CPG_MOD 218>; 760 clock-names = "fck"; 761 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 762 resets = <&cpg 218>; 763 #dma-cells = <1>; 764 dma-channels = <16>; 765 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 766 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 767 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 768 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 769 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 770 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 771 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 772 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 773 }; 774 775 dmac2: dma-controller@e7310000 { 776 compatible = "renesas,dmac-r8a77990", 777 "renesas,rcar-dmac"; 778 reg = <0 0xe7310000 0 0x10000>; 779 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 780 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 781 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 782 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 783 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 784 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 785 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 786 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 787 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 788 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 789 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 790 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 791 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 792 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 793 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 794 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 795 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 796 interrupt-names = "error", 797 "ch0", "ch1", "ch2", "ch3", 798 "ch4", "ch5", "ch6", "ch7", 799 "ch8", "ch9", "ch10", "ch11", 800 "ch12", "ch13", "ch14", "ch15"; 801 clocks = <&cpg CPG_MOD 217>; 802 clock-names = "fck"; 803 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 804 resets = <&cpg 217>; 805 #dma-cells = <1>; 806 dma-channels = <16>; 807 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 808 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 809 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 810 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 811 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 812 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 813 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 814 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 815 }; 816 817 ipmmu_ds0: iommu@e6740000 { 818 compatible = "renesas,ipmmu-r8a77990"; 819 reg = <0 0xe6740000 0 0x1000>; 820 renesas,ipmmu-main = <&ipmmu_mm 0>; 821 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 822 #iommu-cells = <1>; 823 }; 824 825 ipmmu_ds1: iommu@e7740000 { 826 compatible = "renesas,ipmmu-r8a77990"; 827 reg = <0 0xe7740000 0 0x1000>; 828 renesas,ipmmu-main = <&ipmmu_mm 1>; 829 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 830 #iommu-cells = <1>; 831 }; 832 833 ipmmu_hc: iommu@e6570000 { 834 compatible = "renesas,ipmmu-r8a77990"; 835 reg = <0 0xe6570000 0 0x1000>; 836 renesas,ipmmu-main = <&ipmmu_mm 2>; 837 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 838 #iommu-cells = <1>; 839 }; 840 841 ipmmu_mm: iommu@e67b0000 { 842 compatible = "renesas,ipmmu-r8a77990"; 843 reg = <0 0xe67b0000 0 0x1000>; 844 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 845 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 846 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 847 #iommu-cells = <1>; 848 }; 849 850 ipmmu_mp: iommu@ec670000 { 851 compatible = "renesas,ipmmu-r8a77990"; 852 reg = <0 0xec670000 0 0x1000>; 853 renesas,ipmmu-main = <&ipmmu_mm 4>; 854 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 855 #iommu-cells = <1>; 856 }; 857 858 ipmmu_pv0: iommu@fd800000 { 859 compatible = "renesas,ipmmu-r8a77990"; 860 reg = <0 0xfd800000 0 0x1000>; 861 renesas,ipmmu-main = <&ipmmu_mm 6>; 862 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 863 #iommu-cells = <1>; 864 }; 865 866 ipmmu_rt: iommu@ffc80000 { 867 compatible = "renesas,ipmmu-r8a77990"; 868 reg = <0 0xffc80000 0 0x1000>; 869 renesas,ipmmu-main = <&ipmmu_mm 10>; 870 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 871 #iommu-cells = <1>; 872 }; 873 874 ipmmu_vc0: iommu@fe6b0000 { 875 compatible = "renesas,ipmmu-r8a77990"; 876 reg = <0 0xfe6b0000 0 0x1000>; 877 renesas,ipmmu-main = <&ipmmu_mm 12>; 878 power-domains = <&sysc R8A77990_PD_A3VC>; 879 #iommu-cells = <1>; 880 }; 881 882 ipmmu_vi0: iommu@febd0000 { 883 compatible = "renesas,ipmmu-r8a77990"; 884 reg = <0 0xfebd0000 0 0x1000>; 885 renesas,ipmmu-main = <&ipmmu_mm 14>; 886 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 887 #iommu-cells = <1>; 888 }; 889 890 ipmmu_vp0: iommu@fe990000 { 891 compatible = "renesas,ipmmu-r8a77990"; 892 reg = <0 0xfe990000 0 0x1000>; 893 renesas,ipmmu-main = <&ipmmu_mm 16>; 894 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 895 #iommu-cells = <1>; 896 }; 897 898 avb: ethernet@e6800000 { 899 compatible = "renesas,etheravb-r8a77990", 900 "renesas,etheravb-rcar-gen3"; 901 reg = <0 0xe6800000 0 0x800>; 902 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 903 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 904 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 905 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 906 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 907 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 908 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 909 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 910 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 911 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 912 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 913 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 914 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 915 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 916 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 917 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 918 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 919 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 920 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 921 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 922 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 923 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 924 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 925 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 926 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 927 interrupt-names = "ch0", "ch1", "ch2", "ch3", 928 "ch4", "ch5", "ch6", "ch7", 929 "ch8", "ch9", "ch10", "ch11", 930 "ch12", "ch13", "ch14", "ch15", 931 "ch16", "ch17", "ch18", "ch19", 932 "ch20", "ch21", "ch22", "ch23", 933 "ch24"; 934 clocks = <&cpg CPG_MOD 812>; 935 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 936 resets = <&cpg 812>; 937 phy-mode = "rgmii"; 938 iommus = <&ipmmu_ds0 16>; 939 #address-cells = <1>; 940 #size-cells = <0>; 941 status = "disabled"; 942 }; 943 944 can0: can@e6c30000 { 945 compatible = "renesas,can-r8a77990", 946 "renesas,rcar-gen3-can"; 947 reg = <0 0xe6c30000 0 0x1000>; 948 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 949 clocks = <&cpg CPG_MOD 916>, 950 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 951 <&can_clk>; 952 clock-names = "clkp1", "clkp2", "can_clk"; 953 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 954 assigned-clock-rates = <40000000>; 955 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 956 resets = <&cpg 916>; 957 status = "disabled"; 958 }; 959 960 can1: can@e6c38000 { 961 compatible = "renesas,can-r8a77990", 962 "renesas,rcar-gen3-can"; 963 reg = <0 0xe6c38000 0 0x1000>; 964 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 965 clocks = <&cpg CPG_MOD 915>, 966 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 967 <&can_clk>; 968 clock-names = "clkp1", "clkp2", "can_clk"; 969 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 970 assigned-clock-rates = <40000000>; 971 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 972 resets = <&cpg 915>; 973 status = "disabled"; 974 }; 975 976 canfd: can@e66c0000 { 977 compatible = "renesas,r8a77990-canfd", 978 "renesas,rcar-gen3-canfd"; 979 reg = <0 0xe66c0000 0 0x8000>; 980 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 981 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 982 clocks = <&cpg CPG_MOD 914>, 983 <&cpg CPG_CORE R8A77990_CLK_CANFD>, 984 <&can_clk>; 985 clock-names = "fck", "canfd", "can_clk"; 986 assigned-clocks = <&cpg CPG_CORE R8A77990_CLK_CANFD>; 987 assigned-clock-rates = <40000000>; 988 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 989 resets = <&cpg 914>; 990 status = "disabled"; 991 992 channel0 { 993 status = "disabled"; 994 }; 995 996 channel1 { 997 status = "disabled"; 998 }; 999 }; 1000 1001 pwm0: pwm@e6e30000 { 1002 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1003 reg = <0 0xe6e30000 0 0x8>; 1004 clocks = <&cpg CPG_MOD 523>; 1005 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1006 resets = <&cpg 523>; 1007 #pwm-cells = <2>; 1008 status = "disabled"; 1009 }; 1010 1011 pwm1: pwm@e6e31000 { 1012 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1013 reg = <0 0xe6e31000 0 0x8>; 1014 clocks = <&cpg CPG_MOD 523>; 1015 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1016 resets = <&cpg 523>; 1017 #pwm-cells = <2>; 1018 status = "disabled"; 1019 }; 1020 1021 pwm2: pwm@e6e32000 { 1022 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1023 reg = <0 0xe6e32000 0 0x8>; 1024 clocks = <&cpg CPG_MOD 523>; 1025 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1026 resets = <&cpg 523>; 1027 #pwm-cells = <2>; 1028 status = "disabled"; 1029 }; 1030 1031 pwm3: pwm@e6e33000 { 1032 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1033 reg = <0 0xe6e33000 0 0x8>; 1034 clocks = <&cpg CPG_MOD 523>; 1035 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1036 resets = <&cpg 523>; 1037 #pwm-cells = <2>; 1038 status = "disabled"; 1039 }; 1040 1041 pwm4: pwm@e6e34000 { 1042 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1043 reg = <0 0xe6e34000 0 0x8>; 1044 clocks = <&cpg CPG_MOD 523>; 1045 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1046 resets = <&cpg 523>; 1047 #pwm-cells = <2>; 1048 status = "disabled"; 1049 }; 1050 1051 pwm5: pwm@e6e35000 { 1052 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1053 reg = <0 0xe6e35000 0 0x8>; 1054 clocks = <&cpg CPG_MOD 523>; 1055 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1056 resets = <&cpg 523>; 1057 #pwm-cells = <2>; 1058 status = "disabled"; 1059 }; 1060 1061 pwm6: pwm@e6e36000 { 1062 compatible = "renesas,pwm-r8a77990", "renesas,pwm-rcar"; 1063 reg = <0 0xe6e36000 0 0x8>; 1064 clocks = <&cpg CPG_MOD 523>; 1065 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1066 resets = <&cpg 523>; 1067 #pwm-cells = <2>; 1068 status = "disabled"; 1069 }; 1070 1071 scif0: serial@e6e60000 { 1072 compatible = "renesas,scif-r8a77990", 1073 "renesas,rcar-gen3-scif", "renesas,scif"; 1074 reg = <0 0xe6e60000 0 64>; 1075 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1076 clocks = <&cpg CPG_MOD 207>, 1077 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1078 <&scif_clk>; 1079 clock-names = "fck", "brg_int", "scif_clk"; 1080 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1081 <&dmac2 0x51>, <&dmac2 0x50>; 1082 dma-names = "tx", "rx", "tx", "rx"; 1083 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1084 resets = <&cpg 207>; 1085 status = "disabled"; 1086 }; 1087 1088 scif1: serial@e6e68000 { 1089 compatible = "renesas,scif-r8a77990", 1090 "renesas,rcar-gen3-scif", "renesas,scif"; 1091 reg = <0 0xe6e68000 0 64>; 1092 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1093 clocks = <&cpg CPG_MOD 206>, 1094 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1095 <&scif_clk>; 1096 clock-names = "fck", "brg_int", "scif_clk"; 1097 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1098 <&dmac2 0x53>, <&dmac2 0x52>; 1099 dma-names = "tx", "rx", "tx", "rx"; 1100 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1101 resets = <&cpg 206>; 1102 status = "disabled"; 1103 }; 1104 1105 scif2: serial@e6e88000 { 1106 compatible = "renesas,scif-r8a77990", 1107 "renesas,rcar-gen3-scif", "renesas,scif"; 1108 reg = <0 0xe6e88000 0 64>; 1109 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1110 clocks = <&cpg CPG_MOD 310>, 1111 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1112 <&scif_clk>; 1113 clock-names = "fck", "brg_int", "scif_clk"; 1114 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1115 <&dmac2 0x13>, <&dmac2 0x12>; 1116 dma-names = "tx", "rx", "tx", "rx"; 1117 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1118 resets = <&cpg 310>; 1119 status = "disabled"; 1120 }; 1121 1122 scif3: serial@e6c50000 { 1123 compatible = "renesas,scif-r8a77990", 1124 "renesas,rcar-gen3-scif", "renesas,scif"; 1125 reg = <0 0xe6c50000 0 64>; 1126 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1127 clocks = <&cpg CPG_MOD 204>, 1128 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1129 <&scif_clk>; 1130 clock-names = "fck", "brg_int", "scif_clk"; 1131 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1132 dma-names = "tx", "rx"; 1133 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1134 resets = <&cpg 204>; 1135 status = "disabled"; 1136 }; 1137 1138 scif4: serial@e6c40000 { 1139 compatible = "renesas,scif-r8a77990", 1140 "renesas,rcar-gen3-scif", "renesas,scif"; 1141 reg = <0 0xe6c40000 0 64>; 1142 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1143 clocks = <&cpg CPG_MOD 203>, 1144 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1145 <&scif_clk>; 1146 clock-names = "fck", "brg_int", "scif_clk"; 1147 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1148 dma-names = "tx", "rx"; 1149 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1150 resets = <&cpg 203>; 1151 status = "disabled"; 1152 }; 1153 1154 scif5: serial@e6f30000 { 1155 compatible = "renesas,scif-r8a77990", 1156 "renesas,rcar-gen3-scif", "renesas,scif"; 1157 reg = <0 0xe6f30000 0 64>; 1158 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1159 clocks = <&cpg CPG_MOD 202>, 1160 <&cpg CPG_CORE R8A77990_CLK_S3D1C>, 1161 <&scif_clk>; 1162 clock-names = "fck", "brg_int", "scif_clk"; 1163 dmas = <&dmac0 0x5b>, <&dmac0 0x5a>; 1164 dma-names = "tx", "rx"; 1165 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1166 resets = <&cpg 202>; 1167 status = "disabled"; 1168 }; 1169 1170 msiof0: spi@e6e90000 { 1171 compatible = "renesas,msiof-r8a77990", 1172 "renesas,rcar-gen3-msiof"; 1173 reg = <0 0xe6e90000 0 0x0064>; 1174 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1175 clocks = <&cpg CPG_MOD 211>; 1176 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1177 <&dmac2 0x41>, <&dmac2 0x40>; 1178 dma-names = "tx", "rx", "tx", "rx"; 1179 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1180 resets = <&cpg 211>; 1181 #address-cells = <1>; 1182 #size-cells = <0>; 1183 status = "disabled"; 1184 }; 1185 1186 msiof1: spi@e6ea0000 { 1187 compatible = "renesas,msiof-r8a77990", 1188 "renesas,rcar-gen3-msiof"; 1189 reg = <0 0xe6ea0000 0 0x0064>; 1190 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1191 clocks = <&cpg CPG_MOD 210>; 1192 dmas = <&dmac0 0x43>, <&dmac0 0x42>; 1193 dma-names = "tx", "rx"; 1194 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1195 resets = <&cpg 210>; 1196 #address-cells = <1>; 1197 #size-cells = <0>; 1198 status = "disabled"; 1199 }; 1200 1201 msiof2: spi@e6c00000 { 1202 compatible = "renesas,msiof-r8a77990", 1203 "renesas,rcar-gen3-msiof"; 1204 reg = <0 0xe6c00000 0 0x0064>; 1205 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1206 clocks = <&cpg CPG_MOD 209>; 1207 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1208 dma-names = "tx", "rx"; 1209 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1210 resets = <&cpg 209>; 1211 #address-cells = <1>; 1212 #size-cells = <0>; 1213 status = "disabled"; 1214 }; 1215 1216 msiof3: spi@e6c10000 { 1217 compatible = "renesas,msiof-r8a77990", 1218 "renesas,rcar-gen3-msiof"; 1219 reg = <0 0xe6c10000 0 0x0064>; 1220 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1221 clocks = <&cpg CPG_MOD 208>; 1222 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1223 dma-names = "tx", "rx"; 1224 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1225 resets = <&cpg 208>; 1226 #address-cells = <1>; 1227 #size-cells = <0>; 1228 status = "disabled"; 1229 }; 1230 1231 vin4: video@e6ef4000 { 1232 compatible = "renesas,vin-r8a77990"; 1233 reg = <0 0xe6ef4000 0 0x1000>; 1234 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1235 clocks = <&cpg CPG_MOD 807>; 1236 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1237 resets = <&cpg 807>; 1238 renesas,id = <4>; 1239 status = "disabled"; 1240 1241 ports { 1242 #address-cells = <1>; 1243 #size-cells = <0>; 1244 1245 port@1 { 1246 #address-cells = <1>; 1247 #size-cells = <0>; 1248 1249 reg = <1>; 1250 1251 vin4csi40: endpoint@2 { 1252 reg = <2>; 1253 remote-endpoint= <&csi40vin4>; 1254 }; 1255 }; 1256 }; 1257 }; 1258 1259 vin5: video@e6ef5000 { 1260 compatible = "renesas,vin-r8a77990"; 1261 reg = <0 0xe6ef5000 0 0x1000>; 1262 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1263 clocks = <&cpg CPG_MOD 806>; 1264 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1265 resets = <&cpg 806>; 1266 renesas,id = <5>; 1267 status = "disabled"; 1268 1269 ports { 1270 #address-cells = <1>; 1271 #size-cells = <0>; 1272 1273 port@1 { 1274 #address-cells = <1>; 1275 #size-cells = <0>; 1276 1277 reg = <1>; 1278 1279 vin5csi40: endpoint@2 { 1280 reg = <2>; 1281 remote-endpoint= <&csi40vin5>; 1282 }; 1283 }; 1284 }; 1285 }; 1286 1287 drif00: rif@e6f40000 { 1288 compatible = "renesas,r8a77990-drif", 1289 "renesas,rcar-gen3-drif"; 1290 reg = <0 0xe6f40000 0 0x84>; 1291 interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; 1292 clocks = <&cpg CPG_MOD 515>; 1293 clock-names = "fck"; 1294 dmas = <&dmac1 0x20>, <&dmac2 0x20>; 1295 dma-names = "rx", "rx"; 1296 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1297 resets = <&cpg 515>; 1298 renesas,bonding = <&drif01>; 1299 status = "disabled"; 1300 }; 1301 1302 drif01: rif@e6f50000 { 1303 compatible = "renesas,r8a77990-drif", 1304 "renesas,rcar-gen3-drif"; 1305 reg = <0 0xe6f50000 0 0x84>; 1306 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; 1307 clocks = <&cpg CPG_MOD 514>; 1308 clock-names = "fck"; 1309 dmas = <&dmac1 0x22>, <&dmac2 0x22>; 1310 dma-names = "rx", "rx"; 1311 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1312 resets = <&cpg 514>; 1313 renesas,bonding = <&drif00>; 1314 status = "disabled"; 1315 }; 1316 1317 drif10: rif@e6f60000 { 1318 compatible = "renesas,r8a77990-drif", 1319 "renesas,rcar-gen3-drif"; 1320 reg = <0 0xe6f60000 0 0x84>; 1321 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; 1322 clocks = <&cpg CPG_MOD 513>; 1323 clock-names = "fck"; 1324 dmas = <&dmac1 0x24>, <&dmac2 0x24>; 1325 dma-names = "rx", "rx"; 1326 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1327 resets = <&cpg 513>; 1328 renesas,bonding = <&drif11>; 1329 status = "disabled"; 1330 }; 1331 1332 drif11: rif@e6f70000 { 1333 compatible = "renesas,r8a77990-drif", 1334 "renesas,rcar-gen3-drif"; 1335 reg = <0 0xe6f70000 0 0x84>; 1336 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 1337 clocks = <&cpg CPG_MOD 512>; 1338 clock-names = "fck"; 1339 dmas = <&dmac1 0x26>, <&dmac2 0x26>; 1340 dma-names = "rx", "rx"; 1341 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1342 resets = <&cpg 512>; 1343 renesas,bonding = <&drif10>; 1344 status = "disabled"; 1345 }; 1346 1347 drif20: rif@e6f80000 { 1348 compatible = "renesas,r8a77990-drif", 1349 "renesas,rcar-gen3-drif"; 1350 reg = <0 0xe6f80000 0 0x84>; 1351 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; 1352 clocks = <&cpg CPG_MOD 511>; 1353 clock-names = "fck"; 1354 dmas = <&dmac0 0x28>; 1355 dma-names = "rx"; 1356 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1357 resets = <&cpg 511>; 1358 renesas,bonding = <&drif21>; 1359 status = "disabled"; 1360 }; 1361 1362 drif21: rif@e6f90000 { 1363 compatible = "renesas,r8a77990-drif", 1364 "renesas,rcar-gen3-drif"; 1365 reg = <0 0xe6f90000 0 0x84>; 1366 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; 1367 clocks = <&cpg CPG_MOD 510>; 1368 clock-names = "fck"; 1369 dmas = <&dmac0 0x2a>; 1370 dma-names = "rx"; 1371 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1372 resets = <&cpg 510>; 1373 renesas,bonding = <&drif20>; 1374 status = "disabled"; 1375 }; 1376 1377 drif30: rif@e6fa0000 { 1378 compatible = "renesas,r8a77990-drif", 1379 "renesas,rcar-gen3-drif"; 1380 reg = <0 0xe6fa0000 0 0x84>; 1381 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; 1382 clocks = <&cpg CPG_MOD 509>; 1383 clock-names = "fck"; 1384 dmas = <&dmac0 0x2c>; 1385 dma-names = "rx"; 1386 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1387 resets = <&cpg 509>; 1388 renesas,bonding = <&drif31>; 1389 status = "disabled"; 1390 }; 1391 1392 drif31: rif@e6fb0000 { 1393 compatible = "renesas,r8a77990-drif", 1394 "renesas,rcar-gen3-drif"; 1395 reg = <0 0xe6fb0000 0 0x84>; 1396 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 1397 clocks = <&cpg CPG_MOD 508>; 1398 clock-names = "fck"; 1399 dmas = <&dmac0 0x2e>; 1400 dma-names = "rx"; 1401 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1402 resets = <&cpg 508>; 1403 renesas,bonding = <&drif30>; 1404 status = "disabled"; 1405 }; 1406 1407 rcar_sound: sound@ec500000 { 1408 /* 1409 * #sound-dai-cells is required 1410 * 1411 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1412 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1413 */ 1414 /* 1415 * #clock-cells is required for audio_clkout0/1/2/3 1416 * 1417 * clkout : #clock-cells = <0>; <&rcar_sound>; 1418 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1419 */ 1420 compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3"; 1421 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1422 <0 0xec5a0000 0 0x100>, /* ADG */ 1423 <0 0xec540000 0 0x1000>, /* SSIU */ 1424 <0 0xec541000 0 0x280>, /* SSI */ 1425 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1426 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1427 1428 clocks = <&cpg CPG_MOD 1005>, 1429 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1430 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1431 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1432 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1433 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1434 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1435 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1436 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1437 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1438 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1439 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1440 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1441 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1442 <&audio_clk_a>, <&audio_clk_b>, 1443 <&audio_clk_c>, 1444 <&cpg CPG_CORE R8A77990_CLK_ZA2>; 1445 clock-names = "ssi-all", 1446 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1447 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1448 "ssi.1", "ssi.0", 1449 "src.9", "src.8", "src.7", "src.6", 1450 "src.5", "src.4", "src.3", "src.2", 1451 "src.1", "src.0", 1452 "mix.1", "mix.0", 1453 "ctu.1", "ctu.0", 1454 "dvc.0", "dvc.1", 1455 "clk_a", "clk_b", "clk_c", "clk_i"; 1456 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1457 resets = <&cpg 1005>, 1458 <&cpg 1006>, <&cpg 1007>, 1459 <&cpg 1008>, <&cpg 1009>, 1460 <&cpg 1010>, <&cpg 1011>, 1461 <&cpg 1012>, <&cpg 1013>, 1462 <&cpg 1014>, <&cpg 1015>; 1463 reset-names = "ssi-all", 1464 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1465 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1466 "ssi.1", "ssi.0"; 1467 status = "disabled"; 1468 1469 rcar_sound,ctu { 1470 ctu00: ctu-0 { }; 1471 ctu01: ctu-1 { }; 1472 ctu02: ctu-2 { }; 1473 ctu03: ctu-3 { }; 1474 ctu10: ctu-4 { }; 1475 ctu11: ctu-5 { }; 1476 ctu12: ctu-6 { }; 1477 ctu13: ctu-7 { }; 1478 }; 1479 1480 rcar_sound,dvc { 1481 dvc0: dvc-0 { 1482 dmas = <&audma0 0xbc>; 1483 dma-names = "tx"; 1484 }; 1485 dvc1: dvc-1 { 1486 dmas = <&audma0 0xbe>; 1487 dma-names = "tx"; 1488 }; 1489 }; 1490 1491 rcar_sound,mix { 1492 mix0: mix-0 { }; 1493 mix1: mix-1 { }; 1494 }; 1495 1496 rcar_sound,src { 1497 src0: src-0 { 1498 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1499 dmas = <&audma0 0x85>, <&audma0 0x9a>; 1500 dma-names = "rx", "tx"; 1501 }; 1502 src1: src-1 { 1503 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1504 dmas = <&audma0 0x87>, <&audma0 0x9c>; 1505 dma-names = "rx", "tx"; 1506 }; 1507 src2: src-2 { 1508 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1509 dmas = <&audma0 0x89>, <&audma0 0x9e>; 1510 dma-names = "rx", "tx"; 1511 }; 1512 src3: src-3 { 1513 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1514 dmas = <&audma0 0x8b>, <&audma0 0xa0>; 1515 dma-names = "rx", "tx"; 1516 }; 1517 src4: src-4 { 1518 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1519 dmas = <&audma0 0x8d>, <&audma0 0xb0>; 1520 dma-names = "rx", "tx"; 1521 }; 1522 src5: src-5 { 1523 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1524 dmas = <&audma0 0x8f>, <&audma0 0xb2>; 1525 dma-names = "rx", "tx"; 1526 }; 1527 src6: src-6 { 1528 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1529 dmas = <&audma0 0x91>, <&audma0 0xb4>; 1530 dma-names = "rx", "tx"; 1531 }; 1532 src7: src-7 { 1533 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1534 dmas = <&audma0 0x93>, <&audma0 0xb6>; 1535 dma-names = "rx", "tx"; 1536 }; 1537 src8: src-8 { 1538 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1539 dmas = <&audma0 0x95>, <&audma0 0xb8>; 1540 dma-names = "rx", "tx"; 1541 }; 1542 src9: src-9 { 1543 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1544 dmas = <&audma0 0x97>, <&audma0 0xba>; 1545 dma-names = "rx", "tx"; 1546 }; 1547 }; 1548 1549 rcar_sound,ssi { 1550 ssi0: ssi-0 { 1551 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1552 dmas = <&audma0 0x01>, <&audma0 0x02>, 1553 <&audma0 0x15>, <&audma0 0x16>; 1554 dma-names = "rx", "tx", "rxu", "txu"; 1555 }; 1556 ssi1: ssi-1 { 1557 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1558 dmas = <&audma0 0x03>, <&audma0 0x04>, 1559 <&audma0 0x49>, <&audma0 0x4a>; 1560 dma-names = "rx", "tx", "rxu", "txu"; 1561 }; 1562 ssi2: ssi-2 { 1563 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1564 dmas = <&audma0 0x05>, <&audma0 0x06>, 1565 <&audma0 0x63>, <&audma0 0x64>; 1566 dma-names = "rx", "tx", "rxu", "txu"; 1567 }; 1568 ssi3: ssi-3 { 1569 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1570 dmas = <&audma0 0x07>, <&audma0 0x08>, 1571 <&audma0 0x6f>, <&audma0 0x70>; 1572 dma-names = "rx", "tx", "rxu", "txu"; 1573 }; 1574 ssi4: ssi-4 { 1575 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1576 dmas = <&audma0 0x09>, <&audma0 0x0a>, 1577 <&audma0 0x71>, <&audma0 0x72>; 1578 dma-names = "rx", "tx", "rxu", "txu"; 1579 }; 1580 ssi5: ssi-5 { 1581 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1582 dmas = <&audma0 0x0b>, <&audma0 0x0c>, 1583 <&audma0 0x73>, <&audma0 0x74>; 1584 dma-names = "rx", "tx", "rxu", "txu"; 1585 }; 1586 ssi6: ssi-6 { 1587 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1588 dmas = <&audma0 0x0d>, <&audma0 0x0e>, 1589 <&audma0 0x75>, <&audma0 0x76>; 1590 dma-names = "rx", "tx", "rxu", "txu"; 1591 }; 1592 ssi7: ssi-7 { 1593 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1594 dmas = <&audma0 0x0f>, <&audma0 0x10>, 1595 <&audma0 0x79>, <&audma0 0x7a>; 1596 dma-names = "rx", "tx", "rxu", "txu"; 1597 }; 1598 ssi8: ssi-8 { 1599 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1600 dmas = <&audma0 0x11>, <&audma0 0x12>, 1601 <&audma0 0x7b>, <&audma0 0x7c>; 1602 dma-names = "rx", "tx", "rxu", "txu"; 1603 }; 1604 ssi9: ssi-9 { 1605 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1606 dmas = <&audma0 0x13>, <&audma0 0x14>, 1607 <&audma0 0x7d>, <&audma0 0x7e>; 1608 dma-names = "rx", "tx", "rxu", "txu"; 1609 }; 1610 }; 1611 }; 1612 1613 audma0: dma-controller@ec700000 { 1614 compatible = "renesas,dmac-r8a77990", 1615 "renesas,rcar-dmac"; 1616 reg = <0 0xec700000 0 0x10000>; 1617 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 1618 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 1619 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 1620 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 1621 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 1622 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 1623 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 1624 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 1625 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 1626 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 1627 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 1628 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 1629 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 1630 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 1631 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 1632 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 1633 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 1634 interrupt-names = "error", 1635 "ch0", "ch1", "ch2", "ch3", 1636 "ch4", "ch5", "ch6", "ch7", 1637 "ch8", "ch9", "ch10", "ch11", 1638 "ch12", "ch13", "ch14", "ch15"; 1639 clocks = <&cpg CPG_MOD 502>; 1640 clock-names = "fck"; 1641 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1642 resets = <&cpg 502>; 1643 #dma-cells = <1>; 1644 dma-channels = <16>; 1645 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 1646 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 1647 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 1648 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 1649 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 1650 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 1651 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 1652 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 1653 }; 1654 1655 xhci0: usb@ee000000 { 1656 compatible = "renesas,xhci-r8a77990", 1657 "renesas,rcar-gen3-xhci"; 1658 reg = <0 0xee000000 0 0xc00>; 1659 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1660 clocks = <&cpg CPG_MOD 328>; 1661 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1662 resets = <&cpg 328>; 1663 status = "disabled"; 1664 }; 1665 1666 usb3_peri0: usb@ee020000 { 1667 compatible = "renesas,r8a77990-usb3-peri", 1668 "renesas,rcar-gen3-usb3-peri"; 1669 reg = <0 0xee020000 0 0x400>; 1670 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 1671 clocks = <&cpg CPG_MOD 328>; 1672 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1673 resets = <&cpg 328>; 1674 status = "disabled"; 1675 }; 1676 1677 ohci0: usb@ee080000 { 1678 compatible = "generic-ohci"; 1679 reg = <0 0xee080000 0 0x100>; 1680 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1681 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1682 phys = <&usb2_phy0 1>; 1683 phy-names = "usb"; 1684 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1685 resets = <&cpg 703>, <&cpg 704>; 1686 status = "disabled"; 1687 }; 1688 1689 ehci0: usb@ee080100 { 1690 compatible = "generic-ehci"; 1691 reg = <0 0xee080100 0 0x100>; 1692 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1693 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1694 phys = <&usb2_phy0 2>; 1695 phy-names = "usb"; 1696 companion = <&ohci0>; 1697 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1698 resets = <&cpg 703>, <&cpg 704>; 1699 status = "disabled"; 1700 }; 1701 1702 usb2_phy0: usb-phy@ee080200 { 1703 compatible = "renesas,usb2-phy-r8a77990", 1704 "renesas,rcar-gen3-usb2-phy"; 1705 reg = <0 0xee080200 0 0x700>; 1706 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 1707 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 1708 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1709 resets = <&cpg 703>, <&cpg 704>; 1710 #phy-cells = <1>; 1711 status = "disabled"; 1712 }; 1713 1714 sdhi0: mmc@ee100000 { 1715 compatible = "renesas,sdhi-r8a77990", 1716 "renesas,rcar-gen3-sdhi"; 1717 reg = <0 0xee100000 0 0x2000>; 1718 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 1719 clocks = <&cpg CPG_MOD 314>; 1720 max-frequency = <200000000>; 1721 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1722 resets = <&cpg 314>; 1723 iommus = <&ipmmu_ds1 32>; 1724 status = "disabled"; 1725 }; 1726 1727 sdhi1: mmc@ee120000 { 1728 compatible = "renesas,sdhi-r8a77990", 1729 "renesas,rcar-gen3-sdhi"; 1730 reg = <0 0xee120000 0 0x2000>; 1731 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 1732 clocks = <&cpg CPG_MOD 313>; 1733 max-frequency = <200000000>; 1734 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1735 resets = <&cpg 313>; 1736 iommus = <&ipmmu_ds1 33>; 1737 status = "disabled"; 1738 }; 1739 1740 sdhi3: mmc@ee160000 { 1741 compatible = "renesas,sdhi-r8a77990", 1742 "renesas,rcar-gen3-sdhi"; 1743 reg = <0 0xee160000 0 0x2000>; 1744 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 1745 clocks = <&cpg CPG_MOD 311>; 1746 max-frequency = <200000000>; 1747 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1748 resets = <&cpg 311>; 1749 iommus = <&ipmmu_ds1 35>; 1750 status = "disabled"; 1751 }; 1752 1753 gic: interrupt-controller@f1010000 { 1754 compatible = "arm,gic-400"; 1755 #interrupt-cells = <3>; 1756 #address-cells = <0>; 1757 interrupt-controller; 1758 reg = <0x0 0xf1010000 0 0x1000>, 1759 <0x0 0xf1020000 0 0x20000>, 1760 <0x0 0xf1040000 0 0x20000>, 1761 <0x0 0xf1060000 0 0x20000>; 1762 interrupts = <GIC_PPI 9 1763 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; 1764 clocks = <&cpg CPG_MOD 408>; 1765 clock-names = "clk"; 1766 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1767 resets = <&cpg 408>; 1768 }; 1769 1770 pciec0: pcie@fe000000 { 1771 compatible = "renesas,pcie-r8a77990", 1772 "renesas,pcie-rcar-gen3"; 1773 reg = <0 0xfe000000 0 0x80000>; 1774 #address-cells = <3>; 1775 #size-cells = <2>; 1776 bus-range = <0x00 0xff>; 1777 device_type = "pci"; 1778 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 1779 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 1780 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 1781 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1782 /* Map all possible DDR as inbound ranges */ 1783 dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; 1784 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1785 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1786 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1787 #interrupt-cells = <1>; 1788 interrupt-map-mask = <0 0 0 0>; 1789 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1790 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1791 clock-names = "pcie", "pcie_bus"; 1792 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1793 resets = <&cpg 319>; 1794 status = "disabled"; 1795 }; 1796 1797 vspb0: vsp@fe960000 { 1798 compatible = "renesas,vsp2"; 1799 reg = <0 0xfe960000 0 0x8000>; 1800 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 1801 clocks = <&cpg CPG_MOD 626>; 1802 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1803 resets = <&cpg 626>; 1804 renesas,fcp = <&fcpvb0>; 1805 }; 1806 1807 fcpvb0: fcp@fe96f000 { 1808 compatible = "renesas,fcpv"; 1809 reg = <0 0xfe96f000 0 0x200>; 1810 clocks = <&cpg CPG_MOD 607>; 1811 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1812 resets = <&cpg 607>; 1813 iommus = <&ipmmu_vp0 5>; 1814 }; 1815 1816 vspi0: vsp@fe9a0000 { 1817 compatible = "renesas,vsp2"; 1818 reg = <0 0xfe9a0000 0 0x8000>; 1819 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 1820 clocks = <&cpg CPG_MOD 631>; 1821 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1822 resets = <&cpg 631>; 1823 renesas,fcp = <&fcpvi0>; 1824 }; 1825 1826 fcpvi0: fcp@fe9af000 { 1827 compatible = "renesas,fcpv"; 1828 reg = <0 0xfe9af000 0 0x200>; 1829 clocks = <&cpg CPG_MOD 611>; 1830 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1831 resets = <&cpg 611>; 1832 iommus = <&ipmmu_vp0 8>; 1833 }; 1834 1835 vspd0: vsp@fea20000 { 1836 compatible = "renesas,vsp2"; 1837 reg = <0 0xfea20000 0 0x7000>; 1838 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 1839 clocks = <&cpg CPG_MOD 623>; 1840 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1841 resets = <&cpg 623>; 1842 renesas,fcp = <&fcpvd0>; 1843 }; 1844 1845 fcpvd0: fcp@fea27000 { 1846 compatible = "renesas,fcpv"; 1847 reg = <0 0xfea27000 0 0x200>; 1848 clocks = <&cpg CPG_MOD 603>; 1849 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1850 resets = <&cpg 603>; 1851 iommus = <&ipmmu_vi0 8>; 1852 }; 1853 1854 vspd1: vsp@fea28000 { 1855 compatible = "renesas,vsp2"; 1856 reg = <0 0xfea28000 0 0x7000>; 1857 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 1858 clocks = <&cpg CPG_MOD 622>; 1859 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1860 resets = <&cpg 622>; 1861 renesas,fcp = <&fcpvd1>; 1862 }; 1863 1864 fcpvd1: fcp@fea2f000 { 1865 compatible = "renesas,fcpv"; 1866 reg = <0 0xfea2f000 0 0x200>; 1867 clocks = <&cpg CPG_MOD 602>; 1868 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1869 resets = <&cpg 602>; 1870 iommus = <&ipmmu_vi0 9>; 1871 }; 1872 1873 cmm0: cmm@fea40000 { 1874 compatible = "renesas,r8a77990-cmm", 1875 "renesas,rcar-gen3-cmm"; 1876 reg = <0 0xfea40000 0 0x1000>; 1877 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1878 clocks = <&cpg CPG_MOD 711>; 1879 resets = <&cpg 711>; 1880 }; 1881 1882 cmm1: cmm@fea50000 { 1883 compatible = "renesas,r8a77990-cmm", 1884 "renesas,rcar-gen3-cmm"; 1885 reg = <0 0xfea50000 0 0x1000>; 1886 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1887 clocks = <&cpg CPG_MOD 710>; 1888 resets = <&cpg 710>; 1889 }; 1890 1891 csi40: csi2@feaa0000 { 1892 compatible = "renesas,r8a77990-csi2"; 1893 reg = <0 0xfeaa0000 0 0x10000>; 1894 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 1895 clocks = <&cpg CPG_MOD 716>; 1896 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1897 resets = <&cpg 716>; 1898 status = "disabled"; 1899 1900 ports { 1901 #address-cells = <1>; 1902 #size-cells = <0>; 1903 1904 port@1 { 1905 #address-cells = <1>; 1906 #size-cells = <0>; 1907 1908 reg = <1>; 1909 1910 csi40vin4: endpoint@0 { 1911 reg = <0>; 1912 remote-endpoint = <&vin4csi40>; 1913 }; 1914 csi40vin5: endpoint@1 { 1915 reg = <1>; 1916 remote-endpoint = <&vin5csi40>; 1917 }; 1918 }; 1919 }; 1920 }; 1921 1922 du: display@feb00000 { 1923 compatible = "renesas,du-r8a77990"; 1924 reg = <0 0xfeb00000 0 0x40000>; 1925 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 1926 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; 1927 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; 1928 clock-names = "du.0", "du.1"; 1929 resets = <&cpg 724>; 1930 reset-names = "du.0"; 1931 1932 renesas,cmms = <&cmm0>, <&cmm1>; 1933 renesas,vsps = <&vspd0 0>, <&vspd1 0>; 1934 1935 status = "disabled"; 1936 1937 ports { 1938 #address-cells = <1>; 1939 #size-cells = <0>; 1940 1941 port@0 { 1942 reg = <0>; 1943 du_out_rgb: endpoint { 1944 }; 1945 }; 1946 1947 port@1 { 1948 reg = <1>; 1949 du_out_lvds0: endpoint { 1950 remote-endpoint = <&lvds0_in>; 1951 }; 1952 }; 1953 1954 port@2 { 1955 reg = <2>; 1956 du_out_lvds1: endpoint { 1957 remote-endpoint = <&lvds1_in>; 1958 }; 1959 }; 1960 }; 1961 }; 1962 1963 lvds0: lvds-encoder@feb90000 { 1964 compatible = "renesas,r8a77990-lvds"; 1965 reg = <0 0xfeb90000 0 0x20>; 1966 clocks = <&cpg CPG_MOD 727>; 1967 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1968 resets = <&cpg 727>; 1969 status = "disabled"; 1970 1971 renesas,companion = <&lvds1>; 1972 1973 ports { 1974 #address-cells = <1>; 1975 #size-cells = <0>; 1976 1977 port@0 { 1978 reg = <0>; 1979 lvds0_in: endpoint { 1980 remote-endpoint = <&du_out_lvds0>; 1981 }; 1982 }; 1983 1984 port@1 { 1985 reg = <1>; 1986 lvds0_out: endpoint { 1987 }; 1988 }; 1989 }; 1990 }; 1991 1992 lvds1: lvds-encoder@feb90100 { 1993 compatible = "renesas,r8a77990-lvds"; 1994 reg = <0 0xfeb90100 0 0x20>; 1995 clocks = <&cpg CPG_MOD 727>; 1996 power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; 1997 resets = <&cpg 726>; 1998 status = "disabled"; 1999 2000 ports { 2001 #address-cells = <1>; 2002 #size-cells = <0>; 2003 2004 port@0 { 2005 reg = <0>; 2006 lvds1_in: endpoint { 2007 remote-endpoint = <&du_out_lvds1>; 2008 }; 2009 }; 2010 2011 port@1 { 2012 reg = <1>; 2013 lvds1_out: endpoint { 2014 }; 2015 }; 2016 }; 2017 }; 2018 2019 prr: chipid@fff00044 { 2020 compatible = "renesas,prr"; 2021 reg = <0 0xfff00044 0 4>; 2022 }; 2023 }; 2024 2025 thermal-zones { 2026 cpu-thermal { 2027 polling-delay-passive = <250>; 2028 polling-delay = <0>; 2029 thermal-sensors = <&thermal>; 2030 sustainable-power = <717>; 2031 2032 cooling-maps { 2033 map0 { 2034 trip = <&target>; 2035 cooling-device = <&a53_0 0 2>; 2036 contribution = <1024>; 2037 }; 2038 }; 2039 2040 trips { 2041 sensor1_crit: sensor1-crit { 2042 temperature = <120000>; 2043 hysteresis = <2000>; 2044 type = "critical"; 2045 }; 2046 2047 target: trip-point1 { 2048 temperature = <100000>; 2049 hysteresis = <2000>; 2050 type = "passive"; 2051 }; 2052 }; 2053 }; 2054 }; 2055 2056 timer { 2057 compatible = "arm,armv8-timer"; 2058 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2059 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2060 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, 2061 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; 2062 }; 2063}; 2064