1/* 2 * Copyright (c) 2013-2020, Huawei Technologies Co., Ltd. All rights reserved. 3 * Copyright (c) 2020-2022 Huawei Device Co., Ltd. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without modification, 6 * are permitted provided that the following conditions are met: 7 * 8 * 1. Redistributions of source code must retain the above copyright notice, this list of 9 * conditions and the following disclaimer. 10 * 11 * 2. Redistributions in binary form must reproduce the above copyright notice, this list 12 * of conditions and the following disclaimer in the documentation and/or other materials 13 * provided with the distribution. 14 * 15 * 3. Neither the name of the copyright holder nor the names of its contributors may be used 16 * to endorse or promote products derived from this software without specific prior written 17 * permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 20 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR 23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 29 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32#ifndef _LOS_EXC_S 33#define _LOS_EXC_S 34#include "soc_common.h" 35 36.macro PUSH_CALLER_REG 37 addi sp, sp, -(32 * REGBYTES) 38 SREG t6, 2 * REGBYTES(sp) 39 SREG t5, 3 * REGBYTES(sp) 40 SREG t4, 4 * REGBYTES(sp) 41 SREG t3, 5 * REGBYTES(sp) 42 SREG t2, 6 * REGBYTES(sp) 43 SREG t1, 7 * REGBYTES(sp) 44 SREG t0, 8 * REGBYTES(sp) 45 SREG a7, 18 * REGBYTES(sp) 46 SREG a6, 19 * REGBYTES(sp) 47 SREG a5, 20 * REGBYTES(sp) 48 SREG a4, 21 * REGBYTES(sp) 49 SREG a3, 22 * REGBYTES(sp) 50 SREG a2, 23 * REGBYTES(sp) 51 SREG a1, 24 * REGBYTES(sp) 52 SREG a0, 25 * REGBYTES(sp) 53 SREG ra, 31 * REGBYTES(sp) 54 csrr t0, mstatus 55 SREG t0, 16 * REGBYTES(sp) 56 csrr t0, mepc 57 SREG t0, 17 * REGBYTES(sp) 58.endm 59 60.macro POP_CALLER_REG 61 LREG t0, 16 * REGBYTES(sp) 62 csrw mstatus, t0 63 LREG t0, 17 * REGBYTES(sp) 64 csrw mepc, t0 65 LREG t6, 2 * REGBYTES(sp) 66 LREG t5, 3 * REGBYTES(sp) 67 LREG t4, 4 * REGBYTES(sp) 68 LREG t3, 5 * REGBYTES(sp) 69 LREG t2, 6 * REGBYTES(sp) 70 LREG t1, 7 * REGBYTES(sp) 71 LREG t0, 8 * REGBYTES(sp) 72 LREG a7, 18 * REGBYTES(sp) 73 LREG a6, 19 * REGBYTES(sp) 74 LREG a5, 20 * REGBYTES(sp) 75 LREG a4, 21 * REGBYTES(sp) 76 LREG a3, 22 * REGBYTES(sp) 77 LREG a2, 23 * REGBYTES(sp) 78 LREG a1, 24 * REGBYTES(sp) 79 LREG a0, 25 * REGBYTES(sp) 80 LREG ra, 31 * REGBYTES(sp) 81 addi sp, sp, 32 * REGBYTES 82.endm 83 84.macro PUSH_CALLEE_REG 85 SREG s11, 9 * REGBYTES(sp) 86 SREG s10, 10 * REGBYTES(sp) 87 SREG s9, 11 * REGBYTES(sp) 88 SREG s8, 12 * REGBYTES(sp) 89 SREG s7, 13 * REGBYTES(sp) 90 SREG s6, 14 * REGBYTES(sp) 91 SREG s5, 15 * REGBYTES(sp) 92 SREG s4, 26 * REGBYTES(sp) 93 SREG s3, 27 * REGBYTES(sp) 94 SREG s2, 28 * REGBYTES(sp) 95 SREG s1, 29 * REGBYTES(sp) 96 SREG s0, 30 * REGBYTES(sp) 97.endm 98 99.macro POP_ALL_REG 100 LREG t6, 2 * REGBYTES(sp) 101 LREG t5, 3 * REGBYTES(sp) 102 LREG t4, 4 * REGBYTES(sp) 103 LREG t3, 5 * REGBYTES(sp) 104 LREG t2, 6 * REGBYTES(sp) 105 LREG t1, 7 * REGBYTES(sp) 106 LREG t0, 8 * REGBYTES(sp) 107 LREG s11, 9 * REGBYTES(sp) 108 LREG s10, 10 * REGBYTES(sp) 109 LREG s9, 11 * REGBYTES(sp) 110 LREG s8, 12 * REGBYTES(sp) 111 LREG s7, 13 * REGBYTES(sp) 112 LREG s6, 14 * REGBYTES(sp) 113 LREG s5, 15 * REGBYTES(sp) 114 LREG a7, 18 * REGBYTES(sp) 115 LREG a6, 19 * REGBYTES(sp) 116 LREG a5, 20 * REGBYTES(sp) 117 LREG a4, 21 * REGBYTES(sp) 118 LREG a3, 22 * REGBYTES(sp) 119 LREG a2, 23 * REGBYTES(sp) 120 LREG a1, 24 * REGBYTES(sp) 121 LREG a0, 25 * REGBYTES(sp) 122 LREG s4, 26 * REGBYTES(sp) 123 LREG s3, 27 * REGBYTES(sp) 124 LREG s2, 28 * REGBYTES(sp) 125 LREG s1, 29 * REGBYTES(sp) 126 LREG s0, 30 * REGBYTES(sp) 127 LREG ra, 31 * REGBYTES(sp) 128 addi sp, sp, 32 * REGBYTES 129.endm 130 131.section .interrupt.text 132.extern HalExcEntry 133.extern g_excInfo 134.global HalTrapEntry 135.align 4 136HalTrapEntry: 137 PUSH_CALLEE_REG 138 addi sp, sp, -(4 * REGBYTES) 139 sw a0, 0 * REGBYTES(sp) 140 csrr t0, mtval 141 sw t0, 1 * REGBYTES(sp) 142 sw zero, 2 * REGBYTES(sp) 143 sw gp, 3 * REGBYTES(sp) 144 mv a0, sp 145 csrw mscratch, sp 146 la t0, g_excInfo 147 lh t1, 0(t0) 148 bnez t1, 1f 149 la sp, __except_stack_top 1501: 151 addi t1, t1, 0x1 152 sh t1, 0(t0) 153 call HalExcEntry 154 la t0, g_excInfo 155 sh zero, 0(t0) 156 csrr sp, mscratch 157 addi sp, sp, 4 * REGBYTES 158 lw t0, 16 * REGBYTES(sp) 159 csrw mstatus, t0 160 lw t0, 17 * REGBYTES(sp) 161 csrw mepc, t0 162 POP_ALL_REG 163 mret 164 165 166.section .interrupt.HalTrapVector.text 167.extern HalTrapEntry 168.extern HalIrqEndCheckNeedSched 169.global HalTrapVector 170.equ TRAP_INTERRUPT_MODE_MASK, 0x80000000 171.align 4 172HalTrapVector: 173 PUSH_CALLER_REG 174 csrr a0, mcause 175 li a1, TRAP_INTERRUPT_MODE_MASK 176 li a2, MCAUSE_INT_ID_MASK 177 and a1, a0, a1 178 and a0, a2, a0 179 beqz a1, HalTrapEntry 180 csrw mscratch, sp 181 la sp, __start_and_irq_stack_top 182 jal HalHwiInterruptDone 183 csrr sp, mscratch 184 call HalIrqEndCheckNeedSched 185 186 POP_CALLER_REG 187 mret 188#endif /* _LOS_TRAP_S */ 189