1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3 *
4 * Copyright (c) 2013-2014 Kevin Lo
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28
29 #include <sys/cdefs.h>
30 __FBSDID("$FreeBSD$");
31
32 /*
33 * ASIX Electronics AX88178A/AX88179 USB 2.0/3.0 gigabit ethernet driver.
34 */
35
36 #include <lwip/netif.h>
37 #include <lwip/dhcp.h>
38 #include <lwip/netifapi.h>
39 #include <lwip/inet.h>
40
41 #include "implementation/global_implementation.h"
42 #include "usb_ethernet.h"
43 #include "if_axgereg.h"
44
45 static void axge_rx_frame(struct usb_ether *ue, struct usb_page_cache *pc, int actlen);
46 static void axge_miibus_statchg(struct axge_softc *sc, uint8_t link_status);
47
48 #define IFF_DRV_OACTIVE IFF_MASTER
49 #define IFF_SIMPLEX IFF_SLAVE
50
51 #undef USB_DEBUG_VAR
52 #define USB_DEBUG_VAR axge_debug
53 #ifdef LOSCFG_USB_DEBUG
54 static int axge_debug = 0;
55 void
usb_axge_debug_func(int level)56 usb_axge_debug_func(int level)
57 {
58 axge_debug = level;
59 PRINTK("The level of usb axge debug is %d\n", level);
60 }
61 DEBUG_MODULE(axge, usb_axge_debug_func);
62 #endif
63
64 /*
65 * Various supported device vendors/products.
66 */
67 static const STRUCT_USB_HOST_ID axge_devs[] = {
68 { USB_VPI(0x0B95, 0x178A, AXE_FLAG_178A) },
69 };
70
71 static device_probe_t axge_probe;
72 static device_attach_t axge_attach;
73 static device_detach_t axge_detach;
74
75 static usb_callback_t axge_bulk_read_callback;
76 static usb_callback_t axge_bulk_write_callback;
77
78 static uether_fn_t axge_attach_post;
79 static uether_fn_t axge_init;
80 static uether_fn_t axge_stop;
81 static uether_fn_t axge_start;
82 static uether_fn_t axge_setmulti;
83 static uether_fn_t axge_setpromisc;
84 static uether_fn_t axge_tick;
85
86 static const struct usb_config axge_config[AXGE_N_TRANSFER] = {
87 { /* [AXGE_BULK_DT_WR] = */
88 .type = UE_BULK,
89 .endpoint = UE_ADDR_ANY,
90 .direction = UE_DIR_OUT,
91 .frames = 16,
92 .bufsize = 16 * MCLBYTES,
93 .flags = {.pipe_bof = 1,.force_short_xfer = 1,},
94 .callback = axge_bulk_write_callback,
95 .timeout = 10000, /* 10 seconds */
96 },
97 { /* [AXGE_BULK_DT_RD] = */
98 .type = UE_BULK,
99 .endpoint = UE_ADDR_ANY,
100 .direction = UE_DIR_IN,
101 .bufsize = 16 * MCLBYTES, /* bytes */
102 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,},
103 .callback = axge_bulk_read_callback,
104 .timeout = 0, /* no timeout */
105 },
106 };
107
108 static const struct {
109 uint8_t ctrl;
110 uint8_t timer_l;
111 uint8_t timer_h;
112 uint8_t size;
113 uint8_t ifg;
114 }__packed axge_bulk_size[] = {
115 { 7, 0x4f, 0x00, 0x12, 0xff },
116 { 7, 0x20, 0x03, 0x16, 0xff },
117 { 7, 0xae, 0x07, 0x18, 0xff },
118 { 7, 0xcc, 0x4c, 0x18, 0x08 }
119 };
120
121 static device_method_t axge_methods[] = {
122 /* Device interface */
123 DEVMETHOD(device_probe, axge_probe),
124 DEVMETHOD(device_attach, axge_attach),
125 DEVMETHOD(device_detach, axge_detach),
126 DEVMETHOD_END
127 };
128
129 static driver_t axge_driver = {
130 .name = "USB_AXGE",
131 .methods = axge_methods,
132 .size = sizeof(struct axge_softc),
133 };
134
135 static devclass_t axge_devclass;
136 DRIVER_MODULE(axge, uhub, axge_driver, axge_devclass, 0, 0);
137
138 static const struct usb_ether_methods axge_ue_methods = {
139 .ue_attach_post = axge_attach_post,
140 .ue_start = axge_start,
141 .ue_init = axge_init,
142 .ue_stop = axge_stop,
143 .ue_setmulti = axge_setmulti,
144 .ue_setpromisc = axge_setpromisc,
145 .ue_tick = axge_tick,
146 };
147
148 static void
axge_write_mem(struct axge_softc * sc,uint8_t cmd,uint16_t index,uint16_t val,void * buf,unsigned int len)149 axge_write_mem(struct axge_softc *sc, uint8_t cmd, uint16_t index,
150 uint16_t val, void *buf, unsigned int len)
151 {
152 struct usb_device_request req;
153
154 req.bmRequestType = UT_WRITE_VENDOR_DEVICE;
155 req.bRequest = cmd;
156 USETW(req.wValue, val);
157 USETW(req.wIndex, index);
158 USETW(req.wLength, len);
159
160 if (uether_do_request(&sc->sc_ue, &req, buf, 1000)) {
161 /* Error ignored. */
162 }
163 }
164
165 static void
axge_write_cmd_1(struct axge_softc * sc,uint8_t cmd,uint16_t reg,uint8_t val)166 axge_write_cmd_1(struct axge_softc *sc, uint8_t cmd, uint16_t reg, uint8_t val)
167 {
168 axge_write_mem(sc, cmd, 1, reg, &val, 1);
169 }
170
171 static void
axge_write_cmd_2(struct axge_softc * sc,uint8_t cmd,uint16_t index,uint16_t reg,uint16_t val)172 axge_write_cmd_2(struct axge_softc *sc, uint8_t cmd, uint16_t index,
173 uint16_t reg, uint16_t val)
174 {
175 uint8_t temp[2];
176
177 USETW(temp, val);
178 axge_write_mem(sc, cmd, index, reg, &temp, 2);
179 }
180
181
182 static int
axge_read_mem(struct axge_softc * sc,uint8_t cmd,uint16_t index,uint16_t val,void * buf,int len)183 axge_read_mem(struct axge_softc *sc, uint8_t cmd, uint16_t index,
184 uint16_t val, void *buf, int len)
185 {
186 struct usb_device_request req;
187
188 AXGE_LOCK_ASSERT(sc, MA_OWNED);
189
190 req.bmRequestType = UT_READ_VENDOR_DEVICE;
191 req.bRequest = cmd;
192 USETW(req.wValue, val);
193 USETW(req.wIndex, index);
194 USETW(req.wLength, len);
195
196 return (uether_do_request(&sc->sc_ue, &req, buf, 1000));
197 }
198
199 static uint8_t
axge_read_cmd_1(struct axge_softc * sc,uint8_t cmd,uint16_t reg)200 axge_read_cmd_1(struct axge_softc *sc, uint8_t cmd, uint16_t reg)
201 {
202 uint8_t val;
203
204 (void)axge_read_mem(sc, cmd, 1, reg, &val, 1);
205 return (val);
206 }
207
208 static uint16_t
axge_read_cmd_2(struct axge_softc * sc,uint8_t cmd,uint16_t index,uint16_t reg)209 axge_read_cmd_2(struct axge_softc *sc, uint8_t cmd, uint16_t index, uint16_t reg)
210 {
211 uint8_t val[2];
212
213 (void)axge_read_mem(sc, cmd, index, reg, &val, 2);
214 return (UGETW(val));
215 }
216
217 static void
axge_chip_init(struct axge_softc * sc)218 axge_chip_init(struct axge_softc *sc)
219 {
220 /* Power up ethernet PHY. */
221 axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_EPPRCR, 0);
222 axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_EPPRCR, EPPRCR_IPRL);
223 (void)uether_pause(&sc->sc_ue, hz / 4);
224 axge_write_cmd_1(sc, AXGE_ACCESS_MAC, AXGE_CLK_SELECT,
225 AXGE_CLK_SELECT_ACS | AXGE_CLK_SELECT_BCS);
226 (void)uether_pause(&sc->sc_ue, hz / 10);
227 }
228
229 static void
axge_csum_cfg(struct usb_ether * ue)230 axge_csum_cfg(struct usb_ether *ue)
231 {
232 struct axge_softc *sc = ue->ue_sc;
233 uint8_t csum;
234
235 csum = 0;
236 csum |= CTCR_IP | CTCR_TCP | CTCR_UDP;
237 axge_write_cmd_1(sc, AXGE_ACCESS_MAC, AXGE_CTCR, csum);
238
239 csum = 0;
240 csum |= CRCR_IP | CRCR_TCP | CRCR_UDP;
241 axge_write_cmd_1(sc, AXGE_ACCESS_MAC, AXGE_CRCR, csum);
242 }
243
244 static void
axge_setmulti(struct usb_ether * ue)245 axge_setmulti(struct usb_ether *ue)
246 {
247 struct axge_softc *sc = ue->ue_sc;
248 struct los_eth_driver *ifp = ue->ue_drv_sc;
249 uint16_t rxmode;
250
251 rxmode = axge_read_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RCR);
252 if (ifp->ac_if.flags & (IFF_ALLMULTI | IFF_PROMISC)) {
253 rxmode |= RCR_AMALL;
254 axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RCR, rxmode);
255 return;
256 }
257
258 rxmode &= ~RCR_AMALL;
259 axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RCR, rxmode);
260 }
261
262 static void
axge_setpromisc(struct usb_ether * ue)263 axge_setpromisc(struct usb_ether *ue)
264 {
265 struct axge_softc *sc = uether_getsc(ue);
266 struct los_eth_driver *ifp = ue->ue_drv_sc;
267 uint16_t rxmode;
268
269 rxmode = axge_read_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RCR);
270
271 if (ifp->ac_if.flags & IFF_PROMISC)
272 rxmode |= RCR_PRO;
273 else
274 rxmode &= ~RCR_PRO;
275
276 axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RCR, rxmode);
277 axge_setmulti(ue);
278 }
279
280 static void
axge_tick(struct usb_ether * ue)281 axge_tick(struct usb_ether *ue)
282 {
283 struct axge_softc *sc = uether_getsc(ue);
284 uint8_t link_status;
285
286 AXGE_LOCK_ASSERT(sc, MA_OWNED);
287
288 link_status = axge_read_cmd_1(sc, AXGE_ACCESS_MAC, AXGE_PLSR);
289
290 if (sc->sc_link_status != (link_status & AXGE_LINK_MASK)) {
291 axge_miibus_statchg(sc, link_status);
292 sc->sc_link_status = link_status & AXGE_LINK_MASK;
293 }
294 }
295
296 static void
axge_reset(struct axge_softc * sc)297 axge_reset(struct axge_softc *sc)
298 {
299 struct usb_config_descriptor *cd;
300 usb_error_t err;
301
302 cd = usbd_get_config_descriptor(sc->sc_ue.ue_udev);
303
304 err = usbd_req_set_config(sc->sc_ue.ue_udev, &sc->sc_mtx,
305 cd->bConfigurationValue);
306 if (err)
307 DPRINTF("reset failed (ignored)\n");
308
309 /* Wait a little while for the chip to get its brains in order. */
310 (void)uether_pause(&sc->sc_ue, hz / 100);
311
312 axge_chip_init(sc);
313 }
314
315 static void
axge_attach_post(struct usb_ether * ue)316 axge_attach_post(struct usb_ether *ue)
317 {
318 struct axge_softc *sc = uether_getsc(ue);
319
320 /* Initialize controller and get station address. */
321 axge_chip_init(sc);
322 (void)axge_read_mem(sc, AXGE_ACCESS_MAC, NETIF_MAX_HWADDR_LEN, AXGE_NIDR,
323 ue->ue_eaddr, NETIF_MAX_HWADDR_LEN);
324 }
325 /*
326 * Probe for a AX88172 chip.
327 */
328 static int
axge_probe(device_t dev)329 axge_probe(device_t dev)
330 {
331 struct usb_attach_arg *uaa = device_get_ivars(dev);
332
333 if (uaa->usb_mode != USB_MODE_HOST)
334 return (ENXIO);
335 if (uaa->info.bConfigIndex != AXGE_CONFIG_IDX)
336 return (ENXIO);
337 if (uaa->info.bIfaceIndex != AXGE_IFACE_IDX)
338 return (ENXIO);
339
340 return (usbd_lookup_id_by_uaa(axge_devs, sizeof(axge_devs), uaa));
341 }
342
343 /*
344 * Attach the interface. Allocate softc structures, do ifmedia
345 * setup and ethernet/BPF attach.
346 */
347 static int
axge_attach(device_t dev)348 axge_attach(device_t dev)
349 {
350 struct usb_attach_arg *uaa = device_get_ivars(dev);
351 struct axge_softc *sc = device_get_softc(dev);
352 struct usb_ether *ue = &sc->sc_ue;
353 uint8_t iface_index;
354 int error;
355 sc->sc_flags = USB_GET_DRIVER_INFO(uaa);
356 sc->sc_link_status = AXGE_LINK_MASK;
357
358 device_set_usb_desc(dev);
359 mtx_init(&sc->sc_mtx, device_get_nameunit(dev), NULL, MTX_RECURSE);
360
361 iface_index = AXGE_IFACE_IDX;
362 error = usbd_transfer_setup(uaa->device, &iface_index, sc->sc_xfer,
363 axge_config, AXGE_N_TRANSFER, sc, &sc->sc_mtx);
364 if (error) {
365 device_printf(dev, "allocating USB transfers failed\n");
366 goto detach;
367 }
368 ue->ue_sc = sc;
369 ue->ue_dev = dev;
370 ue->ue_udev = uaa->device;
371 ue->ue_mtx = &sc->sc_mtx;
372 ue->ue_methods = &axge_ue_methods;
373 error = uether_ifattach(ue);
374 if (error) {
375 device_printf(dev, "could not attach interface\n");
376 goto detach;
377 }
378 return (0); /* success */
379
380 detach:
381 (void) axge_detach(dev);
382 return (ENXIO); /* failure */
383 }
384
385 static int
axge_detach(device_t dev)386 axge_detach(device_t dev)
387 {
388 struct axge_softc *sc = device_get_softc(dev);
389 struct usb_ether *ue = &sc->sc_ue;
390
391 usbd_transfer_unsetup(sc->sc_xfer, AXGE_N_TRANSFER);
392 uether_ifdetach(ue);
393 mtx_destroy(&sc->sc_mtx);
394
395 return (0);
396 }
397
398 static void
axge_miibus_statchg(struct axge_softc * sc,uint8_t link_status)399 axge_miibus_statchg(struct axge_softc *sc, uint8_t link_status)
400 {
401 struct usb_ether *ue = &sc->sc_ue;
402 struct los_eth_driver *ifp = ue->ue_drv_sc;
403 uint8_t tmp[5];
404 uint16_t val = 0;
405
406 if (link_status & AXGE_LINK_MASK) {
407 val = MSR_RE;
408 if (link_status & IFM_1000_T) {
409 val |= MSR_GM | MSR_EN_125MHZ;
410 if (link_status & PLSR_USB_SS)
411 (void)memcpy_s(tmp, sizeof(tmp), &axge_bulk_size[0], sizeof(axge_bulk_size[0]));
412 else if (link_status & PLSR_USB_HS)
413 (void)memcpy_s(tmp, sizeof(tmp), &axge_bulk_size[1], sizeof(axge_bulk_size[1]));
414 else
415 (void)memcpy_s(tmp, sizeof(tmp), &axge_bulk_size[3], sizeof(axge_bulk_size[3]));
416 }
417 else if (link_status & IFM_100_TX) {
418 val |= MSR_PS;
419 if (link_status & (PLSR_USB_SS | PLSR_USB_HS))
420 (void)memcpy_s(tmp, sizeof(tmp), &axge_bulk_size[2], sizeof(axge_bulk_size[2]));
421 else
422 (void)memcpy_s(tmp, sizeof(tmp), &axge_bulk_size[3], sizeof(axge_bulk_size[3]));
423 }
424 else if (link_status & IFM_10_T) {
425 (void)memcpy_s(tmp, sizeof(tmp), &axge_bulk_size[3], sizeof(axge_bulk_size[3]));
426 }
427 else {
428 PRINT_WARN("%s, link_status:%x\n", __FUNCTION__, link_status);
429 return;
430 }
431
432 /* Rx bulk configuration. */
433 axge_write_mem(sc, AXGE_ACCESS_MAC, 5, AXGE_RX_BULKIN_QCTRL, tmp, 5);
434 axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_MSR, val);
435
436 ifp->ac_if.flags |= NETIF_FLAG_LINK_UP;
437
438 (void)netifapi_netif_set_up(&ifp->ac_if);
439 PRINTK("AX88178A Link Up\n");
440 }
441 else {
442 ifp->ac_if.flags &= ~NETIF_FLAG_LINK_UP;
443 PRINTK("AX88178A Link Down\n");
444 }
445 }
446
447 static void
axge_bulk_read_callback(struct usb_xfer * xfer,usb_error_t error)448 axge_bulk_read_callback(struct usb_xfer *xfer, usb_error_t error)
449 {
450 struct axge_softc *sc = usbd_xfer_softc(xfer);
451 struct usb_ether *ue = &sc->sc_ue;
452 struct usb_page_cache *pc;
453 int actlen;
454
455 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL);
456 switch (USB_GET_STATE(xfer)) {
457 case USB_ST_TRANSFERRED:
458 pc = usbd_xfer_get_frame(xfer, 0);
459 axge_rx_frame(ue, pc, actlen);
460 /* FALLTHROUGH */
461 case USB_ST_SETUP:
462 tr_setup:
463 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer));
464 usbd_transfer_submit(xfer);
465 uether_rxflush(ue);
466 return;
467
468 default: /* Error */
469 DPRINTF("bulk read error, %s\n", usbd_errstr(error));
470
471 if (error != USB_ERR_CANCELLED) {
472 /* try to clear stall first */
473 usbd_xfer_set_stall(xfer);
474 goto tr_setup;
475 }
476 return;
477 }
478 }
479
480 static int
axge_rxeof(struct usb_ether * ue,struct usb_page_cache * pc,unsigned int offset,unsigned int len,uint32_t pkt_hdr)481 axge_rxeof(struct usb_ether *ue, struct usb_page_cache *pc, unsigned int offset,
482 unsigned int len, uint32_t pkt_hdr)
483 {
484 struct los_eth_driver *ifp = ue->ue_drv_sc;
485 struct pbuf *m = pbuf_alloc(PBUF_RAW, len+ETH_PAD_SIZE, PBUF_RAM);
486 struct pbuf *p;
487
488 if (len < ETHER_HDR_LEN) {
489 (void)pbuf_free(m);
490 return (EINVAL);
491 }
492
493 #if ETH_PAD_SIZE
494 /* drop the padding word */
495 if (pbuf_header(m, -ETH_PAD_SIZE)) {
496 PRINTK("[AXE_ERROR]axe_rxeof : pbuf_header drop failed\n");
497 (void)pbuf_free(m);
498 return (EINVAL);
499 }
500 #endif
501
502 for (p = m; p != NULL; p = p->next)
503 usbd_copy_out(pc, offset, p->payload, p->len);
504
505 #if ETH_PAD_SIZE
506 /* reclaim the padding word */
507 if (pbuf_header(m, ETH_PAD_SIZE)) {
508 PRINTK("[AXE_ERROR]axe_rxeof : pbuf_header drop failed\n");
509 (void)pbuf_free(m);
510 return (EINVAL);
511 }
512 #endif
513
514 driverif_input(&ifp->ac_if, m);
515 return (0);
516 }
517
518 static void
axge_rx_frame(struct usb_ether * ue,struct usb_page_cache * pc,int actlen)519 axge_rx_frame(struct usb_ether *ue, struct usb_page_cache *pc, int actlen)
520 {
521 uint32_t pos;
522 uint32_t pkt_cnt;
523 uint32_t rxhdr;
524 uint32_t pkt_hdr;
525 uint32_t hdr_off;
526 uint32_t pktlen;
527
528 /* verify we have enough data */
529 if (actlen < (int)sizeof(rxhdr))
530 return;
531
532 pos = 0;
533
534 usbd_copy_out(pc, actlen - sizeof(rxhdr), &rxhdr, sizeof(rxhdr));
535 rxhdr = le32toh(rxhdr);
536
537 pkt_cnt = (uint16_t)rxhdr;
538 hdr_off = (uint16_t)(rxhdr >> 16);
539
540 while (pkt_cnt--) {
541 /* verify the header offset */
542 if ((int)(hdr_off + sizeof(pkt_hdr)) > actlen) {
543 DPRINTF("End of packet headers\n");
544 break;
545 }
546 if ((int)pos >= actlen) {
547 DPRINTF("Data position reached end\n");
548 break;
549 }
550 usbd_copy_out(pc, hdr_off, &pkt_hdr, sizeof(pkt_hdr));
551
552 pkt_hdr = le32toh(pkt_hdr);
553 pktlen = (pkt_hdr >> 16) & 0x1fff;
554 if (pkt_hdr & (AXGE_RXHDR_CRC_ERR | AXGE_RXHDR_DROP_ERR)) {
555 DPRINTF("Dropped a packet\n");
556 }
557 if (pktlen >= 6 && (int)(pos + pktlen) <= actlen) {
558 (void)axge_rxeof(ue, pc, pos, pktlen, pkt_hdr);
559 } else {
560 DPRINTF("Invalid packet pos=%d len=%d\n",
561 (int)pos, (int)pktlen);
562 }
563 pos += (pktlen + 7) & ~7;
564 hdr_off += sizeof(pkt_hdr);
565 }
566 }
567
568 static void
axge_bulk_write_callback(struct usb_xfer * xfer,usb_error_t error)569 axge_bulk_write_callback(struct usb_xfer *xfer, usb_error_t error)
570 {
571 struct axge_softc *sc = usbd_xfer_softc(xfer);
572 struct usb_ether *ue = &(sc->sc_ue);
573 struct los_eth_driver *ifp = ue->ue_drv_sc;
574 struct eth_drv_sc *drv_sc = (struct eth_drv_sc *)ifp->driver_context;
575 struct usb_page_cache *pc;
576 uint16_t txlen;
577 uint32_t nframes, pos;
578 struct pbuf *p;
579 uint8_t ustat;
580 uint32_t txhdr;
581
582 ustat = USB_GET_STATE(xfer);
583 tr_setup:
584 switch (ustat) {
585 case USB_ST_TRANSFERRED:
586 drv_sc->state &= ~IFF_DRV_OACTIVE;
587 /* FALLTHROUGH */
588
589 case USB_ST_SETUP:
590 if (drv_sc->state & IFF_DRV_OACTIVE)
591 return;
592
593 UE_LOCK(ue);
594 IF_DEQUEUE(&(ue->ue_txq), p);
595 UE_UNLOCK(ue);
596
597 nframes = 0;
598 while (p) {
599 txlen = p->len;
600 if (txlen <= 0)
601 break;
602
603 usbd_xfer_set_frame_offset(xfer, nframes * MCLBYTES, nframes);
604 pos = 0;
605 pc = usbd_xfer_get_frame(xfer, nframes);
606
607 txhdr = htole32(txlen);
608 usbd_copy_in(pc, 0, &txhdr, sizeof(txhdr));
609 txhdr = 0;
610 txhdr = htole32(txhdr);
611 usbd_copy_in(pc, 4, &txhdr, sizeof(txhdr));
612 pos += 8;
613 usbd_copy_in(pc, pos, p->payload, txlen);
614 pos += txlen;
615 if ((pos % usbd_xfer_max_framelen(xfer)) == 0)
616 txhdr |= 0x80008000;
617
618 /* Set frame length. */
619 usbd_xfer_set_frame_len(xfer, nframes, pos);
620
621 uether_freebuf(p);
622 nframes++;
623 if (nframes >= 16)
624 break;
625
626 UE_LOCK(ue);
627 IF_DEQUEUE(&(ue->ue_txq), p);
628 UE_UNLOCK(ue);
629 }
630 if (nframes != 0) {
631 usbd_xfer_set_frames(xfer, nframes);
632 usbd_transfer_submit(xfer);
633 drv_sc->state |= IFF_DRV_OACTIVE;
634 }
635 break;
636
637 default: /* Error */
638 drv_sc->state &= ~IFF_DRV_OACTIVE;
639 if (error != USB_ERR_CANCELLED) {
640 /* try to clear stall first */
641 usbd_xfer_set_stall(xfer);
642 ustat = USB_ST_SETUP;
643 goto tr_setup;
644 }
645 break;
646 }
647 }
648
649 static void
axge_start(struct usb_ether * ue)650 axge_start(struct usb_ether *ue)
651 {
652 struct axge_softc *sc = ue->ue_sc;
653
654 /*
655 * start the USB transfers, if not already started:
656 */
657 usbd_transfer_start(sc->sc_xfer[AXGE_BULK_DT_WR]);
658 usbd_transfer_start(sc->sc_xfer[AXGE_BULK_DT_RD]);
659 }
660
661 static void
axge_init(struct usb_ether * ue)662 axge_init(struct usb_ether *ue)
663 {
664 struct axge_softc *sc = uether_getsc(ue);
665 struct los_eth_driver *ifp = ue->ue_drv_sc;
666 struct eth_drv_sc *drv_sc = (struct eth_drv_sc *)ifp->driver_context;
667 uint16_t rxmode;
668
669 drv_sc->state = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
670
671 AXGE_LOCK_ASSERT(sc, MA_OWNED);
672 if ((drv_sc->state & IFF_DRV_RUNNING) != 0)
673 return;
674
675 /* Cancel pending I/O */
676 axge_stop(ue);
677 axge_reset(sc);
678
679 /* Set MAC address. */
680 ifp->ac_if.hwaddr_len = NETIF_MAX_HWADDR_LEN;
681 (void)axge_read_mem(sc, AXGE_ACCESS_MAC, 6, AXGE_NIDR, ifp ->ac_if.hwaddr, 6);
682
683 axge_write_cmd_1(sc, AXGE_ACCESS_MAC, AXGE_PWLLR, 0x34);
684 axge_write_cmd_1(sc, AXGE_ACCESS_MAC, AXGE_PWLHR, 0x52);
685
686 ifp->ac_if.flags |= NETIF_FLAG_UP | NETIF_FLAG_BROADCAST | NETIF_FLAG_ETHARP | NETIF_FLAG_ETHERNET;
687
688 /* Configure TX/RX checksum offloading. */
689 axge_csum_cfg(ue);
690
691 /* Configure RX settings. */
692 rxmode = (RCR_AM | RCR_SO | RCR_DROP_CRCE);
693
694 /* If we want promiscuous mode, set the allframes bit. */
695 if (ifp->ac_if.flags & IFF_PROMISC)
696 rxmode |= RCR_PRO;
697
698 if (ifp->ac_if.flags & IFF_BROADCAST)
699 rxmode |= RCR_AB;
700
701 axge_write_cmd_2(sc, AXGE_ACCESS_MAC, 2, AXGE_RCR, rxmode);
702
703 axge_write_cmd_1(sc, AXGE_ACCESS_MAC, AXGE_MMSR,
704 MMSR_PME_TYPE | MMSR_PME_POL | MMSR_RWMP);
705
706 /* Load the multicast filter. */
707 axge_setmulti(ue);
708
709 drv_sc->state |= IFF_DRV_RUNNING;
710 }
711
712 static void
axge_stop(struct usb_ether * ue)713 axge_stop(struct usb_ether *ue)
714 {
715 struct axge_softc *sc = uether_getsc(ue);
716 struct los_eth_driver *ifp = ue->ue_drv_sc;
717 struct eth_drv_sc *drv_sc = (struct eth_drv_sc *)ifp->driver_context;
718
719 AXGE_LOCK_ASSERT(sc, MA_OWNED);
720 drv_sc->state &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
721 sc->sc_flags &= ~AXE_FLAG_LINK;
722 /*
723 * stop all the transfers, if not already stopped:
724 */
725 usbd_transfer_stop(sc->sc_xfer[AXGE_BULK_DT_WR]);
726 usbd_transfer_stop(sc->sc_xfer[AXGE_BULK_DT_RD]);
727 }
728
729 #undef USB_DEBUG_VAR
730