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1 /*
2  * Copyright © 2021 Google, Inc.
3  * SPDX-License-Identifier: MIT
4  */
5 
6 #ifndef TU_PERFETTO_H_
7 #define TU_PERFETTO_H_
8 
9 #ifdef __cplusplus
10 extern "C" {
11 #endif
12 
13 #ifdef HAVE_PERFETTO
14 
15 /**
16  * Render-stage id's
17  */
18 enum tu_stage_id {
19    SURFACE_STAGE_ID, /* Surface is a sort of meta-stage for render-target info */
20    BINNING_STAGE_ID,
21    GMEM_STAGE_ID,
22    BYPASS_STAGE_ID,
23    BLIT_STAGE_ID,
24    COMPUTE_STAGE_ID,
25    CLEAR_SYSMEM_STAGE_ID,
26    CLEAR_GMEM_STAGE_ID,
27    GMEM_LOAD_STAGE_ID,
28    GMEM_STORE_STAGE_ID,
29    SYSMEM_RESOLVE_STAGE_ID,
30    // TODO add the rest
31 
32    NUM_STAGES
33 };
34 
35 static const struct {
36    const char *name;
37    const char *desc;
38 } stages[] = {
39    [SURFACE_STAGE_ID] = {"Surface"},
40    [BINNING_STAGE_ID] = {"Binning", "Perform Visibility pass and determine target bins"},
41    [GMEM_STAGE_ID]    = {"Render", "Rendering to GMEM"},
42    [BYPASS_STAGE_ID]  = {"Render", "Rendering to system memory"},
43    [BLIT_STAGE_ID]    = {"Blit", "Performing a Blit operation"},
44    [COMPUTE_STAGE_ID] = {"Compute", "Compute job"},
45    [CLEAR_SYSMEM_STAGE_ID] = {"Clear Sysmem", ""},
46    [CLEAR_GMEM_STAGE_ID] = {"Clear GMEM", "Per-tile (GMEM) clear"},
47    [GMEM_LOAD_STAGE_ID] = {"GMEM Load", "Per tile system memory to GMEM load"},
48    [GMEM_STORE_STAGE_ID] = {"GMEM Store", "Per tile GMEM to system memory store"},
49    [SYSMEM_RESOLVE_STAGE_ID] = {"SysMem Resolve", "System memory MSAA resolve"},
50    // TODO add the rest
51 };
52 
53 /**
54  * Queue-id's
55  */
56 enum {
57    DEFAULT_HW_QUEUE_ID,
58 };
59 
60 static const struct {
61    const char *name;
62    const char *desc;
63 } queues[] = {
64    [DEFAULT_HW_QUEUE_ID] = {"GPU Queue 0", "Default Adreno Hardware Queue"},
65 };
66 
67 struct tu_perfetto_state {
68    uint64_t start_ts[NUM_STAGES];
69 };
70 
71 void tu_perfetto_init(void);
72 
73 struct tu_device;
74 void tu_perfetto_submit(struct tu_device *dev, uint32_t submission_id);
75 
76 /* Helpers */
77 
78 struct tu_perfetto_state *
79 tu_device_get_perfetto_state(struct tu_device *dev);
80 
81 int
82 tu_device_get_gpu_timestamp(struct tu_device *dev,
83                             uint64_t *ts);
84 
85 int
86 tu_device_get_suspend_count(struct tu_device *dev,
87                             uint64_t *suspend_count);
88 
89 uint64_t
90 tu_device_ticks_to_ns(struct tu_device *dev, uint64_t ts);
91 
92 struct tu_u_trace_submission_data;
93 uint32_t
94 tu_u_trace_submission_data_get_submit_id(const struct tu_u_trace_submission_data *data);
95 
96 #endif
97 
98 #ifdef __cplusplus
99 }
100 #endif
101 
102 #endif /* TU_PERFETTO_H_ */
103