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1 /*
2  * Copyright (C) 2021 Collabora, Ltd.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21  * SOFTWARE.
22  */
23 
24 #include "va_compiler.h"
25 #include "bi_test.h"
26 #include "bi_builder.h"
27 #include "util/u_cpu_detect.h"
28 
29 #include <gtest/gtest.h>
30 
31 static inline void
add_imm(bi_context * ctx)32 add_imm(bi_context *ctx)
33 {
34    bi_foreach_instr_global(ctx, I) {
35       va_fuse_add_imm(I);
36    }
37 }
38 
39 #define CASE(instr, expected) INSTRUCTION_CASE(instr, expected, add_imm)
40 #define NEGCASE(instr) CASE(instr, instr)
41 
42 class AddImm : public testing::Test {
43 protected:
AddImm()44    AddImm() {
45       mem_ctx = ralloc_context(NULL);
46 
47       /* For bi_imm_f16 */
48       util_cpu_detect();
49    }
50 
~AddImm()51    ~AddImm() {
52       ralloc_free(mem_ctx);
53    }
54 
55    void *mem_ctx;
56 };
57 
58 
TEST_F(AddImm,Basic)59 TEST_F(AddImm, Basic) {
60    CASE(bi_mov_i32_to(b, bi_register(63), bi_imm_u32(0xABAD1DEA)),
61         bi_iadd_imm_i32_to(b, bi_register(63), bi_zero(), 0xABAD1DEA));
62 
63    CASE(bi_fadd_f32_to(b, bi_register(1), bi_register(2), bi_imm_f32(42.0)),
64         bi_fadd_imm_f32_to(b, bi_register(1), bi_register(2), fui(42.0)));
65 
66    CASE(bi_fadd_f32_to(b, bi_register(1), bi_discard(bi_register(2)), bi_imm_f32(42.0)),
67         bi_fadd_imm_f32_to(b, bi_register(1), bi_discard(bi_register(2)), fui(42.0)));
68 
69    CASE(bi_fadd_f32_to(b, bi_register(1), bi_discard(bi_register(2)), bi_neg(bi_imm_f32(42.0))),
70         bi_fadd_imm_f32_to(b, bi_register(1), bi_discard(bi_register(2)), fui(-42.0)));
71 }
72 
TEST_F(AddImm,Commutativty)73 TEST_F(AddImm, Commutativty) {
74    CASE(bi_fadd_f32_to(b, bi_register(1), bi_imm_f32(42.0), bi_register(2)),
75         bi_fadd_imm_f32_to(b, bi_register(1), bi_register(2), fui(42.0)));
76 }
77 
TEST_F(AddImm,NoModifiers)78 TEST_F(AddImm, NoModifiers) {
79    NEGCASE(bi_fadd_f32_to(b, bi_register(1), bi_abs(bi_register(2)), bi_imm_f32(42.0)));
80    NEGCASE(bi_fadd_f32_to(b, bi_register(1), bi_neg(bi_register(2)), bi_imm_f32(42.0)));
81    NEGCASE(bi_fadd_f32_to(b, bi_register(1), bi_swz_16(bi_register(2), false, false), bi_imm_f32(42.0)));
82 }
83 
TEST_F(AddImm,NoClamp)84 TEST_F(AddImm, NoClamp) {
85    NEGCASE({
86       bi_instr *I = bi_fadd_f32_to(b, bi_register(1), bi_register(2),
87             bi_imm_f32(42.0));
88       I->clamp = BI_CLAMP_CLAMP_M1_1;
89    });
90 }
91 
TEST_F(AddImm,OtherTypes)92 TEST_F(AddImm, OtherTypes) {
93    CASE(bi_fadd_v2f16_to(b, bi_register(1), bi_register(2), bi_imm_f16(42.0)),
94         bi_fadd_imm_v2f16_to(b, bi_register(1), bi_register(2), 0x51405140));
95 
96    CASE(bi_iadd_u32_to(b, bi_register(1), bi_register(2), bi_imm_u32(0xDEADBEEF), false),
97         bi_iadd_imm_i32_to(b, bi_register(1), bi_register(2), 0xDEADBEEF));
98 
99    CASE(bi_iadd_v2u16_to(b, bi_register(1), bi_register(2), bi_imm_u32(0xDEADBEEF), false),
100         bi_iadd_imm_v2i16_to(b, bi_register(1), bi_register(2), 0xDEADBEEF));
101 
102    CASE(bi_iadd_v4u8_to(b, bi_register(1), bi_register(2), bi_imm_u32(0xDEADBEEF), false),
103         bi_iadd_imm_v4i8_to(b, bi_register(1), bi_register(2), 0xDEADBEEF));
104 
105    CASE(bi_iadd_s32_to(b, bi_register(1), bi_register(2), bi_imm_u32(0xDEADBEEF), false),
106         bi_iadd_imm_i32_to(b, bi_register(1), bi_register(2), 0xDEADBEEF));
107 
108    CASE(bi_iadd_v2s16_to(b, bi_register(1), bi_register(2), bi_imm_u32(0xDEADBEEF), false),
109         bi_iadd_imm_v2i16_to(b, bi_register(1), bi_register(2), 0xDEADBEEF));
110 
111    CASE(bi_iadd_v4s8_to(b, bi_register(1), bi_register(2), bi_imm_u32(0xDEADBEEF), false),
112         bi_iadd_imm_v4i8_to(b, bi_register(1), bi_register(2), 0xDEADBEEF));
113 
114    NEGCASE(bi_iadd_u32_to(b, bi_register(1), bi_swz_16(bi_register(2), false, false), bi_imm_u32(0xDEADBEEF), false));
115    NEGCASE(bi_iadd_v2u16_to(b, bi_register(1), bi_swz_16(bi_register(2), false, false), bi_imm_u32(0xDEADBEEF), false));
116    NEGCASE(bi_iadd_u32_to(b, bi_register(1), bi_register(2), bi_imm_u32(0xDEADBEEF), true));
117    NEGCASE(bi_iadd_s32_to(b, bi_register(1), bi_swz_16(bi_register(2), false, false), bi_imm_u32(0xDEADBEEF), false));
118    NEGCASE(bi_iadd_v2s16_to(b, bi_register(1), bi_swz_16(bi_register(2), false, false), bi_imm_u32(0xDEADBEEF), false));
119 
120    NEGCASE(bi_iadd_s32_to(b, bi_register(1), bi_register(2), bi_imm_u32(0xDEADBEEF), true));
121 }
122 
TEST_F(AddImm,Int8)123 TEST_F(AddImm, Int8) {
124    bi_index idx = bi_register(2);
125    idx.swizzle = BI_SWIZZLE_B0000;
126    NEGCASE(bi_iadd_v4u8_to(b, bi_register(1), idx, bi_imm_u32(0xDEADBEEF), false));
127    NEGCASE(bi_iadd_v4s8_to(b, bi_register(1), idx, bi_imm_u32(0xDEADBEEF), false));
128 }
129 
TEST_F(AddImm,OnlyRTE)130 TEST_F(AddImm, OnlyRTE) {
131    NEGCASE({
132          bi_instr *I = bi_fadd_f32_to(b, bi_register(1), bi_register(2), bi_imm_f32(42.0));
133          I->round = BI_ROUND_RTP;
134    });
135 
136    NEGCASE({
137          bi_instr *I = bi_fadd_v2f16_to(b, bi_register(1), bi_register(2), bi_imm_f16(42.0));
138          I->round = BI_ROUND_RTZ;
139    });
140 }
141 
142