1 /****************************************************************************** 2 * 3 * Copyright (C) 2009-2012 Broadcom Corporation 4 * 5 * Licensed under the Apache License, Version 2.0 (the "License"); 6 * you may not use this file except in compliance with the License. 7 * You may obtain a copy of the License at: 8 * 9 * http://www.apache.org/licenses/LICENSE-2.0 10 * 11 * Unless required by applicable law or agreed to in writing, software 12 * distributed under the License is distributed on an "AS IS" BASIS, 13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 14 * See the License for the specific language governing permissions and 15 * limitations under the License. 16 * 17 ******************************************************************************/ 18 19 /****************************************************************************** 20 * 21 * Filename: bt_vendor_brcm.h 22 * 23 * Description: A wrapper header file of bt_vendor_lib.h 24 * 25 * Contains definitions specific for interfacing with Broadcom 26 * Bluetooth chipsets 27 * 28 ******************************************************************************/ 29 30 #ifndef BT_VENDOR_BRCM_H 31 #define BT_VENDOR_BRCM_H 32 33 #include "bt_vendor_lib.h" 34 35 /****************************************************************************** 36 ** Constants & Macros 37 ******************************************************************************/ 38 39 #ifndef FALSE 40 #define FALSE 0 41 #endif 42 43 #ifndef TRUE 44 #define TRUE (!FALSE) 45 #endif 46 47 #ifndef VENDOR_LIB_RUNTIME_TUNING_ENABLED 48 #define VENDOR_LIB_RUNTIME_TUNING_ENABLED FALSE 49 #endif 50 51 /* Run-time configuration file */ 52 #ifndef VENDOR_LIB_CONF_FILE 53 #define VENDOR_LIB_CONF_FILE "/vendor/etc/bluetooth/bt_vendor.conf" 54 #endif 55 56 /* Device port name where Bluetooth controller attached */ 57 #ifndef BLUETOOTH_UART_DEVICE_PORT 58 #define BLUETOOTH_UART_DEVICE_PORT "/dev/ttyS8" /* maguro */ 59 #endif 60 61 /* Location of firmware patch files */ 62 #ifndef FW_PATCHFILE_LOCATION 63 #define FW_PATCHFILE_LOCATION "/vendor/etc/firmware/" /* maguro */ 64 #endif 65 66 #ifndef UART_TARGET_BAUD_RATE 67 #define UART_TARGET_BAUD_RATE 3000000 68 #endif 69 70 /* The millisecond delay pauses on HCI transport after firmware patches 71 * were downloaded. This gives some time for firmware to restart with 72 * patches before host attempts to send down any HCI commands. 73 * 74 * Note: It has been discovered that BCM43241B0 needs at least 200ms 75 * settlement delay in here. Without the delay, a Hardware Error event 76 * from BCM43241B0 had been seen in HCI upstream path right after the 77 * host sent the HCI_VSC_SET_BDADDR commad to the controller at higher 78 * baud. 79 */ 80 #ifndef FW_PATCH_SETTLEMENT_DELAY_MS 81 #define FW_PATCH_SETTLEMENT_DELAY_MS 0 82 #endif 83 84 #ifndef USERIAL_VENDOR_SET_BAUD_DELAY_US 85 #define USERIAL_VENDOR_SET_BAUD_DELAY_US 0 86 #endif 87 88 #ifndef FW_AUTO_DETECTION 89 #define FW_AUTO_DETECTION FALSE 90 #endif 91 92 /* The Bluetooth Device Address source switch: 93 * 94 * -FALSE- (default value) 95 * Get the factory BDADDR from device's file system. Normally the BDADDR is 96 * stored in the location pointed by the PROPERTY_BT_BDADDR_PATH (defined in 97 * btif_common.h file) property. 98 * 99 * -TRUE- 100 * If the Bluetooth Controller has equipped with a non-volatile memory (such 101 * as BCM4330's OTP memory), the factory BDADDR can be stored in there and 102 * retrieved by the stack while enabling BT. 103 * !!! WARNING !!! Make sure that the OTP feature has been enabled in the 104 * firmware patchram (.hcd) file. 105 */ 106 #ifndef USE_CONTROLLER_BDADDR 107 #define USE_CONTROLLER_BDADDR FALSE 108 #endif 109 110 /* sleep mode 111 112 0: disable 113 1: UART with Host wake/BT wake out of band signals 114 */ 115 #ifndef LPM_SLEEP_MODE 116 #define LPM_SLEEP_MODE 0 117 #endif 118 119 /* Host Stack Idle Threshold in 300ms or 25ms 120 In sleep mode 1, this is the number of firmware loops executed with no 121 action before the Host wake line is deasserted. action includes HCI 122 traffic excluding certain sleep mode commands and the presence of SCO 123 connections if the "Allow Host Sleep During SCO" flag is not set to 1. 124 Each count of this parameter is roughly equivalent to 300ms or 25ms. 125 */ 126 #ifndef LPM_IDLE_THRESHOLD 127 #define LPM_IDLE_THRESHOLD 1 128 #endif 129 130 /* Host Controller Idle Threshold in 300ms or 25ms 131 132 This is the number of firmware loops executed with no action before the 133 HC is considered idle. Depending on the mode, HC may then attempt to sleep. 134 Action includes HCI traffic excluding certain sleep mode commands and 135 the presence of ACL/SCO connections. 136 */ 137 #ifndef LPM_HC_IDLE_THRESHOLD 138 #define LPM_HC_IDLE_THRESHOLD 1 139 #endif 140 141 /* BT_WAKE Polarity - 0=Active Low, 1= Active High */ 142 #ifndef LPM_BT_WAKE_POLARITY 143 #define LPM_BT_WAKE_POLARITY 1 /* maguro */ 144 #endif 145 146 /* HOST_WAKE Polarity - 0=Active Low, 1= Active High */ 147 #ifndef LPM_HOST_WAKE_POLARITY 148 #define LPM_HOST_WAKE_POLARITY 1 /* maguro */ 149 #endif 150 151 /* LPM_ALLOW_HOST_SLEEP_DURING_SCO 152 153 When this flag is set to 0, the host is not allowed to sleep while 154 an SCO is active. In sleep mode 1, the device will keep the host 155 wake line asserted while an SCO is active. 156 When this flag is set to 1, the host can sleep while an SCO is active. 157 This flag should only be set to 1 if SCO traffic is directed to the PCM 158 interface. 159 */ 160 #ifndef LPM_ALLOW_HOST_SLEEP_DURING_SCO 161 #define LPM_ALLOW_HOST_SLEEP_DURING_SCO 1 162 #endif 163 164 /* LPM_COMBINE_SLEEP_MODE_AND_LPM 165 166 In Mode 0, always set byte 7 to 0. In sleep mode 1, device always 167 requires permission to sleep between scans / periodic inquiries regardless 168 of the setting of this byte. In sleep mode 1, if byte is set, device must 169 have "permission" to sleep during the low power modes of sniff, hold, and 170 park. If byte is not set, device can sleep without permission during these 171 modes. Permission to sleep in Mode 1 is obtained if the BT_WAKE signal is 172 not asserted. 173 */ 174 #ifndef LPM_COMBINE_SLEEP_MODE_AND_LPM 175 #define LPM_COMBINE_SLEEP_MODE_AND_LPM 1 176 #endif 177 178 /* LPM_ENABLE_UART_TXD_TRI_STATE 179 180 When set to 0, the device will not tristate its UART TX line before going 181 to sleep. 182 When set to 1, the device will tristate its UART TX line before going to 183 sleep. 184 */ 185 #ifndef LPM_ENABLE_UART_TXD_TRI_STATE 186 #define LPM_ENABLE_UART_TXD_TRI_STATE 0 187 #endif 188 189 /* LPM_PULSED_HOST_WAKE 190 */ 191 #ifndef LPM_PULSED_HOST_WAKE 192 #define LPM_PULSED_HOST_WAKE 0 193 #endif 194 195 /* LPM_IDLE_TIMEOUT_MULTIPLE 196 197 The multiple factor of host stack idle threshold in 300ms/25ms 198 */ 199 #ifndef LPM_IDLE_TIMEOUT_MULTIPLE 200 #define LPM_IDLE_TIMEOUT_MULTIPLE 10 201 #endif 202 203 /* BT_WAKE_VIA_USERIAL_IOCTL 204 205 Use userial ioctl function to control BT_WAKE signal 206 */ 207 #ifndef BT_WAKE_VIA_USERIAL_IOCTL 208 #define BT_WAKE_VIA_USERIAL_IOCTL FALSE 209 #endif 210 211 /* BT_WAKE_USERIAL_LDISC 212 213 Use line discipline if the BT_WAKE control is in line discipline 214 */ 215 #ifndef BT_WAKE_USERIAL_LDISC 216 #define BT_WAKE_USERIAL_LDISC FALSE 217 #endif 218 219 /* BT_WAKE_VIA_PROC 220 221 LPM & BT_WAKE control through PROC nodes 222 */ 223 #ifndef BT_WAKE_VIA_PROC 224 #define BT_WAKE_VIA_PROC FALSE 225 #endif 226 227 #ifndef BT_WAKE_VIA_PROC_NOTIFY_DEASSERT 228 #define BT_WAKE_VIA_PROC_NOTIFY_DEASSERT FALSE 229 #endif 230 231 /* N_BRCM_HCI 232 233 UART ioctl line discipline 234 */ 235 #ifndef N_BRCM_HCI 236 #define N_BRCM_HCI 25 237 #endif 238 239 /* SCO_CFG_INCLUDED 240 241 Do SCO configuration by default. If the firmware patch had been embedded 242 with desired SCO configuration, set this FALSE to bypass configuration 243 from host software. 244 */ 245 #ifndef SCO_CFG_INCLUDED 246 #define SCO_CFG_INCLUDED TRUE 247 #endif 248 249 #ifndef SCO_USE_I2S_INTERFACE 250 #define SCO_USE_I2S_INTERFACE FALSE 251 #endif 252 253 #define SCO_I2SPCM_PARAM_IF_MODE 0 254 #define SCO_I2SPCM_PARAM_IF_ROLE 1 255 #define SCO_I2SPCM_PARAM_IF_SAMPLE_RATE 2 256 #define SCO_I2SPCM_PARAM_IF_CLOCK_RATE 3 257 #define SCO_I2SPCM_PARAM_SIZE 4 258 259 /* SCO_WBS_SAMPLE_RATE 260 0 : 8K 261 1 : 16K 262 2 : 4K 263 This macro is used for setting WBS sampling rate for a SCO connection 264 If the mobile network supports WBS, we need to use 16KHz as default 265 but if the platform doesn't support 16KHz, the sample rate can be 266 overriden to 8KHz by setting this to 0. 267 */ 268 #ifndef SCO_WBS_SAMPLE_RATE 269 #define SCO_WBS_SAMPLE_RATE 1 270 #endif 271 272 /* SCO_I2SPCM_IF_MODE - 0=Disable, 1=Enable */ 273 #ifndef SCO_I2SPCM_IF_MODE 274 #define SCO_I2SPCM_IF_MODE 1 275 #endif 276 277 #ifndef SCO_I2SPCM_IF_ROLE 278 #define SCO_I2SPCM_IF_ROLE 1 279 #endif 280 281 /* SCO_I2SPCM_IF_SAMPLE_RATE 282 283 0 : 8K 284 1 : 16K 285 2 : 4K 286 */ 287 #ifndef SCO_I2SPCM_IF_SAMPLE_RATE 288 #define SCO_I2SPCM_IF_SAMPLE_RATE 0 289 #endif 290 291 /* SCO_I2SPCM_IF_CLOCK_RATE 292 293 0 : 128K 294 1 : 256K 295 2 : 512K 296 3 : 1024K 297 4 : 2048K 298 */ 299 #ifndef SCO_I2SPCM_IF_CLOCK_RATE 300 #define SCO_I2SPCM_IF_CLOCK_RATE 1 301 #endif 302 303 /* SCO_I2SPCM_IF_CLOCK_RATE4WBS 304 305 0 : 128K 306 1 : 256K 307 2 : 512K 308 3 : 1024K 309 4 : 2048K 310 */ 311 #ifndef SCO_I2SPCM_IF_CLOCK_RATE4WBS 312 #define SCO_I2SPCM_IF_CLOCK_RATE4WBS 2 313 #endif 314 315 #define SCO_PCM_PARAM_ROUTING 0 316 #define SCO_PCM_PARAM_IF_CLOCK_RATE 1 317 #define SCO_PCM_PARAM_IF_FRAME_TYPE 2 318 #define SCO_PCM_PARAM_IF_SYNC_MODE 3 319 #define SCO_PCM_PARAM_IF_CLOCK_MODE 4 320 #define SCO_PCM_PARAM_SIZE 5 321 322 /* SCO_PCM_ROUTING 323 324 0 : PCM 325 1 : Transport 326 2 : Codec 327 3 : I2S 328 */ 329 #ifndef SCO_PCM_ROUTING 330 #define SCO_PCM_ROUTING 0 331 #endif 332 333 /* SCO_PCM_IF_CLOCK_RATE 334 335 NOTICE: suggested to be consistent with SCO_I2SPCM_IF_CLOCK_RATE 336 337 0 : 128K 338 1 : 256K 339 2 : 512K 340 3 : 1024K 341 4 : 2048K 342 */ 343 #ifndef SCO_PCM_IF_CLOCK_RATE 344 #define SCO_PCM_IF_CLOCK_RATE 4 345 #endif 346 347 /* SCO_PCM_IF_FRAME_TYPE - 0=Short, 1=Long */ 348 #ifndef SCO_PCM_IF_FRAME_TYPE 349 #define SCO_PCM_IF_FRAME_TYPE 0 350 #endif 351 352 /* SCO_PCM_IF_SYNC_MODE 353 354 NOTICE: in most usage cases the value will be the same as 355 SCO_PCM_IF_CLOCK_MODE setting 356 357 */ 358 #ifndef SCO_PCM_IF_SYNC_MODE 359 #define SCO_PCM_IF_SYNC_MODE 0 360 #endif 361 362 /* SCO_PCM_IF_CLOCK_MODE 363 364 NOTICE: suggested to be consistent with SCO_I2SPCM_IF_ROLE 365 366 */ 367 #ifndef SCO_PCM_IF_CLOCK_MODE 368 #define SCO_PCM_IF_CLOCK_MODE 0 369 #endif 370 371 #define PCM_DATA_FORMAT_PARAM_SIZE 5 372 373 /* PCM_DATA_FMT_SHIFT_MODE 374 375 0 : MSB first 376 1 : LSB first 377 */ 378 #ifndef PCM_DATA_FMT_SHIFT_MODE 379 #define PCM_DATA_FMT_SHIFT_MODE 0 380 #endif 381 382 /* PCM_DATA_FMT_FILL_BITS 383 384 Specifies the value with which to fill unused bits 385 if Fill_Method is set to programmable 386 */ 387 #ifndef PCM_DATA_FMT_FILL_BITS 388 #define PCM_DATA_FMT_FILL_BITS 0 389 #endif 390 391 /* PCM_DATA_FMT_FILL_METHOD 392 393 0 : 0's 394 1 : 1's 395 2 : Signed 396 3 : Programmable 397 */ 398 #ifndef PCM_DATA_FMT_FILL_METHOD 399 #define PCM_DATA_FMT_FILL_METHOD 3 400 #endif 401 402 /* PCM_DATA_FMT_FILL_NUM 403 404 Specifies the number of bits to be filled 405 */ 406 #ifndef PCM_DATA_FMT_FILL_NUM 407 #define PCM_DATA_FMT_FILL_NUM 0 408 #endif 409 410 /* PCM_DATA_FMT_JUSTIFY_MODE 411 412 0 : Left justify (fill data shifted out last) 413 1 : Right justify (fill data shifted out first) 414 */ 415 #ifndef PCM_DATA_FMT_JUSTIFY_MODE 416 #define PCM_DATA_FMT_JUSTIFY_MODE 0 417 #endif 418 419 /* HW_END_WITH_HCI_RESET 420 421 Sample code implementation of sending a HCI_RESET command during the epilog 422 process. It calls back to the callers after command complete of HCI_RESET 423 is received. 424 */ 425 #ifndef HW_END_WITH_HCI_RESET 426 #define HW_END_WITH_HCI_RESET TRUE 427 #endif 428 429 #define BD_ADDR_LEN 6 430 #define BT_VENDOR_TIME_RAIDX 1000 431 /****************************************************************************** 432 ** Extern variables and functions 433 ******************************************************************************/ 434 435 extern bt_vendor_callbacks_t *bt_vendor_cbacks; 436 /** audio (SCO) state changes triggering VS commands for configuration */ 437 typedef struct { 438 uint16_t handle; 439 uint16_t peer_codec; 440 uint16_t state; 441 } bt_vendor_op_audio_state_t; 442 443 extern int hw_set_audio_state(bt_vendor_op_audio_state_t *p_state); 444 extern uint8_t vnd_local_bd_addr[BD_ADDR_LEN]; 445 446 extern void hw_process_event(HC_BT_HDR *); 447 448 #endif /* BT_VENDOR_BRCM_H */ 449