1root { 2 platform { 3 template codec_controller { 4 match_attr = ""; 5 serviceName = ""; 6 codecDaiName = ""; 7 } 8 controller_0x120c1031 :: codec_controller { 9 match_attr = "hdf_codec_driver"; 10 serviceName = "codec_service_0"; 11 codecDaiName = "wm8904_codec_dai"; 12 regConfig { 13 /* reg: register address 14 rreg: register address 15 shift: shift bits 16 rshift: rshift bits 17 min: min value 18 max: max value 19 mask: mask of value 20 invert: enum InvertVal 0-uninvert 1-invert 21 value: value 22 */ 23 ctrlParamsSeqConfig = [ 24 0x1e, 0x1f, 0, 0, 0x0, 0x7f, 0x7f, 0, 0, //"Main Playback Volume" */ 25 0x24, 0x25, 0, 0, 0x0, 0x7f, 0x7f, 0, 0, //"Main Capture Volume" */ 26 0x39, 0x3a, 8, 8, 0x0, 0x1, 0x1, 0, 0, //"Playback Mute" 27 0x2c, 0x2d, 7, 7, 0x0, 0x1, 0x1, 0, 0, //"Capture Mute" 28 0x20, 0x20, 4, 8, 0x0, 0xf, 0xf, 0, 0, //"Mic Left Gain" 29 0x20, 0x20, 4, 8, 0x0, 0xf, 0xf, 0, 0, //"Mic Right Gain" 30 /* dummy register for hamoryos audio*/ 31 0xff, 0xff, 16, 16, 0x0, 0x7, 0x7, 0, 0, //"Render Channel Mode" 32 0xff, 0xff, 16, 16, 0x0, 0x7, 0x7, 0, 0 //"Captrue Channel Mode" 33 34 ]; 35 36 controlsConfig = [ 37 /* 38 "Master Playback Volume", 39 "Master Capture Volume", 40 "Playback Mute", 41 "Capture Mute", 42 "Mic Left Gain", 43 "Mic Right Gain", 44 "External Codec Enable", 45 "Internally Codec Enable", 46 "Render Channel Mode", 47 "Captrue Channel Mode" 48 */ 49 50 /*array index, iface, enable*/ 51 0, 2, 0, 0, 52 1, 2, 0, 0, 53 2, 2, 0, 0, 54 3, 2, 0, 0, 55 /* dummy register for hamoryOs audio */ 56 4, 2, 1, 57 5, 2, 0, 0, 58 8, 2, 0, 0, 59 9, 2, 0, 0, 60 61 ]; 62 63 ctrlSapmParamsSeqConfig = [ 64 0xff, 0x00, 23, 23, 0x0, 0x1, 0x1, 0, 0, //LPGA MIC 0 -- connect MIC 65 0xff, 0x00, 31, 31, 0x0, 0x1, 0x1, 0, 0, //RPGA MIC 0 -- connect MIC 66 0xff, 0x00, 27, 27, 0x0, 0x1, 0x1, 0, 0, //dacl to dacr mixer 67 0xff, 0x00, 26, 26, 0x0, 0x1, 0x1, 0, 0 //dacr to dacl mixer 68 ]; 69 70 /* index = "ADCL", "ADCR", "DACL", "DACR", "LPGA", "RPGA", "SPKL", "SPKR", "MIC"*/ 71 sapmComponent = [ 72 10, 0, 0xff, 0x1, 15, 1, 0, 0, //ADCL 73 10, 1, 0xff, 0x1, 14, 1, 0, 0, //ADCR 74 11, 2, 0xff, 0x1, 11, 1, 0, 0, //DACL 75 11, 3, 0xff, 0x1, 12, 1, 0, 0, //DACR 76 8, 4, 0xff, 0x1, 13, 1, 1, 1, //LPGA 77 8, 5, 0xff, 0x1, 12, 1, 2, 1, //RPGA 78 15, 6, 0, 0x1, 0, 0, 3, 1, //SPKL 79 15, 7, 0, 0x1, 0, 0, 4, 1, //SPKR 80 0, 8, 0, 0x1, 0, 0, 0, 0 //MIC 81 ]; 82 83 /*array index, iface, enable*/ 84 sapmConfig = [ 85 0, 5, 1, 86 1, 5, 1, 87 2, 0, 1, 88 3, 0, 1 89 ]; 90 91 } 92 } 93 } 94} 95