1 /*
2 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Rob Clark <robclark@freedesktop.org>
25 */
26
27 #include "pipe/p_state.h"
28 #include "util/debug.h"
29 #include "util/format/u_format.h"
30 #include "util/hash_table.h"
31 #include "util/u_dump.h"
32 #include "util/u_inlines.h"
33 #include "util/u_memory.h"
34 #include "util/u_string.h"
35 #include "u_tracepoints.h"
36 #include "util/u_trace_gallium.h"
37
38 #include "freedreno_context.h"
39 #include "freedreno_fence.h"
40 #include "freedreno_gmem.h"
41 #include "freedreno_query_hw.h"
42 #include "freedreno_resource.h"
43 #include "freedreno_tracepoints.h"
44 #include "freedreno_util.h"
45
46 /*
47 * GMEM is the small (ie. 256KiB for a200, 512KiB for a220, etc) tile buffer
48 * inside the GPU. All rendering happens to GMEM. Larger render targets
49 * are split into tiles that are small enough for the color (and depth and/or
50 * stencil, if enabled) buffers to fit within GMEM. Before rendering a tile,
51 * if there was not a clear invalidating the previous tile contents, we need
52 * to restore the previous tiles contents (system mem -> GMEM), and after all
53 * the draw calls, before moving to the next tile, we need to save the tile
54 * contents (GMEM -> system mem).
55 *
56 * The code in this file handles dealing with GMEM and tiling.
57 *
58 * The structure of the ringbuffer ends up being:
59 *
60 * +--<---<-- IB ---<---+---<---+---<---<---<--+
61 * | | | |
62 * v ^ ^ ^
63 * ------------------------------------------------------
64 * | clear/draw cmds | Tile0 | Tile1 | .... | TileN |
65 * ------------------------------------------------------
66 * ^
67 * |
68 * address submitted in issueibcmds
69 *
70 * Where the per-tile section handles scissor setup, mem2gmem restore (if
71 * needed), IB to draw cmds earlier in the ringbuffer, and then gmem2mem
72 * resolve.
73 */
74
75 #ifndef BIN_DEBUG
76 #define BIN_DEBUG 0
77 #endif
78
79 /*
80 * GMEM Cache:
81 *
82 * Caches GMEM state based on a given framebuffer state. The key is
83 * meant to be the minimal set of data that results in a unique gmem
84 * configuration, avoiding multiple keys arriving at the same gmem
85 * state. For example, the render target format is not part of the
86 * key, only the size per pixel. And the max_scissor bounds is not
87 * part of they key, only the minx/miny (after clamping to tile
88 * alignment) and width/height. This ensures that slightly different
89 * max_scissor which would result in the same gmem state, do not
90 * become different keys that map to the same state.
91 */
92
93 struct gmem_key {
94 uint16_t minx, miny;
95 uint16_t width, height;
96 uint8_t gmem_page_align; /* alignment in multiples of 0x1000 to reduce key size */
97 uint8_t nr_cbufs;
98 uint8_t cbuf_cpp[MAX_RENDER_TARGETS];
99 uint8_t zsbuf_cpp[2];
100 };
101
102 static uint32_t
gmem_key_hash(const void * _key)103 gmem_key_hash(const void *_key)
104 {
105 const struct gmem_key *key = _key;
106 return _mesa_hash_data(key, sizeof(*key));
107 }
108
109 static bool
gmem_key_equals(const void * _a,const void * _b)110 gmem_key_equals(const void *_a, const void *_b)
111 {
112 const struct gmem_key *a = _a;
113 const struct gmem_key *b = _b;
114 return memcmp(a, b, sizeof(*a)) == 0;
115 }
116
117 static void
dump_gmem_key(const struct gmem_key * key)118 dump_gmem_key(const struct gmem_key *key)
119 {
120 printf("{ .minx=%u, .miny=%u, .width=%u, .height=%u", key->minx, key->miny,
121 key->width, key->height);
122 printf(", .gmem_page_align=%u, .nr_cbufs=%u", key->gmem_page_align,
123 key->nr_cbufs);
124 printf(", .cbuf_cpp = {");
125 for (unsigned i = 0; i < ARRAY_SIZE(key->cbuf_cpp); i++)
126 printf("%u,", key->cbuf_cpp[i]);
127 printf("}, .zsbuf_cpp = {");
128 for (unsigned i = 0; i < ARRAY_SIZE(key->zsbuf_cpp); i++)
129 printf("%u,", key->zsbuf_cpp[i]);
130 printf("}},\n");
131 }
132
133 static void
dump_gmem_state(const struct fd_gmem_stateobj * gmem)134 dump_gmem_state(const struct fd_gmem_stateobj *gmem)
135 {
136 unsigned total = 0;
137 printf("GMEM LAYOUT: bin=%ux%u, nbins=%ux%u\n", gmem->bin_w, gmem->bin_h,
138 gmem->nbins_x, gmem->nbins_y);
139 for (int i = 0; i < ARRAY_SIZE(gmem->cbuf_base); i++) {
140 if (!gmem->cbuf_cpp[i])
141 continue;
142
143 unsigned size = gmem->cbuf_cpp[i] * gmem->bin_w * gmem->bin_h;
144 printf(" cbuf[%d]: base=0x%06x, size=0x%x, cpp=%u\n", i,
145 gmem->cbuf_base[i], size, gmem->cbuf_cpp[i]);
146
147 total = gmem->cbuf_base[i] + size;
148 }
149
150 for (int i = 0; i < ARRAY_SIZE(gmem->zsbuf_base); i++) {
151 if (!gmem->zsbuf_cpp[i])
152 continue;
153
154 unsigned size = gmem->zsbuf_cpp[i] * gmem->bin_w * gmem->bin_h;
155 printf(" zsbuf[%d]: base=0x%06x, size=0x%x, cpp=%u\n", i,
156 gmem->zsbuf_base[i], size, gmem->zsbuf_cpp[i]);
157
158 total = gmem->zsbuf_base[i] + size;
159 }
160
161 printf("total: 0x%06x (of 0x%06x)\n", total, gmem->screen->gmemsize_bytes);
162 }
163
164 static unsigned
div_align(unsigned num,unsigned denom,unsigned al)165 div_align(unsigned num, unsigned denom, unsigned al)
166 {
167 return util_align_npot(DIV_ROUND_UP(num, denom), al);
168 }
169
170 static bool
layout_gmem(struct gmem_key * key,uint32_t nbins_x,uint32_t nbins_y,struct fd_gmem_stateobj * gmem)171 layout_gmem(struct gmem_key *key, uint32_t nbins_x, uint32_t nbins_y,
172 struct fd_gmem_stateobj *gmem)
173 {
174 struct fd_screen *screen = gmem->screen;
175 uint32_t gmem_align = key->gmem_page_align * 0x1000;
176 uint32_t total = 0, i;
177
178 if ((nbins_x == 0) || (nbins_y == 0))
179 return false;
180
181 uint32_t bin_w, bin_h;
182 bin_w = div_align(key->width, nbins_x, screen->info->tile_align_w);
183 bin_h = div_align(key->height, nbins_y, screen->info->tile_align_h);
184
185 if (bin_w > screen->info->tile_max_w)
186 return false;
187
188 if (bin_h > screen->info->tile_max_h)
189 return false;
190
191 gmem->bin_w = bin_w;
192 gmem->bin_h = bin_h;
193
194 /* due to aligning bin_w/h, we could end up with one too
195 * many bins in either dimension, so recalculate:
196 */
197 gmem->nbins_x = DIV_ROUND_UP(key->width, bin_w);
198 gmem->nbins_y = DIV_ROUND_UP(key->height, bin_h);
199
200 for (i = 0; i < MAX_RENDER_TARGETS; i++) {
201 if (key->cbuf_cpp[i]) {
202 gmem->cbuf_base[i] = util_align_npot(total, gmem_align);
203 total = gmem->cbuf_base[i] + key->cbuf_cpp[i] * bin_w * bin_h;
204 }
205 }
206
207 if (key->zsbuf_cpp[0]) {
208 gmem->zsbuf_base[0] = util_align_npot(total, gmem_align);
209 total = gmem->zsbuf_base[0] + key->zsbuf_cpp[0] * bin_w * bin_h;
210 }
211
212 if (key->zsbuf_cpp[1]) {
213 gmem->zsbuf_base[1] = util_align_npot(total, gmem_align);
214 total = gmem->zsbuf_base[1] + key->zsbuf_cpp[1] * bin_w * bin_h;
215 }
216
217 return total <= screen->gmemsize_bytes;
218 }
219
220 static void
calc_nbins(struct gmem_key * key,struct fd_gmem_stateobj * gmem)221 calc_nbins(struct gmem_key *key, struct fd_gmem_stateobj *gmem)
222 {
223 struct fd_screen *screen = gmem->screen;
224 uint32_t nbins_x = 1, nbins_y = 1;
225 uint32_t max_width = screen->info->tile_max_w;
226 uint32_t max_height = screen->info->tile_max_h;
227
228 if (FD_DBG(MSGS)) {
229 debug_printf("binning input: cbuf cpp:");
230 for (unsigned i = 0; i < key->nr_cbufs; i++)
231 debug_printf(" %d", key->cbuf_cpp[i]);
232 debug_printf(", zsbuf cpp: %d; %dx%d\n", key->zsbuf_cpp[0], key->width,
233 key->height);
234 }
235
236 /* first, find a bin size that satisfies the maximum width/
237 * height restrictions:
238 */
239 while (div_align(key->width, nbins_x, screen->info->tile_align_w) >
240 max_width) {
241 nbins_x++;
242 }
243
244 while (div_align(key->height, nbins_y, screen->info->tile_align_h) >
245 max_height) {
246 nbins_y++;
247 }
248
249 /* then find a bin width/height that satisfies the memory
250 * constraints:
251 */
252 while (!layout_gmem(key, nbins_x, nbins_y, gmem)) {
253 if (nbins_y > nbins_x) {
254 nbins_x++;
255 } else {
256 nbins_y++;
257 }
258 }
259
260 /* Lets see if we can tweak the layout a bit and come up with
261 * something better:
262 */
263 if ((((nbins_x - 1) * (nbins_y + 1)) < (nbins_x * nbins_y)) &&
264 layout_gmem(key, nbins_x - 1, nbins_y + 1, gmem)) {
265 nbins_x--;
266 nbins_y++;
267 } else if ((((nbins_x + 1) * (nbins_y - 1)) < (nbins_x * nbins_y)) &&
268 layout_gmem(key, nbins_x + 1, nbins_y - 1, gmem)) {
269 nbins_x++;
270 nbins_y--;
271 }
272
273 layout_gmem(key, nbins_x, nbins_y, gmem);
274 }
275
276 static struct fd_gmem_stateobj *
gmem_stateobj_init(struct fd_screen * screen,struct gmem_key * key)277 gmem_stateobj_init(struct fd_screen *screen, struct gmem_key *key)
278 {
279 struct fd_gmem_stateobj *gmem =
280 rzalloc(screen->gmem_cache.ht, struct fd_gmem_stateobj);
281 pipe_reference_init(&gmem->reference, 1);
282 gmem->screen = screen;
283 gmem->key = key;
284 list_inithead(&gmem->node);
285
286 const unsigned npipes = screen->info->num_vsc_pipes;
287 uint32_t i, j, t, xoff, yoff;
288 uint32_t tpp_x, tpp_y;
289 int tile_n[npipes];
290
291 calc_nbins(key, gmem);
292
293 DBG("using %d bins of size %dx%d", gmem->nbins_x * gmem->nbins_y,
294 gmem->bin_w, gmem->bin_h);
295
296 memcpy(gmem->cbuf_cpp, key->cbuf_cpp, sizeof(key->cbuf_cpp));
297 memcpy(gmem->zsbuf_cpp, key->zsbuf_cpp, sizeof(key->zsbuf_cpp));
298 gmem->minx = key->minx;
299 gmem->miny = key->miny;
300 gmem->width = key->width;
301 gmem->height = key->height;
302
303 if (BIN_DEBUG) {
304 dump_gmem_state(gmem);
305 dump_gmem_key(key);
306 }
307
308 /*
309 * Assign tiles and pipes:
310 *
311 * At some point it might be worth playing with different
312 * strategies and seeing if that makes much impact on
313 * performance.
314 */
315
316 #define div_round_up(v, a) (((v) + (a)-1) / (a))
317 /* figure out number of tiles per pipe: */
318 if (is_a20x(screen)) {
319 /* for a20x we want to minimize the number of "pipes"
320 * binning data has 3 bits for x/y (8x8) but the edges are used to
321 * cull off-screen vertices with hw binning, so we have 6x6 pipes
322 */
323 tpp_x = 6;
324 tpp_y = 6;
325 } else {
326 tpp_x = tpp_y = 1;
327 while (div_round_up(gmem->nbins_y, tpp_y) > npipes)
328 tpp_y += 2;
329 while ((div_round_up(gmem->nbins_y, tpp_y) *
330 div_round_up(gmem->nbins_x, tpp_x)) > npipes)
331 tpp_x += 1;
332 }
333
334 #ifdef DEBUG
335 tpp_x = env_var_as_unsigned("TPP_X", tpp_x);
336 tpp_y = env_var_as_unsigned("TPP_Y", tpp_x);
337 #endif
338
339 gmem->maxpw = tpp_x;
340 gmem->maxph = tpp_y;
341
342 /* configure pipes: */
343 xoff = yoff = 0;
344 for (i = 0; i < npipes; i++) {
345 struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[i];
346
347 if (xoff >= gmem->nbins_x) {
348 xoff = 0;
349 yoff += tpp_y;
350 }
351
352 if (yoff >= gmem->nbins_y) {
353 break;
354 }
355
356 pipe->x = xoff;
357 pipe->y = yoff;
358 pipe->w = MIN2(tpp_x, gmem->nbins_x - xoff);
359 pipe->h = MIN2(tpp_y, gmem->nbins_y - yoff);
360
361 xoff += tpp_x;
362 }
363
364 /* number of pipes to use for a20x */
365 gmem->num_vsc_pipes = MAX2(1, i);
366
367 for (; i < npipes; i++) {
368 struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[i];
369 pipe->x = pipe->y = pipe->w = pipe->h = 0;
370 }
371
372 if (BIN_DEBUG) {
373 printf("%dx%d ... tpp=%dx%d\n", gmem->nbins_x, gmem->nbins_y, tpp_x,
374 tpp_y);
375 for (i = 0; i < ARRAY_SIZE(gmem->vsc_pipe); i++) {
376 struct fd_vsc_pipe *pipe = &gmem->vsc_pipe[i];
377 printf("pipe[%d]: %ux%u @ %u,%u\n", i, pipe->w, pipe->h, pipe->x,
378 pipe->y);
379 }
380 }
381
382 /* configure tiles: */
383 t = 0;
384 yoff = key->miny;
385 memset(tile_n, 0, sizeof(tile_n));
386 for (i = 0; i < gmem->nbins_y; i++) {
387 int bw, bh;
388
389 xoff = key->minx;
390
391 /* clip bin height: */
392 bh = MIN2(gmem->bin_h, key->miny + key->height - yoff);
393 assert(bh > 0);
394
395 for (j = 0; j < gmem->nbins_x; j++) {
396 struct fd_tile *tile = &gmem->tile[t];
397 uint32_t p;
398
399 assert(t < ARRAY_SIZE(gmem->tile));
400
401 /* pipe number: */
402 p = ((i / tpp_y) * div_round_up(gmem->nbins_x, tpp_x)) + (j / tpp_x);
403 assert(p < gmem->num_vsc_pipes);
404
405 /* clip bin width: */
406 bw = MIN2(gmem->bin_w, key->minx + key->width - xoff);
407 assert(bw > 0);
408
409 tile->n = !is_a20x(screen) ? tile_n[p]++
410 : ((i % tpp_y + 1) << 3 | (j % tpp_x + 1));
411 tile->p = p;
412 tile->bin_w = bw;
413 tile->bin_h = bh;
414 tile->xoff = xoff;
415 tile->yoff = yoff;
416
417 if (BIN_DEBUG) {
418 printf("tile[%d]: p=%u, bin=%ux%u+%u+%u\n", t, p, bw, bh, xoff,
419 yoff);
420 }
421
422 t++;
423
424 xoff += bw;
425 }
426
427 yoff += bh;
428 }
429
430 /* Swap the order of alternating rows to form an 'S' pattern, to improve
431 * cache access patterns (ie. adjacent bins are likely to access adjacent
432 * portions of textures)
433 */
434 if (!FD_DBG(NOSBIN)) {
435 for (i = 0; i < gmem->nbins_y; i+=2) {
436 unsigned col0 = gmem->nbins_x * i;
437 for (j = 0; j < gmem->nbins_x/2; j++) {
438 swap(gmem->tile[col0 + j], gmem->tile[col0 + gmem->nbins_x - j - 1]);
439 }
440 }
441 }
442
443 if (BIN_DEBUG) {
444 t = 0;
445 for (i = 0; i < gmem->nbins_y; i++) {
446 for (j = 0; j < gmem->nbins_x; j++) {
447 struct fd_tile *tile = &gmem->tile[t++];
448 printf("|p:%u n:%u|", tile->p, tile->n);
449 }
450 printf("\n");
451 }
452 }
453
454 return gmem;
455 }
456
457 void
__fd_gmem_destroy(struct fd_gmem_stateobj * gmem)458 __fd_gmem_destroy(struct fd_gmem_stateobj *gmem)
459 {
460 struct fd_gmem_cache *cache = &gmem->screen->gmem_cache;
461
462 fd_screen_assert_locked(gmem->screen);
463
464 _mesa_hash_table_remove_key(cache->ht, gmem->key);
465 list_del(&gmem->node);
466
467 ralloc_free(gmem->key);
468 ralloc_free(gmem);
469 }
470
471 static struct gmem_key *
gmem_key_init(struct fd_batch * batch,bool assume_zs,bool no_scis_opt)472 gmem_key_init(struct fd_batch *batch, bool assume_zs, bool no_scis_opt)
473 {
474 struct fd_screen *screen = batch->ctx->screen;
475 struct pipe_framebuffer_state *pfb = &batch->framebuffer;
476 bool has_zs = pfb->zsbuf &&
477 !!(batch->gmem_reason & (FD_GMEM_DEPTH_ENABLED | FD_GMEM_STENCIL_ENABLED |
478 FD_GMEM_CLEARS_DEPTH_STENCIL));
479 struct gmem_key *key = rzalloc(screen->gmem_cache.ht, struct gmem_key);
480
481 if (has_zs || assume_zs) {
482 struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture);
483 key->zsbuf_cpp[0] = rsc->layout.cpp;
484 if (rsc->stencil)
485 key->zsbuf_cpp[1] = rsc->stencil->layout.cpp;
486 } else {
487 /* we might have a zsbuf, but it isn't used */
488 batch->restore &= ~(FD_BUFFER_DEPTH | FD_BUFFER_STENCIL);
489 batch->resolve &= ~(FD_BUFFER_DEPTH | FD_BUFFER_STENCIL);
490 }
491
492 key->nr_cbufs = pfb->nr_cbufs;
493 for (unsigned i = 0; i < pfb->nr_cbufs; i++) {
494 if (pfb->cbufs[i])
495 key->cbuf_cpp[i] = util_format_get_blocksize(pfb->cbufs[i]->format);
496 else
497 key->cbuf_cpp[i] = 4;
498 /* if MSAA, color buffers are super-sampled in GMEM: */
499 key->cbuf_cpp[i] *= pfb->samples;
500 }
501
502 /* NOTE: on a6xx, the max-scissor-rect is handled in fd6_gmem, and
503 * we just rely on CP_COND_EXEC to skip bins with no geometry.
504 */
505 if (no_scis_opt || is_a6xx(screen)) {
506 key->minx = 0;
507 key->miny = 0;
508 key->width = pfb->width;
509 key->height = pfb->height;
510 } else {
511 struct pipe_scissor_state *scissor = &batch->max_scissor;
512
513 if (FD_DBG(NOSCIS)) {
514 scissor->minx = 0;
515 scissor->miny = 0;
516 scissor->maxx = pfb->width;
517 scissor->maxy = pfb->height;
518 }
519
520 /* round down to multiple of alignment: */
521 key->minx = scissor->minx & ~(screen->info->gmem_align_w - 1);
522 key->miny = scissor->miny & ~(screen->info->gmem_align_h - 1);
523 key->width = scissor->maxx - key->minx;
524 key->height = scissor->maxy - key->miny;
525 }
526
527 if (is_a20x(screen) && batch->cleared) {
528 /* under normal circumstances the requirement would be 4K
529 * but the fast clear path requires an alignment of 32K
530 */
531 key->gmem_page_align = 8;
532 } else if (is_a6xx(screen)) {
533 key->gmem_page_align = (screen->info->tile_align_w == 96) ? 3 : 1;
534 } else {
535 // TODO re-check this across gens.. maybe it should only
536 // be a single page in some cases:
537 key->gmem_page_align = 4;
538 }
539
540 return key;
541 }
542
543 static struct fd_gmem_stateobj *
lookup_gmem_state(struct fd_batch * batch,bool assume_zs,bool no_scis_opt)544 lookup_gmem_state(struct fd_batch *batch, bool assume_zs, bool no_scis_opt)
545 {
546 struct fd_screen *screen = batch->ctx->screen;
547 struct fd_gmem_cache *cache = &screen->gmem_cache;
548 struct fd_gmem_stateobj *gmem = NULL;
549
550 /* Lock before allocating gmem_key, since that a screen-wide
551 * ralloc pool and ralloc itself is not thread-safe.
552 */
553 fd_screen_lock(screen);
554
555 struct gmem_key *key = gmem_key_init(batch, assume_zs, no_scis_opt);
556 uint32_t hash = gmem_key_hash(key);
557
558 struct hash_entry *entry =
559 _mesa_hash_table_search_pre_hashed(cache->ht, hash, key);
560 if (entry) {
561 ralloc_free(key);
562 goto found;
563 }
564
565 /* limit the # of cached gmem states, discarding the least
566 * recently used state if needed:
567 */
568 if (cache->ht->entries >= 20) {
569 struct fd_gmem_stateobj *last =
570 list_last_entry(&cache->lru, struct fd_gmem_stateobj, node);
571 fd_gmem_reference(&last, NULL);
572 }
573
574 entry = _mesa_hash_table_insert_pre_hashed(cache->ht, hash, key,
575 gmem_stateobj_init(screen, key));
576
577 found:
578 fd_gmem_reference(&gmem, entry->data);
579 /* Move to the head of the LRU: */
580 list_delinit(&gmem->node);
581 list_add(&gmem->node, &cache->lru);
582
583 fd_screen_unlock(screen);
584
585 return gmem;
586 }
587
588 /*
589 * GMEM render pass
590 */
591
592 static void
render_tiles(struct fd_batch * batch,struct fd_gmem_stateobj * gmem)593 render_tiles(struct fd_batch *batch, struct fd_gmem_stateobj *gmem) assert_dt
594 {
595 struct fd_context *ctx = batch->ctx;
596 int i;
597
598 simple_mtx_lock(&ctx->gmem_lock);
599
600 ctx->emit_tile_init(batch);
601
602 if (batch->restore)
603 ctx->stats.batch_restore++;
604
605 for (i = 0; i < (gmem->nbins_x * gmem->nbins_y); i++) {
606 struct fd_tile *tile = &gmem->tile[i];
607
608 trace_start_tile(&batch->trace, batch->gmem, tile->bin_h, tile->yoff, tile->bin_w,
609 tile->xoff);
610
611 ctx->emit_tile_prep(batch, tile);
612
613 if (batch->restore) {
614 ctx->emit_tile_mem2gmem(batch, tile);
615 }
616
617 ctx->emit_tile_renderprep(batch, tile);
618
619 if (ctx->query_prepare_tile)
620 ctx->query_prepare_tile(batch, i, batch->gmem);
621
622 /* emit IB to drawcmds: */
623 trace_start_draw_ib(&batch->trace, batch->gmem);
624 if (ctx->emit_tile) {
625 ctx->emit_tile(batch, tile);
626 } else {
627 ctx->screen->emit_ib(batch->gmem, batch->draw);
628 }
629 trace_end_draw_ib(&batch->trace, batch->gmem);
630 fd_reset_wfi(batch);
631
632 /* emit gmem2mem to transfer tile back to system memory: */
633 ctx->emit_tile_gmem2mem(batch, tile);
634 }
635
636 if (ctx->emit_tile_fini)
637 ctx->emit_tile_fini(batch);
638
639 simple_mtx_unlock(&ctx->gmem_lock);
640 }
641
642 static void
render_sysmem(struct fd_batch * batch)643 render_sysmem(struct fd_batch *batch) assert_dt
644 {
645 struct fd_context *ctx = batch->ctx;
646
647 ctx->emit_sysmem_prep(batch);
648
649 if (ctx->query_prepare_tile)
650 ctx->query_prepare_tile(batch, 0, batch->gmem);
651
652 if (!batch->nondraw) {
653 trace_start_draw_ib(&batch->trace, batch->gmem);
654 }
655 /* emit IB to drawcmds: */
656 ctx->screen->emit_ib(batch->gmem, batch->draw);
657
658 if (!batch->nondraw) {
659 trace_end_draw_ib(&batch->trace, batch->gmem);
660 }
661
662 fd_reset_wfi(batch);
663
664 if (ctx->emit_sysmem_fini)
665 ctx->emit_sysmem_fini(batch);
666 }
667
668 static void
flush_ring(struct fd_batch * batch)669 flush_ring(struct fd_batch *batch)
670 {
671 if (FD_DBG(NOHW))
672 return;
673
674 fd_submit_flush(batch->submit, batch->in_fence_fd,
675 batch->fence ? &batch->fence->submit_fence : NULL);
676
677 if (batch->fence)
678 fd_fence_set_batch(batch->fence, NULL);
679 }
680
681 void
fd_gmem_render_tiles(struct fd_batch * batch)682 fd_gmem_render_tiles(struct fd_batch *batch)
683 {
684 struct fd_context *ctx = batch->ctx;
685 struct pipe_framebuffer_state *pfb = &batch->framebuffer;
686 bool sysmem = false;
687
688 ctx->submit_count++;
689
690 if (!batch->nondraw) {
691 #if HAVE_PERFETTO
692 /* For non-draw batches, we don't really have a good place to
693 * match up the api event submit-id to the on-gpu rendering,
694 * so skip this for non-draw batches.
695 */
696 fd_perfetto_submit(ctx);
697 #endif
698 trace_flush_batch(&batch->trace, batch->gmem, batch, batch->cleared,
699 batch->gmem_reason, batch->num_draws);
700 trace_framebuffer_state(&batch->trace, batch->gmem, pfb);
701 }
702
703 if (ctx->emit_sysmem_prep && !batch->nondraw) {
704 if (fd_autotune_use_bypass(&ctx->autotune, batch) && !FD_DBG(GMEM)) {
705 sysmem = true;
706 }
707
708 /* For ARB_framebuffer_no_attachments: */
709 if ((pfb->nr_cbufs == 0) && !pfb->zsbuf) {
710 sysmem = true;
711 }
712 }
713
714 if (FD_DBG(SYSMEM))
715 sysmem = true;
716
717 /* Layered rendering always needs bypass. */
718 for (unsigned i = 0; i < pfb->nr_cbufs; i++) {
719 struct pipe_surface *psurf = pfb->cbufs[i];
720 if (!psurf)
721 continue;
722 if (psurf->u.tex.first_layer < psurf->u.tex.last_layer)
723 sysmem = true;
724 }
725 if (pfb->zsbuf && pfb->zsbuf->u.tex.first_layer < pfb->zsbuf->u.tex.last_layer)
726 sysmem = true;
727
728 /* Tessellation doesn't seem to support tiled rendering so fall back to
729 * bypass.
730 */
731 if (batch->tessellation) {
732 assert(ctx->emit_sysmem_prep);
733 sysmem = true;
734 }
735
736 fd_reset_wfi(batch);
737
738 ctx->stats.batch_total++;
739
740 if (batch->nondraw) {
741 DBG("%p: rendering non-draw", batch);
742 if (!fd_ringbuffer_empty(batch->draw))
743 render_sysmem(batch);
744 ctx->stats.batch_nondraw++;
745 } else if (sysmem) {
746 trace_render_sysmem(&batch->trace, batch->gmem);
747 trace_start_render_pass(&batch->trace, batch->gmem,
748 ctx->submit_count, pipe_surface_format(pfb->cbufs[0]),
749 pipe_surface_format(pfb->zsbuf), pfb->width, pfb->height,
750 pfb->nr_cbufs, pfb->samples, 0, 0, 0);
751 if (ctx->query_prepare)
752 ctx->query_prepare(batch, 1);
753 render_sysmem(batch);
754 trace_end_render_pass(&batch->trace, batch->gmem);
755 ctx->stats.batch_sysmem++;
756 } else {
757 struct fd_gmem_stateobj *gmem = lookup_gmem_state(batch, false, false);
758 batch->gmem_state = gmem;
759 trace_render_gmem(&batch->trace, batch->gmem, gmem->nbins_x, gmem->nbins_y,
760 gmem->bin_w, gmem->bin_h);
761 trace_start_render_pass(&batch->trace, batch->gmem,
762 ctx->submit_count, pipe_surface_format(pfb->cbufs[0]),
763 pipe_surface_format(pfb->zsbuf), pfb->width, pfb->height,
764 pfb->nr_cbufs, pfb->samples, gmem->nbins_x * gmem->nbins_y,
765 gmem->bin_w, gmem->bin_h);
766 if (ctx->query_prepare)
767 ctx->query_prepare(batch, gmem->nbins_x * gmem->nbins_y);
768 render_tiles(batch, gmem);
769 trace_end_render_pass(&batch->trace, batch->gmem);
770 batch->gmem_state = NULL;
771
772 fd_screen_lock(ctx->screen);
773 fd_gmem_reference(&gmem, NULL);
774 fd_screen_unlock(ctx->screen);
775
776 ctx->stats.batch_gmem++;
777 }
778
779 flush_ring(batch);
780
781 u_trace_flush(&batch->trace, NULL, false);
782 }
783
784 /* Determine a worst-case estimate (ie. assuming we don't eliminate an
785 * unused depth/stencil) number of bins per vsc pipe.
786 */
787 unsigned
fd_gmem_estimate_bins_per_pipe(struct fd_batch * batch)788 fd_gmem_estimate_bins_per_pipe(struct fd_batch *batch)
789 {
790 struct pipe_framebuffer_state *pfb = &batch->framebuffer;
791 struct fd_screen *screen = batch->ctx->screen;
792 struct fd_gmem_stateobj *gmem = lookup_gmem_state(batch, !!pfb->zsbuf, true);
793 unsigned nbins = gmem->maxpw * gmem->maxph;
794
795 fd_screen_lock(screen);
796 fd_gmem_reference(&gmem, NULL);
797 fd_screen_unlock(screen);
798
799 return nbins;
800 }
801
802 /* When deciding whether a tile needs mem2gmem, we need to take into
803 * account the scissor rect(s) that were cleared. To simplify we only
804 * consider the last scissor rect for each buffer, since the common
805 * case would be a single clear.
806 */
807 bool
fd_gmem_needs_restore(struct fd_batch * batch,const struct fd_tile * tile,uint32_t buffers)808 fd_gmem_needs_restore(struct fd_batch *batch, const struct fd_tile *tile,
809 uint32_t buffers)
810 {
811 if (!(batch->restore & buffers))
812 return false;
813
814 return true;
815 }
816
817 void
fd_gmem_screen_init(struct pipe_screen * pscreen)818 fd_gmem_screen_init(struct pipe_screen *pscreen)
819 {
820 struct fd_gmem_cache *cache = &fd_screen(pscreen)->gmem_cache;
821
822 cache->ht = _mesa_hash_table_create(NULL, gmem_key_hash, gmem_key_equals);
823 list_inithead(&cache->lru);
824 }
825
826 void
fd_gmem_screen_fini(struct pipe_screen * pscreen)827 fd_gmem_screen_fini(struct pipe_screen *pscreen)
828 {
829 struct fd_gmem_cache *cache = &fd_screen(pscreen)->gmem_cache;
830
831 _mesa_hash_table_destroy(cache->ht, NULL);
832 }
833