| /third_party/node/deps/v8/src/wasm/baseline/riscv64/ |
| D | liftoff-assembler-riscv64.h | 1756 VU.set(kScratchReg, E32, m1); in LoadTransform()
1761 VU.set(kScratchReg, E32, m1); in LoadTransform()
1775 VU.set(kScratchReg, E32, m1); in LoadTransform()
1795 VU.set(kScratchReg, E32, m1); in LoadTransform()
1830 VU.set(kScratchReg, E32, m1); in LoadLane()
1863 VU.set(kScratchReg, E32, m1); in StoreLane()
1958 VU.set(kScratchReg, E32, m1); in emit_i32x4_splat()
1990 VU.set(kScratchReg, E32, m1); in emit_f32x4_splat()
2005 VU.set(kScratchReg, E32, mf2); in emit_i64x2_extmul_low_i32x4_s()
2020 VU.set(kScratchReg, E32, mf2); in emit_i64x2_extmul_low_i32x4_u()
[all …]
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| /third_party/node/deps/v8/src/compiler/backend/riscv64/ |
| D | code-generator-riscv64.cc | 500 __ VU.set(kScratchReg, E32, m1); \
518 __ VU.set(kScratchReg, E32, m1); \
540 __ VU.set(kScratchReg, E32, m1); \
1972 __ VU.set(kScratchReg, E32, m1); in AssembleArchInstruction()
2023 case E32: in AssembleArchInstruction()
2156 __ VU.set(kScratchReg2, E32, m2); in AssembleArchInstruction()
2286 __ VU.set(kScratchReg, E32, m1); in AssembleArchInstruction()
2296 __ VU.set(kScratchReg, E32, m1); in AssembleArchInstruction()
2307 __ VU.set(kScratchReg, E32, m1); in AssembleArchInstruction()
2314 __ VU.set(kScratchReg, E32, m1); in AssembleArchInstruction()
[all …]
|
| D | instruction-selector-riscv64.cc | 479 EmitS128Load(this, node, kRiscvS128LoadSplat, E32, m1); in VisitLoadTransform()
491 EmitS128Load(this, node, kRiscvS128Load64ExtendS, E32, m1); in VisitLoadTransform()
494 EmitS128Load(this, node, kRiscvS128Load64ExtendU, E32, m1); in VisitLoadTransform()
503 EmitS128Load(this, node, kRiscvS128Load32Zero, E32, m1); in VisitLoadTransform()
3133 g.UseImmediate(E32), g.UseImmediate(m2));
3135 g.UseImmediate(E32), g.UseImmediate(m2));
3136 this->Emit(kRiscvVaddVv, dst, temp1, temp2, g.UseImmediate(E32),
|
| /third_party/node/deps/v8/src/execution/riscv64/ |
| D | simulator-riscv64.cc | 323 } else if (rvv_vsew() == E32) { \
344 } else if (rvv_vsew() == E32) { \
365 } else if (rvv_vsew() == E32) { \
386 } else if (rvv_vsew() == E32) { \
407 } else if (rvv_vsew() == E32) { \
428 } else if (rvv_vsew() == E32) { \
512 } else if (rvv_vsew() == E32) { \
527 } else if (rvv_vsew() == E32) { \
580 } else if (rvv_vsew() == E32) { \
612 } else if (rvv_vsew() == E32) { \
[all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | GCNDPPCombine.cpp | 127 auto E32 = AMDGPU::getVOPe32(Op); in getDPPOp() local
128 DPP32 = (E32 == -1)? -1 : AMDGPU::getDPPOp32(E32); in getDPPOp()
|
| /third_party/python/Lib/test/ |
| D | floating_points.txt | 181 -548357443505E32
|
| /third_party/typescript/tests/cases/compiler/ |
| D | enumLiteralsSubtypeReduction.ts | 34 E32, enumerator
1062 return [ E.E32, E.E33]
|
| /third_party/typescript/tests/baselines/reference/ |
| D | enumLiteralsSubtypeReduction.types | 101 E32,
102 >E32 : E.E32
3279 return [ E.E32, E.E33]
3280 >[ E.E32, E.E33] : E[]
3281 >E.E32 : E.E32
3283 >E32 : E.E32
|
| D | enumLiteralsSubtypeReduction.js | 35 E32,
1063 return [ E.E32, E.E33]
3121 return [E.E32, E.E33];
|
| D | enumLiteralsSubtypeReduction.symbols | 101 E32,
102 >E32 : Symbol(E.E32, Decl(enumLiteralsSubtypeReduction.ts, 32, 8))
3229 return [ E.E32, E.E33]
3230 >E.E32 : Symbol(E.E32, Decl(enumLiteralsSubtypeReduction.ts, 32, 8))
3232 >E32 : Symbol(E.E32, Decl(enumLiteralsSubtypeReduction.ts, 32, 8))
|
| /third_party/skia/third_party/externals/icu/source/data/unidata/norm2/ |
| D | nfc.txt | 847 1E32=004B 0323
1386 F905>4E32
|
| D | nfkc_cf.txt | 569 0E33>0E4D 0E32
820 1E32>1E33
2556 F905>4E32
|
| /third_party/icu/icu4c/source/data/unidata/norm2/ |
| D | nfc.txt | 870 1E32=004B 0323
1409 F905>4E32
|
| D | nfkc_cf.txt | 569 0E33>0E4D 0E32
820 1E32>1E33
2564 F905>4E32
|
| /third_party/icu/icu4c/source/data/unidata/ |
| D | DerivedCoreProperties.txt | 532 0E32..0E33 ; Alphabetic
2408 1E32 ; Uppercase
3753 1E32 ; Changes_When_Lowercased
5653 1E32 ; Changes_When_Casefolded
6275 0E32..0E33 ; ID_Start
7179 0E32..0E33 ; ID_Continue
8380 0E32 ; XID_Start
9284 0E32..0E33 ; XID_Continue
11083 0E32..0E33 ; Grapheme_Base
|
| /third_party/skia/third_party/externals/icu/source/data/unidata/ |
| D | DerivedCoreProperties.txt | 527 0E32..0E33 ; Alphabetic
2331 1E32 ; Uppercase
3618 1E32 ; Changes_When_Lowercased
5494 1E32 ; Changes_When_Casefolded
6098 0E32..0E33 ; ID_Start
6957 0E32..0E33 ; ID_Continue
8090 0E32 ; XID_Start
8949 0E32..0E33 ; XID_Continue
10658 0E32..0E33 ; Grapheme_Base
|
| /third_party/python/Tools/unicode/python-mappings/ |
| D | jisx0213-2004-std.txt | 1262 3-2E32 U+4F6A # <cjk> [2000]
2086 3-367A U+4E32 # <cjk>
2766 3-3E32 U+5E8A # <cjk>
4270 3-4E32 U+786B # <cjk>
5774 3-5E32 U+6D93 # <cjk>
6478 3-6560 U+7E32 # <cjk>
7278 3-6E32 U+9081 # <cjk>
8782 3-7E32 U+9A4A # <cjk> [2000]
9534 4-2E32 U+3B1A # <cjk> [2000]
9722 4-6E32 U+6C36 # <cjk> [2000]
[all …]
|
| /third_party/node/deps/v8/src/codegen/riscv64/ |
| D | macro-assembler-riscv64.cc | 2110 VU.set(scratch, std::is_same<F, float>::value ? E32 : E64, m1); in RoundHelper()
4007 VU.set(kScratchReg, E32, m1); in LoadLane()
4035 VU.set(kScratchReg, E32, m1); in StoreLane()
|
| D | constants-riscv64.h | 1267 V(E32) \
|
| /third_party/rust/crates/minimal-lexical/etc/correctness/test-parse-golang/parse-number-fxx-test-data/data/ |
| D | freetype-2-7.txt | 41 0000 00000000 0000000000000000 0E32
3488 7C00 749DC5AE 4693B8B5B5056E17 1E32
|
| /third_party/icu/icu4c/source/test/testdata/ |
| D | nfs4_cis_prep.txt | 922 1E32; 1E33; MAP
|
| D | nfs4_cs_prep_ci.txt | 922 1E32; 1E33; MAP
|
| /third_party/skia/third_party/externals/icu/source/data/sprep/ |
| D | rfc3920node.txt | 932 1E32; 1E33; MAP
|
| D | rfc3722.txt | 932 1E32; 1E33; MAP
|
| /third_party/icu/icu4c/source/data/sprep/ |
| D | rfc3491.txt | 932 1E32; 1E33; MAP
|