Searched refs:OP_FMA (Results 1 – 14 of 14) sorted by relevance
/third_party/mesa3d/src/nouveau/codegen/ |
D | nv50_ir_target_nvc0.cpp | 108 { OP_FMA, 0x7, 0x0, 0x0, 0x8, 0x6, 0x2 }, // keep the same as OP_MAD 198 OP_ADD, OP_MUL, OP_MAD, OP_FMA, OP_AND, OP_OR, OP_XOR, OP_MAX, OP_MIN, in initOpInfo() 204 OP_ADD, OP_MUL, OP_MAD, OP_FMA, OP_AND, OP_OR, OP_XOR, OP_MAX, OP_MIN in initOpInfo() 624 case OP_FMA: in getThroughput()
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D | nv50_ir_target_gv100.cpp | 35 OP_ADD, OP_MUL, OP_MAD, OP_FMA, OP_MAX, OP_MIN, in initOpInfo() 279 case OP_FMA: in getOpInfo() 416 case OP_FMA: in isSatSupported() 442 if (op == OP_MAD || op == OP_FMA) in isOpSupported()
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D | nv50_ir_target_gm107.cpp | 216 case OP_FMA: in getLatency()
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D | nv50_ir_peephole.cpp | 578 case OP_FMA: in expr() 755 case OP_FMA: { in expr() 824 case OP_FMA: { in expr() 975 case OP_FMA: in opnd3() 1158 case OP_FMA: in opnd() 2553 case OP_FMA: in visit() 3654 case OP_FMA: in visit()
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D | nv50_ir_target_nv50.cpp | 116 OP_ADD, OP_MUL, OP_MAD, OP_FMA, OP_AND, OP_OR, OP_XOR, OP_MAX, OP_MIN, in initOpInfo()
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D | nv50_ir.h | 58 OP_FMA, enumerator
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D | nv50_ir_emit_gv100.cpp | 1861 case OP_FMA: in emitInstruction()
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D | nv50_ir_emit_nv50.cpp | 1992 case OP_FMA: in emitInstruction()
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D | nv50_ir_emit_gk110.cpp | 2568 case OP_FMA: in emitInstruction()
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D | nv50_ir_ra.cpp | 1547 if (insn->op != OP_MAD && insn->op != OP_FMA && insn->op != OP_SAD) in allocateRegisters()
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D | nv50_ir_emit_nvc0.cpp | 2744 case OP_FMA: in emitInstruction()
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D | nv50_ir_emit_gm107.cpp | 3527 case OP_FMA: in emitInstruction()
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D | nv50_ir_from_nir.cpp | 428 return OP_FMA; in getOperation()
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/third_party/mesa3d/docs/relnotes/ |
D | 22.2.0.rst | 1759 - nouveau/nir: Don't try to emit OP_FMA pre-nvc0.
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