| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsSERegisterInfo.cpp | 75 case Mips::ST_W: in getLoadStoreOffsetSizeInBits()
135 case Mips::ST_W: in getLoadStoreOffsetAlign()
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| D | MipsInstructionSelector.cpp | 239 return isStore ? Mips::ST_W : Mips::LD_W; in selectLoadStoreOpCode()
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| D | MipsSEInstrInfo.cpp | 279 Opc = Mips::ST_W; in storeRegToStack()
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| D | MipsMSAInstrInfo.td | 3505 def ST_W: ST_W_ENC, ST_W_DESC;
3573 (ST_W MSA128W:$ws, addrimm10lsl2:$addr)>;
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| /third_party/skia/third_party/externals/libwebp/src/dsp/ |
| D | msa_macro.h | 68 #define ST_W(RTYPE, in, pdst) *((RTYPE*)(pdst)) = in macro
69 #define ST_UW(...) ST_W(v4u32, __VA_ARGS__)
70 #define ST_SW(...) ST_W(v4i32, __VA_ARGS__)
325 ST_W(RTYPE, in0, pdst); \
326 ST_W(RTYPE, in1, pdst + stride); \
333 ST_W(RTYPE, in2, pdst + 2 * stride); \
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| /third_party/node/deps/v8/src/codegen/loong64/ |
| D | constants-loong64.h | 287 ST_W = 0xa6U << 22, enumerator
1014 case ST_W: in InstructionType()
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| D | assembler-loong64.cc | 1420 GenImm(ST_W, si12, rj, rd, 12); in st_w()
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| /third_party/node/deps/v8/src/diagnostics/loong64/ |
| D | disasm-loong64.cc | 773 case ST_W: in DecodeTypekOp10()
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| /third_party/node/deps/v8/src/codegen/mips/ |
| D | constants-mips.h | 763 ST_W = ((9U << 2) + 2), enumerator
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| D | assembler-mips.cc | 2979 V(st_w, ST_W) \
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| /third_party/node/deps/v8/src/codegen/mips64/ |
| D | constants-mips64.h | 812 ST_W = ((9U << 2) + 2), enumerator
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| D | assembler-mips64.cc | 3185 V(st_w, ST_W, 4) \
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/Disassembler/ |
| D | MipsDisassembler.cpp | 1738 case Mips::ST_W: in DecodeMSA128Mem()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
| D | MipsGenMCCodeEmitter.inc | 2548 UINT64_C(2013265958), // ST_W
2992 case Mips::ST_W: {
12010 CEFBS_HasStdEnc_HasMSA, // ST_W = 2535
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| D | MipsGenAsmWriter.inc | 3776 25191632U, // ST_W
6530 0U, // ST_W
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| D | MipsGenDAGISel.inc | 489 /* 787*/ OPC_MorphNodeTo0, TARGET_VAL(Mips::ST_W), 0|OPFL_Chain|OPFL_MemRefs,
492 // Dst: (ST_W MSA128WOpnd:{ *:[v4i32] }:$wd, addrimm10lsl2:{ *:[iPTR] }:$addr)
525 /* 853*/ OPC_MorphNodeTo0, TARGET_VAL(Mips::ST_W), 0|OPFL_Chain|OPFL_MemRefs,
528 // Dst: (ST_W MSA128W:{ *:[v4f32] }:$ws, addrimm10lsl2:{ *:[iPTR] }:$addr)
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| D | MipsGenInstrInfo.inc | 2550 ST_W = 2535,
7396 …LL<<MCID::MayStore), 0x6ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #2535 = ST_W
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| D | MipsGenDisassemblerTables.inc | 5518 /* 13476 */ MCD::OPC_Decode, 231, 19, 178, 2, // Opcode: ST_W
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| D | MipsGenAsmMatcher.inc | 7829 …{ 8835 /* st.w */, Mips::ST_W, Convert__MSA128AsmReg1_0__MemOffsetSimm10_22_1, AMFBS_HasStdEnc_Has…
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| /third_party/node/deps/v8/src/execution/loong64/ |
| D | simulator-loong64.cc | 2926 case ST_W: in DecodeTypeOp10()
|