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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MC/
DMCRegisterInfo.cpp38 for (MCSubRegIterator Subs(Reg, this); Subs.isValid(); ++Subs, ++SRI) in getSubReg() local
40 return *Subs; in getSubReg()
50 for (MCSubRegIterator Subs(Reg, this); Subs.isValid(); ++Subs, ++SRI) in getSubRegIndex() local
51 if (*Subs == SubReg) in getSubRegIndex()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/lib/Support/
DCommandLine.cpp149 if (Opt.Subs.empty()) in addLiteralOption()
152 for (auto SC : Opt.Subs) in addLiteralOption()
200 if (O->Subs.empty()) { in addOption()
203 for (auto SC : O->Subs) in addOption()
238 if (O->Subs.empty()) in removeOption()
245 for (auto SC : O->Subs) in removeOption()
277 if (O->Subs.empty()) in updateArgStr()
280 for (auto SC : O->Subs) in updateArgStr()
1740 SmallVectorImpl<std::pair<const char *, SubCommand *>> &Subs) { in sortSubCommands() argument
1744 Subs.push_back(std::make_pair(S->getName().data(), S)); in sortSubCommands()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Support/
DCommandLine.cpp199 if (Opt.Subs.empty()) in addLiteralOption()
202 for (auto SC : Opt.Subs) in addLiteralOption()
260 if (O->Subs.empty()) { in addOption()
263 for (auto SC : O->Subs) in addOption()
302 if (O->Subs.empty()) in removeOption()
309 for (auto SC : O->Subs) in removeOption()
341 if (O->Subs.empty()) in updateArgStr()
348 for (auto SC : O->Subs) in updateArgStr()
2114 SmallVectorImpl<std::pair<const char *, SubCommand *>> &Subs) { in sortSubCommands() argument
2118 Subs.push_back(std::make_pair(S->getName().data(), S)); in sortSubCommands()
[all …]
/third_party/vixl/examples/aarch32/
Dmandelbrot.cc131 __ Subs(r1, r1, 1); in GenerateMandelBrot() local
175 __ Subs(r5, r5, 1); in GenerateMandelBrot() local
188 __ Subs(r4, r4, 1); in GenerateMandelBrot() local
Dpi.cc73 __ Subs(r0, r0, 1); in GenerateApproximatePi() local
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Instrumentation/
DControlHeightReduction.cpp226 for (CHRScope *Sub : Next->Subs) in append()
227 Subs.push_back(Sub); in append()
240 Subs.push_back(SubIn); in addSub()
262 for (auto It = Subs.begin(); It != Subs.end(); ) { in split()
268 It = Subs.erase(It); in split()
293 SmallVector<CHRScope *, 8> Subs; // Subscopes. member in __anon5014868f0211::CHRScope
319 : RegInfos(RegInfosIn), Subs(SubsIn), BranchInsertPoint(nullptr) {} in CHRScope()
490 for (CHRScope *Sub : Subs) { in print()
1133 for (CHRScope *Sub : Scope->Subs) in getSelectsInScope()
1255 for (CHRScope *Sub : Split->Subs) { in splitScope()
[all …]
/third_party/rust/crates/memchr/bench/data/opensubtitles/
Dru-huge.txt8588 Subs by linyok
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Demangle/
DItaniumDemangle.h2302 PODSmallVector<Node *, 32> Subs; member
2356 Subs.clear(); in reset()
2539 Subs.push_back(N); in parseName()
3136 Subs.push_back(SoFar); in parseNestedName()
3149 Subs.push_back(SoFar); in parseNestedName()
3157 Subs.push_back(SoFar); in parseNestedName()
3167 Subs.push_back(S); in parseNestedName()
3180 Subs.push_back(SoFar); in parseNestedName()
3187 Subs.push_back(SoFar); in parseNestedName()
3190 if (SoFar == nullptr || Subs.empty()) in parseNestedName()
[all …]
/third_party/node/deps/v8/src/baseline/arm64/
Dbaseline-compiler-arm64-inl.h100 __ masm()->Subs(scratch, scratch, 1); in PrologueFillFrame()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/
DCommandLine.h291 SmallPtrSet<SubCommand *, 1> Subs; // The subcommands this option belongs to. variable
324 return any_of(Subs, [](const SubCommand *SC) { in isInAllSubCommands()
342 void addSubCommand(SubCommand &S) { Subs.insert(&S); } in addSubCommand()
1887 if (!Subs.empty())
1889 Subs = AliasFor->Subs;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/include/llvm/Support/
DCommandLine.h260 SmallPtrSet<SubCommand *, 4> Subs; // The subcommands this option belongs to. variable
293 return any_of(Subs, [](const SubCommand *SC) { in isInAllSubCommands()
311 void addSubCommand(SubCommand &S) { Subs.insert(&S); } in addSubCommand()
1676 Subs = AliasFor->Subs;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DModuloSchedule.cpp1596 SmallVector<std::pair<MachineInstr *, Register>, 4> Subs; in filterInstructions() local
1603 Subs.emplace_back(&UseMI, Reg); in filterInstructions()
1605 for (auto &Sub : Subs) in filterInstructions()
1906 SmallVector<std::pair<MachineInstr *, Register>, 4> Subs; in rewriteUsesOf() local
1913 Subs.emplace_back(&UseMI, Reg); in rewriteUsesOf()
1915 for (auto &Sub : Subs) in rewriteUsesOf()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/IR/
DDebugInfo.cpp992 auto Subs = unwrap(Builder)->getOrCreateArray({unwrap(Subscripts), in LLVMDIBuilderCreateArrayType() local
995 unwrapDI<DIType>(Ty), Subs)); in LLVMDIBuilderCreateArrayType()
1003 auto Subs = unwrap(Builder)->getOrCreateArray({unwrap(Subscripts), in LLVMDIBuilderCreateVectorType() local
1006 unwrapDI<DIType>(Ty), Subs)); in LLVMDIBuilderCreateVectorType()
/third_party/node/deps/v8/src/codegen/arm64/
Dmacro-assembler-arm64-inl.h147 void TurboAssembler::Subs(const Register& rd, const Register& rn, in Subs() function
165 Subs(AppropriateZeroRegFor(rn), rn, operand); in Cmp()
188 Subs(rd, AppropriateZeroRegFor(rd), operand); in Negs()
Dmacro-assembler-arm64.cc1154 Subs(temp, count, 4); in PushMultipleTimes()
1159 Subs(temp, temp, 4); in PushMultipleTimes()
1372 Subs(pointer1, pointer1, pointer2); in CopyDoubleWords()
2322 Subs(extra_argument_count, formal_parameter_count, actual_argument_count); in InvokePrologue()
2381 Subs(count, count, 1); in InvokePrologue()
/third_party/vixl/src/aarch64/
Dmacro-assembler-aarch64.cc1523 void MacroAssembler::Subs(const Register& rd, in Emit() function in vixl::aarch64::MacroAssembler
1538 Subs(AppropriateZeroRegFor(rn), rn, operand); in Emit()
1695 Subs(rd, AppropriateZeroRegFor(rd), operand); in Emit()
/third_party/vixl/test/aarch32/
Dtest-simulator-cond-rd-rn-operand-rm-t32.cc135 M(Subs) \
Dtest-simulator-cond-rd-rn-operand-rm-a32.cc135 M(Subs) \
Dtest-simulator-cond-rdlow-rnlow-operand-immediate-t32.cc121 M(Subs)
Dtest-simulator-cond-rd-rn-operand-const-a32.cc135 M(Subs)
Dtest-simulator-cond-rd-rn-operand-const-t32.cc135 M(Subs)
Dtest-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-t32.cc135 M(Subs)
Dtest-simulator-cond-rd-rn-operand-rm-shift-amount-1to31-a32.cc135 M(Subs)
Dtest-simulator-cond-rd-rn-operand-rm-shift-amount-1to32-t32.cc135 M(Subs)
Dtest-simulator-cond-rd-rn-operand-rm-shift-amount-1to32-a32.cc135 M(Subs)

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