| /third_party/skia/third_party/externals/sfntly/java/src/com/google/typography/font/sfntly/table/opentype/ |
| D | LanguageTag.java | 376 TNE("Tundra Nenets", "enh"), enumConstant
|
| /third_party/node/deps/v8/src/codegen/mips/ |
| D | constants-mips.h | 553 TNE = ((6U << 3) + 6), enumerator
1293 FunctionFieldToBitNumber(TEQ) | FunctionFieldToBitNumber(TNE) |
1846 case TNE: in IsTrap()
|
| D | assembler-mips.cc | 2276 SPECIAL | TNE | rs.code() << kRsShift | rt.code() << kRtShift | code << 6; in tne()
|
| /third_party/node/deps/v8/src/codegen/mips64/ |
| D | constants-mips64.h | 564 TNE = ((6U << 3) + 6), enumerator
1355 FunctionFieldToBitNumber(TEQ) | FunctionFieldToBitNumber(TNE) |
1943 case TNE: in IsTrap()
|
| D | assembler-mips64.cc | 2415 SPECIAL | TNE | rs.code() << kRsShift | rt.code() << kRtShift | code << 6; in tne()
|
| /third_party/node/deps/v8/src/diagnostics/mips/ |
| D | disasm-mips.cc | 451 case TNE: { in PrintCode()
1400 case TNE: in DecodeTypeRegisterSPECIAL()
|
| /third_party/node/deps/v8/src/diagnostics/mips64/ |
| D | disasm-mips64.cc | 492 case TNE: { in PrintCode()
1632 case TNE: in DecodeTypeRegisterSPECIAL()
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsScheduleP5600.td | 79 TGEU, TLT, TLTI, TLTU, TNE, TNEI, TRAP,
|
| D | MipsScheduleGeneric.td | 306 TGE, TGEI, TGEIU, TGEU, TNE,
|
| D | MipsInstrInfo.td | 2168 def TNE : MMRel, TEQ_FT<"tne", GPR32Opnd, uimm10, II_TNE>, TEQ_FM<0x36>,
2817 (TNE GPR32Opnd:$rs, GPR32Opnd:$rt, 0), 1>, ISA_MIPS2;
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
| D | MipsGenAsmWriter.inc | 3944 268456137U, // TNE
6698 38U, // TNE
7304 // TEQ, TGE, TGEU, TLT, TLTU, TNE
7756 {Mips::TNE, 198, 1 },
8151 // Mips::TNE - 198
8864 // (TNE GPR32Opnd:$rs, GPR32Opnd:$rt, 0) - 500
|
| D | MipsGenSubtargetInfo.inc | 655 {DBGFIELD("TNE") 1, false, false, 3, 2, 1, 1, 0, 0}, // #395
2339 {DBGFIELD("TNE") 1, false, false, 37, 3, 1, 1, 0, 0}, // #395
|
| D | MipsGenMCCodeEmitter.inc | 2716 UINT64_C(54), // TNE
6010 case Mips::TNE: {
12178 CEFBS_HasStdEnc_HasMips2_NotInMicroMips, // TNE = 2703
|
| D | MipsGenInstrInfo.inc | 2718 TNE = 2703,
3175 TNE = 395,
7564 …nmodeledSideEffects), 0x12ULL, nullptr, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #2703 = TNE
16941 { Mips::TNE, Mips::TNE, Mips::TNE_MM },
|
| D | MipsGenAsmMatcher.inc | 8015 …{ 9469 /* tne */, Mips::TNE, Convert__GPR32AsmReg1_0__GPR32AsmReg1_1__imm_95_0, AMFBS_HasStdEnc_Ha…
8018 …{ 9469 /* tne */, Mips::TNE, Convert__GPR32AsmReg1_0__GPR32AsmReg1_1__ConstantUImm10_01_2, AMFBS_H…
|
| D | MipsGenDisassemblerTables.inc | 3071 /* 1128 */ MCD::OPC_Decode, 143, 21, 185, 1, // Opcode: TNE
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/AsmParser/ |
| D | MipsAsmParser.cpp | 5090 TOut.emitRRI(Mips::TNE, DstReg, ATReg, 6, IDLoc, STI); in expandMulO()
5127 TOut.emitRRI(Mips::TNE, ATReg, Mips::ZERO, 6, IDLoc, STI); in expandMulOU()
|
| /third_party/node/deps/v8/src/execution/mips/ |
| D | simulator-mips.cc | 4060 case TNE: in DecodeTypeRegisterSPECIAL()
|
| /third_party/node/deps/v8/src/execution/mips64/ |
| D | simulator-mips64.cc | 4160 case TNE: in DecodeTypeRegisterSPECIAL()
|