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Searched refs:ctx_cs (Results 1 – 3 of 3) sorted by relevance

/third_party/mesa3d/src/amd/vulkan/
Dradv_pipeline.c5524 radv_pipeline_emit_depth_stencil_state(struct radeon_cmdbuf *ctx_cs, in radv_pipeline_emit_depth_stencil_state() argument
5527 radeon_set_context_reg(ctx_cs, R_028000_DB_RENDER_CONTROL, ds_state->db_render_control); in radv_pipeline_emit_depth_stencil_state()
5529 radeon_set_context_reg_seq(ctx_cs, R_02800C_DB_RENDER_OVERRIDE, 2); in radv_pipeline_emit_depth_stencil_state()
5530 radeon_emit(ctx_cs, ds_state->db_render_override); in radv_pipeline_emit_depth_stencil_state()
5531 radeon_emit(ctx_cs, ds_state->db_render_override2); in radv_pipeline_emit_depth_stencil_state()
5535 radv_pipeline_emit_blend_state(struct radeon_cmdbuf *ctx_cs, in radv_pipeline_emit_blend_state() argument
5541 radeon_set_context_reg_seq(ctx_cs, R_028780_CB_BLEND0_CONTROL, 8); in radv_pipeline_emit_blend_state()
5542 radeon_emit_array(ctx_cs, blend->cb_blend_control, 8); in radv_pipeline_emit_blend_state()
5543 radeon_set_context_reg(ctx_cs, R_028B70_DB_ALPHA_TO_MASK, blend->db_alpha_to_mask); in radv_pipeline_emit_blend_state()
5547 radeon_set_context_reg_seq(ctx_cs, R_028760_SX_MRT0_BLEND_OPT, 8); in radv_pipeline_emit_blend_state()
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Dradv_cmd_buffer.c1587 cmd_buffer->state.emitted_graphics_pipeline->base.ctx_cs.cdw != pipeline->base.ctx_cs.cdw || in radv_emit_graphics_pipeline()
1589 … memcmp(cmd_buffer->state.emitted_graphics_pipeline->base.ctx_cs.buf, pipeline->base.ctx_cs.buf, in radv_emit_graphics_pipeline()
1590 pipeline->base.ctx_cs.cdw * 4)) { in radv_emit_graphics_pipeline()
1591 radeon_emit_array(cmd_buffer->cs, pipeline->base.ctx_cs.buf, pipeline->base.ctx_cs.cdw); in radv_emit_graphics_pipeline()
5495 assert(!pipeline->base.ctx_cs.cdw); in radv_emit_compute_pipeline()
Dradv_private.h2120 struct radeon_cmdbuf ctx_cs; member