| /third_party/mesa3d/src/compiler/nir/ |
| D | nir_lower_alu.c | 45 nir_ssa_def *lowered = NULL; in lower_alu_instr() local
69 lowered = nir_ssa_for_alu_src(b, instr, 0); in lower_alu_instr()
72 lowered = nir_ior(b, in lower_alu_instr()
73 nir_iand(b, nir_ushr(b, lowered, c1), c55555555), in lower_alu_instr()
74 nir_ishl(b, nir_iand(b, lowered, c55555555), c1)); in lower_alu_instr()
77 lowered = nir_ior(b, in lower_alu_instr()
78 nir_iand(b, nir_ushr(b, lowered, c2), c33333333), in lower_alu_instr()
79 nir_ishl(b, nir_iand(b, lowered, c33333333), c2)); in lower_alu_instr()
82 lowered = nir_ior(b, in lower_alu_instr()
83 nir_iand(b, nir_ushr(b, lowered, c4), c0f0f0f0f), in lower_alu_instr()
[all …]
|
| D | nir_lower_single_sampled.c | 37 nir_ssa_def *lowered; in lower_single_sampled_instr() local
41 lowered = nir_imm_int(b, 0); in lower_single_sampled_instr()
46 lowered = nir_imm_vec2(b, 0.5, 0.5); in lower_single_sampled_instr()
57 lowered = nir_b2i32(b, nir_inot(b, nir_load_helper_invocation(b, 1))); in lower_single_sampled_instr()
64 lowered = nir_load_deref(b, nir_src_as_deref(intrin->src[0])); in lower_single_sampled_instr()
71 lowered = nir_load_barycentric(b, nir_intrinsic_load_barycentric_pixel, in lower_single_sampled_instr()
87 nir_ssa_def_rewrite_uses(&intrin->dest.ssa, lowered); in lower_single_sampled_instr()
|
| D | nir_lower_bit_size.c | 297 nir_phi_instr *lowered[2] = { in split_phi() local
312 nir_phi_instr_add_src(lowered[0], src->pred, nir_src_for_ssa(x)); in split_phi()
313 nir_phi_instr_add_src(lowered[1], src->pred, nir_src_for_ssa(y)); in split_phi()
316 nir_ssa_dest_init(&lowered[0]->instr, &lowered[0]->dest, in split_phi()
318 nir_ssa_dest_init(&lowered[1]->instr, &lowered[1]->dest, in split_phi()
322 nir_builder_instr_insert(b, &lowered[0]->instr); in split_phi()
323 nir_builder_instr_insert(b, &lowered[1]->instr); in split_phi()
326 nir_ssa_def *merged = nir_pack_64_2x32_split(b, &lowered[0]->dest.ssa, &lowered[1]->dest.ssa); in split_phi()
|
| D | README | 13 (and later, from an AST), but for the most part, they will be lowered to
98 has a sampler dereference field used just like in GLSL IR, this gets lowered to
|
| /third_party/mesa3d/src/nouveau/codegen/ |
| D | nv50_ir_lowering_gv100.cpp | 249 bool lowered = false; in visit() local
261 lowered = handleLOP2(i); in visit()
264 lowered = handleNOT(i); in visit()
268 lowered = handleShift(i); in visit()
275 lowered = handleSET(i); in visit()
278 lowered = handleCMP(i); in visit()
281 lowered = handlePREEX2(i); in visit()
285 lowered = handleIMUL(i); in visit()
289 lowered = handleIMAD_HIGH(i); in visit()
292 lowered = handleSHFL(i); in visit()
[all …]
|
| /third_party/node/deps/v8/src/torque/ |
| D | cc-generator.cc | 135 const auto lowered = LowerType(return_type); in EmitInstruction() local
136 for (std::size_t i = 0; i < lowered.size(); ++i) { in EmitInstruction()
140 << (is_cc_debug_ ? lowered[i]->GetDebugType() in EmitInstruction()
141 : lowered[i]->GetRuntimeType()) in EmitInstruction()
218 const auto lowered = LowerType(return_type); in EmitInstruction() local
219 for (std::size_t i = 0; i < lowered.size(); ++i) { in EmitInstruction()
223 << (is_cc_debug_ ? lowered[i]->GetDebugType() in EmitInstruction()
224 : lowered[i]->GetRuntimeType()) in EmitInstruction()
|
| D | csa-generator.cc | 130 const auto lowered = LowerType(type); in EmitInstruction() local
131 for (std::size_t i = 0; i < lowered.size(); ++i) { in EmitInstruction()
134 decls() << " TNode<" << lowered[i]->GetGeneratedTNodeTypeName() << "> " in EmitInstruction()
187 const auto lowered = LowerType(return_type); in EmitInstruction() local
188 for (std::size_t i = 0; i < lowered.size(); ++i) { in EmitInstruction()
191 decls() << " TNode<" << lowered[i]->GetGeneratedTNodeTypeName() << "> " in EmitInstruction()
323 const auto lowered = LowerType(return_type); in EmitInstruction() local
324 for (std::size_t i = 0; i < lowered.size(); ++i) { in EmitInstruction()
327 decls() << " TNode<" << lowered[i]->GetGeneratedTNodeTypeName() << "> " in EmitInstruction()
376 const auto lowered = LowerType(return_type); in EmitInstruction() local
[all …]
|
| /third_party/elfutils/libdwfl/ |
| D | linux-pid-attach.c | 227 bool lowered = (addr & 4) != 0; in pid_memory_read() local
228 if (lowered) in pid_memory_read()
237 if (! lowered) in pid_memory_read()
240 if (lowered) in pid_memory_read()
|
| /third_party/mesa3d/src/freedreno/ir3/ |
| D | ir3_nir_lower_64b.c | 191 nir_ssa_def *lowered = nir_ssa_undef(b, 2, 32); in lower_64b_undef() local
194 nir_channel(b, lowered, 0), in lower_64b_undef()
195 nir_channel(b, lowered, 1)); in lower_64b_undef()
|
| /third_party/mesa3d/src/compiler/glsl/ |
| D | lower_jumps.cpp | 578 ir_loop_jump* lowered = 0; in visit() local
579 lowered = new(ir) ir_loop_jump(ir_loop_jump::jump_break); in visit()
585 jumps[lower]->replace_with(lowered); in visit()
586 jumps[lower] = lowered; in visit()
|
| /third_party/skia/third_party/externals/spirv-cross/shaders-msl-no-opt/packing/ |
| D | struct-alignment.comp | 14 // <- We expect 4 bytes of padding here since MSL alignment of Foo must be lowered to 4.
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsCallingConv.td | 23 /// For example, this is true for i32's that were lowered from soft-float.
190 // legal and is lowered to i128 which is further lowered to a pair of i64's.
327 // f128 is not legal and is lowered to i128 which is further lowered to a pair
|
| D | Relocation.txt | 31 2. Generic address nodes are lowered to some combination of target
|
| D | MSA.txt | 4 Intrinsics are lowered to SelectionDAG nodes where possible in order to enable
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| D | LanaiCallingConv.td | 45 // been lowered to 2 32-bit values.
|
| /third_party/mesa3d/docs/relnotes/ |
| D | 22.2.1.rst | 164 - st/bitmap: use normalized coords in samplers with lowered rects
165 - st/drawpixels: use normalized coords in samplers with lowered rects
|
| D | 21.3.2.rst | 92 - nir/lower_io: include the variable access in the lowered intrinsic
|
| D | 22.1.2.rst | 80 - nouveau/nv30: Make sure fsat is lowered in the VS.
|
| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| D | IceInstX86.def | 10 // This file defines properties of lowered x86 instructions in the
|
| D | IceInstX8632.def | 10 // This file defines properties of lowered x86-32 instructions in the
|
| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/docs/ |
| D | REGALLOC.rst | 44 which case the lowering is relatively simple. But if the lowered instruction
47 temporary in the lowered instruction.
311 lowered assignments, and can lead to worse register allocation decisions. As a
324 are prevented from having the same register. Swapping the order of lowered
330 pass limited to the new lowered assignments.
|
| /third_party/mesa3d/src/microsoft/compiler/ |
| D | dxil_nir.c | 1077 nir_phi_instr *lowered = nir_phi_instr_create(b->shader); in cast_phi() local
1095 nir_phi_instr_add_src(lowered, src->pred, nir_src_for_ssa(cast)); in cast_phi()
1098 nir_ssa_dest_init(&lowered->instr, &lowered->dest, in cast_phi()
1102 nir_builder_instr_insert(b, &lowered->instr); in cast_phi()
1105 nir_ssa_def *result = nir_build_alu(b, downcast_op, &lowered->dest.ssa, NULL, NULL, NULL); in cast_phi()
|
| /third_party/mbedtls/tests/suites/ |
| D | test_suite_net.function | 98 * opened before the limit was lowered (which is something an application
|
| /third_party/python/Doc/library/ |
| D | resource.rst | 35 limit. The soft limit is the current limit, and may be lowered or raised by a
37 limit can be lowered to any value greater than the soft limit, but not raised.
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | README-SSE.txt | 7 SSE Variable shift can be custom lowered to something like this, which uses a
89 Currently, the select is being lowered, which prevents the dag combiner from
479 Note: this is not a code quality issue; the custom lowered code happens to be
|