Searched refs:nir_address_format_vec2_index_32bit_offset (Results 1 – 6 of 6) sorted by relevance
| /third_party/mesa3d/src/imagination/rogue/ |
| D | rogue_nir.c | 43 .ubo_addr_format = nir_address_format_vec2_index_32bit_offset,
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| /third_party/mesa3d/src/compiler/nir/ |
| D | nir_lower_io.c | 874 case nir_address_format_vec2_index_32bit_offset: in build_addr_iadd()
1046 case nir_address_format_vec2_index_32bit_offset: return 32; in nir_address_format_bit_size()
1066 case nir_address_format_vec2_index_32bit_offset: return 3; in nir_address_format_num_components()
1085 case nir_address_format_vec2_index_32bit_offset: in addr_to_index()
1102 case nir_address_format_vec2_index_32bit_offset: in addr_to_offset()
1164 case nir_address_format_vec2_index_32bit_offset: in addr_to_global()
1246 case nir_address_format_vec2_index_32bit_offset: in nir_get_explicit_deref_range()
2742 [nir_address_format_vec2_index_32bit_offset] = {{.u32 = ~0}, {.u32 = ~0}, {.u32 = ~0}}, in nir_address_format_null_value()
2763 case nir_address_format_vec2_index_32bit_offset: in nir_build_addr_ieq()
2821 case nir_address_format_vec2_index_32bit_offset: in nir_build_addr_isub()
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| D | nir.h | 4716 nir_address_format_vec2_index_32bit_offset, enumerator
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| /third_party/mesa3d/src/freedreno/vulkan/ |
| D | tu_shader.c | 28 .ubo_addr_format = nir_address_format_vec2_index_32bit_offset, in tu_spirv_to_nir()
29 .ssbo_addr_format = nir_address_format_vec2_index_32bit_offset, in tu_spirv_to_nir()
778 nir_address_format_vec2_index_32bit_offset); in tu_shader_create()
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| /third_party/mesa3d/src/amd/vulkan/ |
| D | radv_shader.c | 777 .ubo_addr_format = nir_address_format_vec2_index_32bit_offset, in radv_shader_spirv_to_nir()
778 .ssbo_addr_format = nir_address_format_vec2_index_32bit_offset, in radv_shader_spirv_to_nir()
1006 nir_address_format_vec2_index_32bit_offset); in radv_shader_spirv_to_nir()
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| /third_party/mesa3d/docs/relnotes/ |
| D | 21.2.0.rst | 4411 - radv,aco: use nir_address_format_vec2_index_32bit_offset
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