| /third_party/mesa3d/src/gallium/auxiliary/tgsi/ |
| D | tgsi_util.c | 112 unsigned src_idx, in tgsi_util_get_src_usage_mask() argument
163 if (src_idx == 0) in tgsi_util_get_src_usage_mask()
207 if (src_idx == 0) in tgsi_util_get_src_usage_mask()
214 if (src_idx == 0) { in tgsi_util_get_src_usage_mask()
224 if (src_idx == 0) in tgsi_util_get_src_usage_mask()
268 switch (src_idx) { in tgsi_util_get_src_usage_mask()
304 if (src_idx == 0) { in tgsi_util_get_src_usage_mask()
313 if (src_idx == 0) { in tgsi_util_get_src_usage_mask()
332 if (src_idx == 0) { in tgsi_util_get_src_usage_mask()
334 } else if (src_idx == 1) { in tgsi_util_get_src_usage_mask()
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| D | tgsi_info.c | 251 tgsi_opcode_infer_src_type(enum tgsi_opcode opcode, uint src_idx) in tgsi_opcode_infer_src_type() argument
253 if (src_idx == 1 && in tgsi_opcode_infer_src_type()
257 if (src_idx == 1 && in tgsi_opcode_infer_src_type()
261 if (src_idx == 0 && in tgsi_opcode_infer_src_type()
265 if (src_idx == 1 && in tgsi_opcode_infer_src_type()
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| D | tgsi_util.h | 63 unsigned src_idx);
70 unsigned src_idx,
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| D | tgsi_info.h | 114 tgsi_opcode_infer_src_type(enum tgsi_opcode opcode, uint src_idx);
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| /third_party/mesa3d/src/broadcom/compiler/ |
| D | v3d40_tex.c | 85 unsigned src_idx, in handle_tex_src() argument
97 switch (instr->src[src_idx].src_type) { in handle_tex_src()
100 s = ntq_get_src(c, instr->src[src_idx].src, 0); in handle_tex_src()
108 ntq_get_src(c, instr->src[src_idx].src, 1); in handle_tex_src()
115 ntq_get_src(c, instr->src[src_idx].src, 2); in handle_tex_src()
122 ntq_get_src(c, instr->src[src_idx].src, in handle_tex_src()
130 struct qreg src = ntq_get_src(c, instr->src[src_idx].src, 0); in handle_tex_src()
136 struct qreg src = ntq_get_src(c, instr->src[src_idx].src, 0); in handle_tex_src()
154 struct qreg src = ntq_get_src(c, instr->src[src_idx].src, 0); in handle_tex_src()
160 bool is_const_offset = nir_src_is_const(instr->src[src_idx].src); in handle_tex_src()
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| /third_party/mesa3d/src/gallium/drivers/r300/compiler/ |
| D | radeon_inline_literals.c | 96 unsigned src_idx; in rc_inline_literals() local
106 for (src_idx = 0; src_idx < info->NumSrcRegs; src_idx++) { in rc_inline_literals()
112 &inst->U.I.SrcReg[src_idx]; in rc_inline_literals()
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| D | radeon_pair_schedule.c | 326 unsigned src_idx; in calc_score_r300() local
340 for (src_idx = 0; src_idx < 4; src_idx++) { in calc_score_r300()
341 sinst->Score += sinst->Instruction->U.P.RGB.Src[src_idx].Used + in calc_score_r300()
342 sinst->Instruction->U.P.Alpha.Src[src_idx].Used; in calc_score_r300()
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| D | radeon_compiler_util.h | 79 unsigned int src_idx,
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| D | radeon_compiler_util.c | 321 unsigned int src_idx, in rc_src_reads_dst_mask() argument
327 if (src_file != dst_file || src_idx != dst_idx) { in rc_src_reads_dst_mask()
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| /third_party/mesa3d/src/intel/compiler/ |
| D | brw_fs_combine_constants.cpp | 216 const fs_inst *inst, uint32_t src_idx, in get_constant_value() argument
220 const fs_reg *src = &inst->src[src_idx]; in get_constant_value()
377 unsigned src_idx) in can_promote_src_as_imm() argument
382 if (src_idx != 0) in can_promote_src_as_imm()
391 switch (inst->src[src_idx].type) { in can_promote_src_as_imm()
394 if (representable_as_hf(inst->src[src_idx].f, &hf)) { in can_promote_src_as_imm()
395 inst->src[src_idx] = retype(brw_imm_uw(hf), BRW_REGISTER_TYPE_HF); in can_promote_src_as_imm()
402 if (representable_as_w(inst->src[src_idx].d, &w)) { in can_promote_src_as_imm()
403 inst->src[src_idx] = brw_imm_w(w); in can_promote_src_as_imm()
410 if (representable_as_uw(inst->src[src_idx].ud, &uw)) { in can_promote_src_as_imm()
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| D | brw_nir.c | 1502 unsigned src_idx; in brw_aop_for_nir_intrinsic() local
1506 src_idx = 3; in brw_aop_for_nir_intrinsic()
1509 src_idx = 2; in brw_aop_for_nir_intrinsic()
1513 src_idx = 1; in brw_aop_for_nir_intrinsic()
1519 if (nir_src_is_const(atomic->src[src_idx])) { in brw_aop_for_nir_intrinsic()
1520 int64_t add_val = nir_src_as_int(atomic->src[src_idx]); in brw_aop_for_nir_intrinsic()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyInstrBulkMemory.td | 56 BULK_I<(outs), (ins i32imm_op:$src_idx, i32imm_op:$dst_idx,
58 (outs), (ins i32imm_op:$src_idx, i32imm_op:$dst_idx),
59 [(wasm_memcpy (i32 imm:$src_idx), (i32 imm:$dst_idx),
62 "memory.copy\t$src_idx, $dst_idx, $dst, $src, $len",
63 "memory.copy\t$src_idx, $dst_idx", 0x0a>;
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| /third_party/mesa3d/src/compiler/nir/ |
| D | nir_move_vec_src_uses_to_dest.c | 145 unsigned src_idx = use_alu_src - use_alu->src; in move_vec_src_uses_to_dest_block() local
146 assert(src_idx < nir_op_infos[use_alu->op].num_inputs); in move_vec_src_uses_to_dest_block()
150 if (!nir_alu_instr_channel_used(use_alu, src_idx, j)) in move_vec_src_uses_to_dest_block()
169 if (!nir_alu_instr_channel_used(use_alu, src_idx, j)) in move_vec_src_uses_to_dest_block()
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| D | nir_lower_samplers.c | 31 nir_tex_instr *instr, unsigned src_idx) in lower_tex_src_to_offset() argument
36 nir_tex_src *src = &instr->src[src_idx]; in lower_tex_src_to_offset()
107 nir_tex_instr_remove_src(instr, src_idx); in lower_tex_src_to_offset()
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| D | nir_opt_constant_folding.c | 336 const int src_idx = nir_tex_instr_src_index(tex, src_type); in try_fold_tex_offset() local
337 if (src_idx < 0) in try_fold_tex_offset()
340 if (!nir_src_is_const(tex->src[src_idx].src)) in try_fold_tex_offset()
343 *index += nir_src_as_uint(tex->src[src_idx].src); in try_fold_tex_offset()
344 nir_tex_instr_remove_src(tex, src_idx); in try_fold_tex_offset()
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| D | nir_opt_copy_propagate.c | 88 unsigned src_idx = src - user->src; in copy_propagate_alu() local
89 assert(src_idx < nir_op_infos[user->op].num_inputs); in copy_propagate_alu()
90 unsigned num_comp = nir_ssa_alu_instr_src_components(user, src_idx); in copy_propagate_alu()
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| D | nir_range_analysis.c | 1744 unsigned src_idx = container_of(src, nir_alu_src, src) - use_alu->src; in ssa_def_bits_used() local
1780 if (src_idx == 0 && nir_src_is_const(use_alu->src[1].src)) { in ssa_def_bits_used()
1791 if (src_idx == 0 && nir_src_is_const(use_alu->src[1].src)) { in ssa_def_bits_used()
1803 if (src_idx == 1) { in ssa_def_bits_used()
1811 assert(src_idx < 2); in ssa_def_bits_used()
1812 if (nir_src_is_const(use_alu->src[1 - src_idx].src)) { in ssa_def_bits_used()
1813 uint64_t u64 = nir_src_comp_as_uint(use_alu->src[1 - src_idx].src, in ssa_def_bits_used()
1814 use_alu->src[1 - src_idx].swizzle[0]); in ssa_def_bits_used()
1822 assert(src_idx < 2); in ssa_def_bits_used()
1823 if (nir_src_is_const(use_alu->src[1 - src_idx].src)) { in ssa_def_bits_used()
[all …]
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| D | nir_from_ssa.c | 722 int src_idx = -1; in resolve_parallel_copy() local
725 src_idx = i; in resolve_parallel_copy()
727 if (src_idx < 0) { in resolve_parallel_copy()
728 src_idx = num_vals++; in resolve_parallel_copy()
729 values[src_idx] = entry->src; in resolve_parallel_copy()
751 loc[src_idx] = src_idx; in resolve_parallel_copy()
752 pred[dest_idx] = src_idx; in resolve_parallel_copy()
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| D | nir_format_convert.h | 214 unsigned src_idx = 0; in nir_format_bitcast_uvec_unmasked() local
217 dst_chan[i] = nir_iand(b, nir_ushr_imm(b, nir_channel(b, src, src_idx), in nir_format_bitcast_uvec_unmasked()
222 src_idx++; in nir_format_bitcast_uvec_unmasked()
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| D | nir_builder.h | 977 int src_idx = -1; in nir_extract_bits() local
983 src_idx++; in nir_extract_bits()
984 assert(src_idx < (int) num_srcs); in nir_extract_bits()
986 src_end_bit += srcs[src_idx]->bit_size * in nir_extract_bits()
987 srcs[src_idx]->num_components; in nir_extract_bits()
992 const unsigned src_bit_size = srcs[src_idx]->bit_size; in nir_extract_bits()
994 nir_ssa_def *comp = nir_channel(b, srcs[src_idx], in nir_extract_bits()
996 if (srcs[src_idx]->bit_size > common_bit_size) { in nir_extract_bits()
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| D | nir_algebraic.py | 1050 if all(src_idx < op_worklist_index for src_idx in src_indices):
1053 srcs = tuple(rep[src_idx] for src_idx in src_indices)
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| /third_party/mesa3d/src/panfrost/midgard/ |
| D | midgard_print.c | 118 mir_print_embedded_constant(midgard_instruction *ins, unsigned src_idx) in mir_print_embedded_constant() argument
120 assert(src_idx <= 1); in mir_print_embedded_constant()
123 unsigned sz = nir_alu_type_get_type_size(ins->src_types[src_idx]); in mir_print_embedded_constant()
125 unsigned mod = mir_pack_mod(ins, src_idx, false); in mir_print_embedded_constant()
126 unsigned *swizzle = ins->swizzle[src_idx]; in mir_print_embedded_constant()
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| /third_party/mesa3d/src/gallium/drivers/r600/sfn/ |
| D | sfn_peephole.cpp | 55 void convert_to_mov(AluInstr *alu, int src_idx);
124 void PeepholeVisitor::convert_to_mov(AluInstr *alu, int src_idx) in convert_to_mov() argument
126 AluInstr::SrcValues new_src{alu->psrc(src_idx)}; in convert_to_mov()
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| /third_party/ffmpeg/libavcodec/ |
| D | hevc_filter.c | 368 int src_idx, pos; in sao_filter_CTB() local
375 src_idx = (CTB(s->sao, x_ctb-1, y_ctb-1).type_idx[c_idx] == in sao_filter_CTB()
377 copy_pixel(dst1, src1[src_idx], sh); in sao_filter_CTB()
380 src_idx = (CTB(s->sao, x_ctb, y_ctb-1).type_idx[c_idx] == in sao_filter_CTB()
382 memcpy(dst1 + pos, src1[src_idx] + pos, width << sh); in sao_filter_CTB()
385 src_idx = (CTB(s->sao, x_ctb+1, y_ctb-1).type_idx[c_idx] == in sao_filter_CTB()
387 copy_pixel(dst1 + pos, src1[src_idx] + pos, sh); in sao_filter_CTB()
395 int src_idx, pos; in sao_filter_CTB() local
402 src_idx = (CTB(s->sao, x_ctb-1, y_ctb+1).type_idx[c_idx] == in sao_filter_CTB()
404 copy_pixel(dst1, src1[src_idx], sh); in sao_filter_CTB()
[all …]
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| /third_party/mesa3d/src/freedreno/ir3/ |
| D | ir3_ra_validate.c | 380 unsigned src_idx = state->offset / reg_elem_size(state->def); in chase_definition() local
382 struct ir3_register *new_def = instr->srcs[src_idx]->def; in chase_definition()
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