| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| D | IceAssemblerMIPS32.h | 281 void srlv(const Operand *OpRd, const Operand *OpRt, const Operand *OpRs);
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| D | IceInstMIPS32.cpp | 1071 Asm->srlv(getDest(), getSrc(0), getSrc(1)); in emitIAS()
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| D | IceAssemblerMIPS32.cpp | 1048 void AssemblerMIPS32::srlv(const Operand *OpRd, const Operand *OpRt, in srlv() function in Ice::MIPS32::AssemblerMIPS32
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| /third_party/node/deps/v8/src/codegen/mips/ |
| D | macro-assembler-mips.cc | 893 srlv(rd, rs, rt.rm()); in CallRecordWriteStub()
1511 srlv(scratch1, scratch1, scratch2); in CallRecordWriteStub()
1565 srlv(dst_high, src_high, scratch3); in CallRecordWriteStub()
1569 srlv(dst_low, src_low, scratch3); in CallRecordWriteStub()
1626 srlv(dst_low, src_low, scratch3); in CallRecordWriteStub()
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| D | assembler-mips.h | 532 void srlv(Register rd, Register rt, Register rs);
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| D | assembler-mips.cc | 1903 void Assembler::srlv(Register rd, Register rt, Register rs) { in srlv() function in v8::internal::Assembler
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MicroMipsInstrInfo.td | 790 def SRLV_MM : MMRel, shift_rotate_reg<"srlv", GPR32Opnd, II_SRLV>,
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| D | MipsScheduleGeneric.td | 46 // srlv, ssnop, sub, subu, wsbh, xor, xori
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| D | Mips16InstrInfo.td | 1257 def SrlvRxRy16: FRxRxRy16_ins<0b00110, "srlv", IIM16Alu>;
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| D | MipsInstrInfo.td | 2085 def SRLV : MMRel, shift_rotate_reg<"srlv", GPR32Opnd, II_SRLV, srl>,
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| /third_party/node/deps/v8/src/codegen/mips64/ |
| D | assembler-mips64.h | 555 void srlv(Register rd, Register rt, Register rs);
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| D | assembler-mips64.cc | 1911 void Assembler::srlv(Register rd, Register rt, Register rs) { in srlv() function in v8::internal::Assembler
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| /third_party/node/deps/v8/src/builtins/mips64/ |
| D | builtins-mips64.cc | 3039 __ srlv(input_low, input_low, scratch); in Generate_DoubleToI() local
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/ |
| D | MipsGenAsmMatcher.inc | 5095 "i.b\007srlri.d\007srlri.h\007srlri.w\004srlv\005ssnop\004st.b\004st.d\004"
7820 …{ 8809 /* srlv */, Mips::SrlvRxRy16, Convert__Reg1_0__Tie0_1_1__Reg1_1, AMFBS_InMips16Mode, { MCK_…
7821 …{ 8809 /* srlv */, Mips::SRLV, Convert__GPR32AsmReg1_0__GPR32AsmReg1_1__GPR32AsmReg1_2, AMFBS_HasS…
7822 …{ 8809 /* srlv */, Mips::SRLV_MM, Convert__GPR32AsmReg1_0__GPR32AsmReg1_1__GPR32AsmReg1_2, AMFBS_I…
11324 { 8809 /* srlv */, 7 /* 0, 1, 2 */, MCK_GPR32AsmReg, AMFBS_HasStdEnc_NotInMicroMips },
11325 { 8809 /* srlv */, 7 /* 0, 1, 2 */, MCK_GPR32AsmReg, AMFBS_InMicroMips },
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| /third_party/node/deps/v8/src/builtins/mips/ |
| D | builtins-mips.cc | 2954 __ srlv(input_low, input_low, scratch); in Generate_DoubleToI() local
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| /third_party/node/deps/v8/src/compiler/backend/mips64/ |
| D | code-generator-mips64.cc | 1104 __ srlv(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); in AssembleArchInstruction() local
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| /third_party/node/deps/v8/src/compiler/backend/mips/ |
| D | code-generator-mips.cc | 1067 __ srlv(i.OutputRegister(), i.InputRegister(0), i.InputRegister(1)); in AssembleArchInstruction() local
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