| /third_party/mesa3d/src/intel/dev/ |
| D | intel_dev_info.c | 73 if (devinfo->mem.vram.mappable.size > 0 || in print_regions_info()
74 devinfo->mem.vram.unmappable.size > 0) { in print_regions_info()
78 devinfo->mem.vram.mem_class, devinfo->mem.vram.mem_instance); in print_regions_info()
81 devinfo->mem.vram.mappable.size); in print_regions_info()
83 devinfo->mem.vram.mappable.free); in print_regions_info()
84 if (devinfo->mem.vram.unmappable.size > 0) { in print_regions_info()
86 devinfo->mem.vram.unmappable.size); in print_regions_info()
88 devinfo->mem.vram.unmappable.free); in print_regions_info()
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| D | intel_device_info.c | 1630 devinfo->mem.vram.mem_class = mem->region.memory_class; in query_regions()
1631 devinfo->mem.vram.mem_instance = mem->region.memory_instance; in query_regions()
1633 devinfo->mem.vram.mappable.size = mem->probed_cpu_visible_size; in query_regions()
1634 devinfo->mem.vram.unmappable.size = in query_regions()
1641 devinfo->mem.vram.mappable.size = mem->probed_size; in query_regions()
1642 devinfo->mem.vram.unmappable.size = 0; in query_regions()
1645 assert(devinfo->mem.vram.mem_class == mem->region.memory_class); in query_regions()
1646 assert(devinfo->mem.vram.mem_instance == mem->region.memory_instance); in query_regions()
1647 assert((devinfo->mem.vram.mappable.size + in query_regions()
1648 devinfo->mem.vram.unmappable.size) == mem->probed_size); in query_regions()
[all …]
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| D | intel_device_info.h | 417 } sram, vram; member
509 return devinfo->mem.vram.unmappable.size == 0; in intel_vram_all_mappable()
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| /third_party/mesa3d/src/gallium/drivers/r600/ |
| D | r600_cs.h | 46 uint64_t vram, uint64_t gtt) in radeon_cs_memory_below_limit() argument
48 vram += (uint64_t)cs->used_vram_kb * 1024; in radeon_cs_memory_below_limit()
52 if (vram > (uint64_t)screen->info.vram_size_kb * 1024) in radeon_cs_memory_below_limit()
53 gtt += vram - (uint64_t)screen->info.vram_size_kb * 1024; in radeon_cs_memory_below_limit()
107 rctx->vram + rbo->vram_usage, in radeon_add_to_buffer_list_check_mem()
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| D | r600_hw_context.c | 41 ctx->b.vram, ctx->b.gtt)) { in r600_need_cs_space()
43 ctx->b.vram = 0; in r600_need_cs_space()
49 ctx->b.vram = 0; in r600_need_cs_space()
345 ctx->b.vram = 0; in r600_begin_new_cs()
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| D | r600_pipe_common.c | 231 uint64_t vram = (uint64_t)ctx->dma.cs.used_vram_kb * 1024; in r600_need_dma_space() local
235 vram += dst->vram_usage; in r600_need_dma_space()
239 vram += src->vram_usage; in r600_need_dma_space()
268 !radeon_cs_memory_below_limit(ctx->screen, &ctx->dma.cs, vram, gtt)) { in r600_need_dma_space()
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| D | r600_pipe_common.h | 515 uint64_t vram; member
839 rctx->vram += res->vram_usage; in r600_context_add_resource_size()
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| /third_party/mesa3d/src/gallium/drivers/nouveau/nv30/ |
| D | nv30_screen.c | 748 PUSH_DATA (push, fifo->vram); /* TEXTURE0 */ in nv30_screen_create()
750 PUSH_DATA (push, fifo->vram); /* COLOR1 */ in nv30_screen_create()
752 PUSH_DATA (push, fifo->vram); /* COLOR0 */ in nv30_screen_create()
753 PUSH_DATA (push, fifo->vram); /* ZETA */ in nv30_screen_create()
754 PUSH_DATA (push, fifo->vram); /* VTXBUF0 */ in nv30_screen_create()
780 PUSH_DATA (push, fifo->vram); in nv30_screen_create()
781 PUSH_DATA (push, fifo->vram); /* COLOR3 */ in nv30_screen_create()
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| D | nv30_transfer.c | 440 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart); in nv30_transfer_rect_sifm()
441 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart); in nv30_transfer_rect_sifm()
451 PUSH_RELOC(push, dst->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart); in nv30_transfer_rect_sifm()
461 PUSH_RELOC(push, src->bo, 0, NOUVEAU_BO_OR, fifo->vram, fifo->gart); in nv30_transfer_rect_sifm()
513 PUSH_DATA (push, (src->domain == NOUVEAU_BO_VRAM) ? fifo->vram : fifo->gart); in nv30_transfer_rect_m2mf()
514 PUSH_DATA (push, (dst->domain == NOUVEAU_BO_VRAM) ? fifo->vram : fifo->gart); in nv30_transfer_rect_m2mf()
704 PUSH_DATA (push, (s_dom == NOUVEAU_BO_VRAM) ? fifo->vram : fifo->gart); in nv30_transfer_copy_data()
705 PUSH_DATA (push, (d_dom == NOUVEAU_BO_VRAM) ? fifo->vram : fifo->gart); in nv30_transfer_copy_data()
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| /third_party/mesa3d/src/gallium/drivers/nouveau/nv50/ |
| D | nv50_compute.c | 77 PUSH_DATA (push, fifo->vram); in nv50_screen_compute_setup()
93 PUSH_DATA (push, fifo->vram); in nv50_screen_compute_setup()
125 PUSH_DATA (push, fifo->vram); in nv50_screen_compute_setup()
132 PUSH_DATA (push, fifo->vram); in nv50_screen_compute_setup()
139 PUSH_DATA (push, fifo->vram); in nv50_screen_compute_setup()
146 PUSH_DATA (push, fifo->vram); in nv50_screen_compute_setup()
149 PUSH_DATA (push, fifo->vram); in nv50_screen_compute_setup()
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| D | nv98_video.c | 92 struct nv04_fifo nv04_data = {.vram = 0xbeef0201, .gart = 0xbeef0202}; in nv98_create_decoder()
167 PUSH_DATA (push[0], nv04_data.vram); in nv98_create_decoder()
174 PUSH_DATA (push[1], nv04_data.vram); in nv98_create_decoder()
181 PUSH_DATA (push[2], nv04_data.vram); in nv98_create_decoder()
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| D | nv50_screen.c | 703 PUSH_DATA (push, fifo->vram); in nv50_screen_init_hwctx()
704 PUSH_DATA (push, fifo->vram); in nv50_screen_init_hwctx()
710 PUSH_DATA (push, fifo->vram); in nv50_screen_init_hwctx()
711 PUSH_DATA (push, fifo->vram); in nv50_screen_init_hwctx()
712 PUSH_DATA (push, fifo->vram); in nv50_screen_init_hwctx()
734 PUSH_DATA(push, fifo->vram); in nv50_screen_init_hwctx()
737 PUSH_DATA(push, fifo->vram); in nv50_screen_init_hwctx()
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| D | nv84_video.c | 274 struct nv04_fifo nv04_data = { .vram = 0xbeef0201, .gart = 0xbeef0202 }; in nv84_create_decoder()
515 PUSH_DATA(bsp_push, nv04_data.vram); in nv84_create_decoder()
517 PUSH_DATA (bsp_push, nv04_data.vram); in nv84_create_decoder()
537 PUSH_DATA(vp_push, nv04_data.vram); in nv84_create_decoder()
540 PUSH_DATA (vp_push, nv04_data.vram); in nv84_create_decoder()
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| /third_party/mesa3d/src/gallium/drivers/iris/ |
| D | iris_bufmgr.c | 227 struct iris_memregion vram, sys; member
765 if (bufmgr->vram.size > 0 && in flags_to_heap()
967 if (bufmgr->vram.size > 0) { in alloc_fresh_bo()
976 regions[nregions++] = bufmgr->vram.region; in alloc_fresh_bo()
980 regions[nregions++] = bufmgr->vram.region; in alloc_fresh_bo()
1031 if (bufmgr->vram.size == 0) { in alloc_fresh_bo()
1084 (bufmgr->vram.size > 0 && !local) || in iris_bo_alloc()
1146 !bufmgr->has_llc && bufmgr->vram.size == 0) { in iris_bo_alloc()
1544 assert(bufmgr->vram.size == 0); in iris_bo_gem_mmap_legacy()
2351 bufmgr->vram.region.memory_class = devinfo->mem.vram.mem_class; in iris_bufmgr_get_meminfo()
[all …]
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| D | iris_screen.c | 149 uint64_t vram = iris_bufmgr_vram_size(screen->bufmgr); in iris_get_video_memory() local
151 if (vram) { in iris_get_video_memory()
152 return vram / (1024 * 1024); in iris_get_video_memory()
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| /third_party/mesa3d/src/amd/common/ |
| D | ac_nir_lower_ngg.c | 139 } vram; member
2327 } else if (mask & s->layout.vram.prm_attr.mask) { in ms_get_out_layout_part()
2329 return &s->layout.vram.prm_attr; in ms_get_out_layout_part()
2338 } else if (mask & s->layout.vram.vtx_attr.mask) { in ms_get_out_layout_part()
2340 return &s->layout.vram.vtx_attr; in ms_get_out_layout_part()
2930 uint32_t vram_vtx_attr_size = util_bitcount64(l->vram.vtx_attr.mask) * max_vertices * 16; in ms_calculate_arrayed_output_layout()
2931 l->vram.prm_attr.addr = ALIGN(l->vram.vtx_attr.addr + vram_vtx_attr_size, 16); in ms_calculate_arrayed_output_layout()
2977 ms_move_output(&l.lds.prm_attr, &l.vram.prm_attr); in ms_calculate_output_layout()
2979 ms_move_output(&l.lds.vtx_attr, &l.vram.vtx_attr); in ms_calculate_output_layout()
3023 *out_needs_scratch_ring = layout.vram.vtx_attr.mask || layout.vram.prm_attr.mask; in ac_nir_lower_ngg_ms()
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| /third_party/mesa3d/src/gallium/drivers/nouveau/ |
| D | nouveau_video.c | 503 struct nv04_fifo nv04_data = { .vram = 0xbeef0201, .gart = 0xbeef0202 }; in nouveau_create_decoder()
603 PUSH_DATA (push, nv04_data.vram); in nouveau_create_decoder()
619 PUSH_DATA (push, nv04_data.vram); in nouveau_create_decoder()
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| D | nouveau_screen.c | 194 struct nv04_fifo nv04_data = { .vram = 0xbeef0201, .gart = 0xbeef0202 }; in nouveau_screen_init()
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| D | nouveau_vp3_video.c | 378 struct nv04_fifo nv04_data = {.vram = 0xbeef0201, .gart = 0xbeef0202}; in firmware_present()
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| /third_party/libdrm/nouveau/ |
| D | nouveau.h | 245 uint32_t vram; member
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| D | abi16.c | 40 .fb_ctxdma_handle = nv04->vram, in abi16_chan_nv04()
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| /third_party/mesa3d/src/intel/vulkan/ |
| D | anv_device.c | 386 device->vram_mappable.region.memory_class = devinfo->mem.vram.mem_class; in anv_init_meminfo()
388 devinfo->mem.vram.mem_instance; in anv_init_meminfo()
389 device->vram_mappable.size = devinfo->mem.vram.mappable.size; in anv_init_meminfo()
390 device->vram_mappable.available = devinfo->mem.vram.mappable.free; in anv_init_meminfo()
393 devinfo->mem.vram.mem_class; in anv_init_meminfo()
395 devinfo->mem.vram.mem_instance; in anv_init_meminfo()
396 device->vram_non_mappable.size = devinfo->mem.vram.unmappable.size; in anv_init_meminfo()
397 device->vram_non_mappable.available = devinfo->mem.vram.unmappable.free; in anv_init_meminfo()
410 device->vram_mappable.available = devinfo->mem.vram.mappable.free; in anv_update_meminfo()
411 device->vram_non_mappable.available = devinfo->mem.vram.unmappable.free; in anv_update_meminfo()
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| /third_party/libdrm/include/drm/ |
| D | amdgpu_drm.h | 959 struct drm_amdgpu_heap_info vram; member
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| /third_party/mesa3d/include/drm-uapi/ |
| D | amdgpu_drm.h | 967 struct drm_amdgpu_heap_info vram; member
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| /third_party/mesa3d/docs/relnotes/ |
| D | 20.3.5.rst | 88 - radv: Fix vram override with fully visible VRAM.
|