1 /*
2 * Copyright (c) 2021 Huawei Device Co., Ltd.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at
6 *
7 * http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
14 */
15
16 #include "register_test.h"
17
18 #include <bitset>
19
20 using namespace testing::ext;
21 using namespace std;
22 using namespace OHOS::HiviewDFX;
23 namespace OHOS {
24 namespace Developtools {
25 namespace HiPerf {
26 class RegisterTest : public testing::Test {
27 public:
28 static void SetUpTestCase(void);
29 static void TearDownTestCase(void);
30 void SetUp();
31 void TearDown();
32 };
33
SetUpTestCase()34 void RegisterTest::SetUpTestCase() {}
35
TearDownTestCase()36 void RegisterTest::TearDownTestCase() {}
37
SetUp()38 void RegisterTest::SetUp() {}
39
TearDown()40 void RegisterTest::TearDown() {}
41
42
43 /**
44 * @tc.name: GetSupportedRegMask
45 * @tc.desc:
46 * @tc.type: FUNC
47 */
48 HWTEST_F(RegisterTest, GetSupportedRegMask, TestSize.Level1)
49 {
50 EXPECT_NE(GetSupportedRegMask(ArchType::ARCH_X86), GetSupportedRegMask(ArchType::ARCH_X86_64));
51 EXPECT_NE(GetSupportedRegMask(ArchType::ARCH_ARM), GetSupportedRegMask(ArchType::ARCH_ARM64));
52 EXPECT_EQ(GetSupportedRegMask(static_cast<ArchType>(100)),
53 std::numeric_limits<uint64_t>::max());
54 EXPECT_EQ(GetSupportedRegMask(static_cast<ArchType>(-1)), std::numeric_limits<uint64_t>::max());
55
56 std::bitset<64> regMasker;
57 regMasker = GetSupportedRegMask(ArchType::ARCH_X86);
58 EXPECT_EQ(regMasker.count(), PERF_REG_X86_32_MAX);
59
60 regMasker = GetSupportedRegMask(ArchType::ARCH_X86_64);
61 // dont support PERF_REG_X86_DS,PERF_REG_X86_ES,PERF_REG_X86_FS,PERF_REG_X86_GS
62 EXPECT_EQ(regMasker.count(), PERF_REG_X86_64_MAX - 4u);
63
64 regMasker = GetSupportedRegMask(ArchType::ARCH_ARM);
65 EXPECT_EQ(regMasker.count(), PERF_REG_ARM_MAX);
66
67 regMasker = GetSupportedRegMask(ArchType::ARCH_ARM64);
68 EXPECT_EQ(regMasker.count(), PERF_REG_ARM64_MAX);
69 }
70
71 /**
72 * @tc.name: RegisterGetIP
73 * @tc.desc:
74 * @tc.type: FUNC
75 */
76 HWTEST_F(RegisterTest, RegisterGetIP, TestSize.Level1)
77 {
78 #if defined(target_cpu_x86_64)
79 EXPECT_EQ(RegisterGetIP(ArchType::ARCH_X86_64), PERF_REG_X86_IP);
80 #elif defined(target_cpu_arm)
81 EXPECT_EQ(RegisterGetIP(ArchType::ARCH_ARM), PERF_REG_ARM_PC);
82 #elif defined(target_cpu_arm64)
83 EXPECT_EQ(RegisterGetIP(ArchType::ARCH_ARM64), PERF_REG_ARM64_PC);
84 #endif
85 }
86
87 /**
88 * @tc.name: RegisterGetSP
89 * @tc.desc:
90 * @tc.type: FUNC
91 */
92 HWTEST_F(RegisterTest, RegisterGetSP, TestSize.Level1)
93 {
94 #if defined(target_cpu_x86_64)
95 EXPECT_EQ(RegisterGetSP(ArchType::ARCH_X86_64), PERF_REG_X86_IP);
96 #elif defined(target_cpu_arm)
97 EXPECT_EQ(RegisterGetSP(ArchType::ARCH_ARM), PERF_REG_ARM_SP);
98 #elif defined(target_cpu_arm64)
99 EXPECT_EQ(RegisterGetSP(ArchType::ARCH_ARM64), PERF_REG_ARM64_SP);
100 #endif
101 }
102
103 /**
104 * @tc.name: RegisterGetValue
105 * @tc.desc:
106 * @tc.type: FUNC
107 */
108 HWTEST_F(RegisterTest, RegisterGetValue, TestSize.Level1)
109 {
110 uint64_t value = 0;
111 const u64 registers[4] = {1, 2, 3, 4};
112
113 EXPECT_EQ(RegisterGetValue(value, registers, 0, sizeof(registers)), true);
114 EXPECT_EQ(RegisterGetValue(value, registers, sizeof(registers), sizeof(registers)), false);
115 EXPECT_EQ(RegisterGetValue(value, registers, -1, sizeof(registers)), false);
116
117 for (unsigned i = 0; i < sizeof(registers); i++) {
118 RegisterGetValue(value, registers, i, sizeof(registers));
119 EXPECT_EQ(value, registers[i]);
120 }
121 }
122
123 /**
124 * @tc.name: RegisterGetSPValue
125 * @tc.desc:
126 * @tc.type: FUNC
127 */
128 HWTEST_F(RegisterTest, RegisterGetSPValue, TestSize.Level1)
129 {
130 uint64_t value = 0;
131 uint64_t value2 = 0;
132 u64 registers[PERF_REG_ARM64_MAX] = {1, 2, 3, 4};
133 size_t sp = RegisterGetSP(BUILD_ARCH_TYPE);
134 registers[sp] = 0x1234;
135
136 EXPECT_EQ(RegisterGetValue(value, registers, sp, sizeof(registers)),
137 RegisterGetSPValue(value2, BUILD_ARCH_TYPE, registers, sizeof(registers)));
138
139 EXPECT_EQ(value, value2);
140 }
141
142 /**
143 * @tc.name: RegisterGetIPValue
144 * @tc.desc:
145 * @tc.type: FUNC
146 */
147 HWTEST_F(RegisterTest, RegisterGetIPValue, TestSize.Level1)
148 {
149 uint64_t value = 0;
150 uint64_t value2 = 0;
151 u64 registers[PERF_REG_ARM64_MAX] = {1, 2, 3, 4};
152 size_t ip = RegisterGetIP(BUILD_ARCH_TYPE);
153 registers[ip] = 0x1234;
154
155 EXPECT_EQ(RegisterGetValue(value, registers, ip, sizeof(registers)),
156 RegisterGetIPValue(value2, BUILD_ARCH_TYPE, registers, sizeof(registers)));
157
158 EXPECT_EQ(value, value2);
159 }
160
161 /**
162 * @tc.name: RegisterGetName
163 * @tc.desc:
164 * @tc.type: FUNC
165 */
166 HWTEST_F(RegisterTest, RegisterGetName, TestSize.Level1)
167 {
168 for (unsigned i = 0; i < PERF_REG_ARM64_MAX; i++) {
169 EXPECT_EQ(RegisterGetName(i).empty(), false);
170 }
171 }
172 } // namespace HiPerf
173 } // namespace Developtools
174 } // namespace OHOS
175