1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3 * QLogic qlcnic NIC Driver
4 * Copyright (c) 2009-2013 QLogic Corporation
5 */
6
7 #include "qlcnic.h"
8 #include "qlcnic_hw.h"
9
10 struct crb_addr_pair {
11 u32 addr;
12 u32 data;
13 };
14
15 #define QLCNIC_MAX_CRB_XFORM 60
16 static unsigned int crb_addr_xform[QLCNIC_MAX_CRB_XFORM];
17
18 #define crb_addr_transform(name) \
19 (crb_addr_xform[QLCNIC_HW_PX_MAP_CRB_##name] = \
20 QLCNIC_HW_CRB_HUB_AGT_ADR_##name << 20)
21
22 #define QLCNIC_ADDR_ERROR (0xffffffff)
23
24 static int
25 qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter);
26
crb_addr_transform_setup(void)27 static void crb_addr_transform_setup(void)
28 {
29 crb_addr_transform(XDMA);
30 crb_addr_transform(TIMR);
31 crb_addr_transform(SRE);
32 crb_addr_transform(SQN3);
33 crb_addr_transform(SQN2);
34 crb_addr_transform(SQN1);
35 crb_addr_transform(SQN0);
36 crb_addr_transform(SQS3);
37 crb_addr_transform(SQS2);
38 crb_addr_transform(SQS1);
39 crb_addr_transform(SQS0);
40 crb_addr_transform(RPMX7);
41 crb_addr_transform(RPMX6);
42 crb_addr_transform(RPMX5);
43 crb_addr_transform(RPMX4);
44 crb_addr_transform(RPMX3);
45 crb_addr_transform(RPMX2);
46 crb_addr_transform(RPMX1);
47 crb_addr_transform(RPMX0);
48 crb_addr_transform(ROMUSB);
49 crb_addr_transform(SN);
50 crb_addr_transform(QMN);
51 crb_addr_transform(QMS);
52 crb_addr_transform(PGNI);
53 crb_addr_transform(PGND);
54 crb_addr_transform(PGN3);
55 crb_addr_transform(PGN2);
56 crb_addr_transform(PGN1);
57 crb_addr_transform(PGN0);
58 crb_addr_transform(PGSI);
59 crb_addr_transform(PGSD);
60 crb_addr_transform(PGS3);
61 crb_addr_transform(PGS2);
62 crb_addr_transform(PGS1);
63 crb_addr_transform(PGS0);
64 crb_addr_transform(PS);
65 crb_addr_transform(PH);
66 crb_addr_transform(NIU);
67 crb_addr_transform(I2Q);
68 crb_addr_transform(EG);
69 crb_addr_transform(MN);
70 crb_addr_transform(MS);
71 crb_addr_transform(CAS2);
72 crb_addr_transform(CAS1);
73 crb_addr_transform(CAS0);
74 crb_addr_transform(CAM);
75 crb_addr_transform(C2C1);
76 crb_addr_transform(C2C0);
77 crb_addr_transform(SMB);
78 crb_addr_transform(OCM0);
79 crb_addr_transform(I2C0);
80 }
81
qlcnic_release_rx_buffers(struct qlcnic_adapter * adapter)82 void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter)
83 {
84 struct qlcnic_recv_context *recv_ctx;
85 struct qlcnic_host_rds_ring *rds_ring;
86 struct qlcnic_rx_buffer *rx_buf;
87 int i, ring;
88
89 recv_ctx = adapter->recv_ctx;
90 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
91 rds_ring = &recv_ctx->rds_rings[ring];
92 for (i = 0; i < rds_ring->num_desc; ++i) {
93 rx_buf = &(rds_ring->rx_buf_arr[i]);
94 if (rx_buf->skb == NULL)
95 continue;
96
97 pci_unmap_single(adapter->pdev,
98 rx_buf->dma,
99 rds_ring->dma_size,
100 PCI_DMA_FROMDEVICE);
101
102 dev_kfree_skb_any(rx_buf->skb);
103 }
104 }
105 }
106
qlcnic_reset_rx_buffers_list(struct qlcnic_adapter * adapter)107 void qlcnic_reset_rx_buffers_list(struct qlcnic_adapter *adapter)
108 {
109 struct qlcnic_recv_context *recv_ctx;
110 struct qlcnic_host_rds_ring *rds_ring;
111 struct qlcnic_rx_buffer *rx_buf;
112 int i, ring;
113
114 recv_ctx = adapter->recv_ctx;
115 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
116 rds_ring = &recv_ctx->rds_rings[ring];
117
118 INIT_LIST_HEAD(&rds_ring->free_list);
119
120 rx_buf = rds_ring->rx_buf_arr;
121 for (i = 0; i < rds_ring->num_desc; i++) {
122 list_add_tail(&rx_buf->list,
123 &rds_ring->free_list);
124 rx_buf++;
125 }
126 }
127 }
128
qlcnic_release_tx_buffers(struct qlcnic_adapter * adapter,struct qlcnic_host_tx_ring * tx_ring)129 void qlcnic_release_tx_buffers(struct qlcnic_adapter *adapter,
130 struct qlcnic_host_tx_ring *tx_ring)
131 {
132 struct qlcnic_cmd_buffer *cmd_buf;
133 struct qlcnic_skb_frag *buffrag;
134 int i, j;
135
136 spin_lock(&tx_ring->tx_clean_lock);
137
138 cmd_buf = tx_ring->cmd_buf_arr;
139 for (i = 0; i < tx_ring->num_desc; i++) {
140 buffrag = cmd_buf->frag_array;
141 if (buffrag->dma) {
142 pci_unmap_single(adapter->pdev, buffrag->dma,
143 buffrag->length, PCI_DMA_TODEVICE);
144 buffrag->dma = 0ULL;
145 }
146 for (j = 1; j < cmd_buf->frag_count; j++) {
147 buffrag++;
148 if (buffrag->dma) {
149 pci_unmap_page(adapter->pdev, buffrag->dma,
150 buffrag->length,
151 PCI_DMA_TODEVICE);
152 buffrag->dma = 0ULL;
153 }
154 }
155 if (cmd_buf->skb) {
156 dev_kfree_skb_any(cmd_buf->skb);
157 cmd_buf->skb = NULL;
158 }
159 cmd_buf++;
160 }
161
162 spin_unlock(&tx_ring->tx_clean_lock);
163 }
164
qlcnic_free_sw_resources(struct qlcnic_adapter * adapter)165 void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter)
166 {
167 struct qlcnic_recv_context *recv_ctx;
168 struct qlcnic_host_rds_ring *rds_ring;
169 int ring;
170
171 recv_ctx = adapter->recv_ctx;
172
173 if (recv_ctx->rds_rings == NULL)
174 return;
175
176 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
177 rds_ring = &recv_ctx->rds_rings[ring];
178 vfree(rds_ring->rx_buf_arr);
179 rds_ring->rx_buf_arr = NULL;
180 }
181 kfree(recv_ctx->rds_rings);
182 }
183
qlcnic_alloc_sw_resources(struct qlcnic_adapter * adapter)184 int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter)
185 {
186 struct qlcnic_recv_context *recv_ctx;
187 struct qlcnic_host_rds_ring *rds_ring;
188 struct qlcnic_host_sds_ring *sds_ring;
189 struct qlcnic_rx_buffer *rx_buf;
190 int ring, i;
191
192 recv_ctx = adapter->recv_ctx;
193
194 rds_ring = kcalloc(adapter->max_rds_rings,
195 sizeof(struct qlcnic_host_rds_ring), GFP_KERNEL);
196 if (rds_ring == NULL)
197 goto err_out;
198
199 recv_ctx->rds_rings = rds_ring;
200
201 for (ring = 0; ring < adapter->max_rds_rings; ring++) {
202 rds_ring = &recv_ctx->rds_rings[ring];
203 switch (ring) {
204 case RCV_RING_NORMAL:
205 rds_ring->num_desc = adapter->num_rxd;
206 rds_ring->dma_size = QLCNIC_P3P_RX_BUF_MAX_LEN;
207 rds_ring->skb_size = rds_ring->dma_size + NET_IP_ALIGN;
208 break;
209
210 case RCV_RING_JUMBO:
211 rds_ring->num_desc = adapter->num_jumbo_rxd;
212 rds_ring->dma_size =
213 QLCNIC_P3P_RX_JUMBO_BUF_MAX_LEN;
214
215 if (adapter->ahw->capabilities &
216 QLCNIC_FW_CAPABILITY_HW_LRO)
217 rds_ring->dma_size += QLCNIC_LRO_BUFFER_EXTRA;
218
219 rds_ring->skb_size =
220 rds_ring->dma_size + NET_IP_ALIGN;
221 break;
222 }
223 rds_ring->rx_buf_arr = vzalloc(RCV_BUFF_RINGSIZE(rds_ring));
224 if (rds_ring->rx_buf_arr == NULL)
225 goto err_out;
226
227 INIT_LIST_HEAD(&rds_ring->free_list);
228 /*
229 * Now go through all of them, set reference handles
230 * and put them in the queues.
231 */
232 rx_buf = rds_ring->rx_buf_arr;
233 for (i = 0; i < rds_ring->num_desc; i++) {
234 list_add_tail(&rx_buf->list,
235 &rds_ring->free_list);
236 rx_buf->ref_handle = i;
237 rx_buf++;
238 }
239 spin_lock_init(&rds_ring->lock);
240 }
241
242 for (ring = 0; ring < adapter->drv_sds_rings; ring++) {
243 sds_ring = &recv_ctx->sds_rings[ring];
244 sds_ring->irq = adapter->msix_entries[ring].vector;
245 sds_ring->adapter = adapter;
246 sds_ring->num_desc = adapter->num_rxd;
247 if (qlcnic_82xx_check(adapter)) {
248 if (qlcnic_check_multi_tx(adapter) &&
249 !adapter->ahw->diag_test)
250 sds_ring->tx_ring = &adapter->tx_ring[ring];
251 else
252 sds_ring->tx_ring = &adapter->tx_ring[0];
253 }
254 for (i = 0; i < NUM_RCV_DESC_RINGS; i++)
255 INIT_LIST_HEAD(&sds_ring->free_list[i]);
256 }
257
258 return 0;
259
260 err_out:
261 qlcnic_free_sw_resources(adapter);
262 return -ENOMEM;
263 }
264
265 /*
266 * Utility to translate from internal Phantom CRB address
267 * to external PCI CRB address.
268 */
qlcnic_decode_crb_addr(u32 addr)269 static u32 qlcnic_decode_crb_addr(u32 addr)
270 {
271 int i;
272 u32 base_addr, offset, pci_base;
273
274 crb_addr_transform_setup();
275
276 pci_base = QLCNIC_ADDR_ERROR;
277 base_addr = addr & 0xfff00000;
278 offset = addr & 0x000fffff;
279
280 for (i = 0; i < QLCNIC_MAX_CRB_XFORM; i++) {
281 if (crb_addr_xform[i] == base_addr) {
282 pci_base = i << 20;
283 break;
284 }
285 }
286 if (pci_base == QLCNIC_ADDR_ERROR)
287 return pci_base;
288 else
289 return pci_base + offset;
290 }
291
292 #define QLCNIC_MAX_ROM_WAIT_USEC 100
293
qlcnic_wait_rom_done(struct qlcnic_adapter * adapter)294 static int qlcnic_wait_rom_done(struct qlcnic_adapter *adapter)
295 {
296 long timeout = 0;
297 long done = 0;
298 int err = 0;
299
300 cond_resched();
301 while (done == 0) {
302 done = QLCRD32(adapter, QLCNIC_ROMUSB_GLB_STATUS, &err);
303 done &= 2;
304 if (++timeout >= QLCNIC_MAX_ROM_WAIT_USEC) {
305 dev_err(&adapter->pdev->dev,
306 "Timeout reached waiting for rom done");
307 return -EIO;
308 }
309 udelay(1);
310 }
311 return 0;
312 }
313
do_rom_fast_read(struct qlcnic_adapter * adapter,u32 addr,u32 * valp)314 static int do_rom_fast_read(struct qlcnic_adapter *adapter,
315 u32 addr, u32 *valp)
316 {
317 int err = 0;
318
319 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ADDRESS, addr);
320 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
321 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 3);
322 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_INSTR_OPCODE, 0xb);
323 if (qlcnic_wait_rom_done(adapter)) {
324 dev_err(&adapter->pdev->dev, "Error waiting for rom done\n");
325 return -EIO;
326 }
327 /* reset abyte_cnt and dummy_byte_cnt */
328 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_ABYTE_CNT, 0);
329 udelay(10);
330 QLCWR32(adapter, QLCNIC_ROMUSB_ROM_DUMMY_BYTE_CNT, 0);
331
332 *valp = QLCRD32(adapter, QLCNIC_ROMUSB_ROM_RDATA, &err);
333 if (err == -EIO)
334 return err;
335 return 0;
336 }
337
do_rom_fast_read_words(struct qlcnic_adapter * adapter,int addr,u8 * bytes,size_t size)338 static int do_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
339 u8 *bytes, size_t size)
340 {
341 int addridx;
342 int ret = 0;
343
344 for (addridx = addr; addridx < (addr + size); addridx += 4) {
345 int v;
346 ret = do_rom_fast_read(adapter, addridx, &v);
347 if (ret != 0)
348 break;
349 *(__le32 *)bytes = cpu_to_le32(v);
350 bytes += 4;
351 }
352
353 return ret;
354 }
355
356 int
qlcnic_rom_fast_read_words(struct qlcnic_adapter * adapter,int addr,u8 * bytes,size_t size)357 qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
358 u8 *bytes, size_t size)
359 {
360 int ret;
361
362 ret = qlcnic_rom_lock(adapter);
363 if (ret < 0)
364 return ret;
365
366 ret = do_rom_fast_read_words(adapter, addr, bytes, size);
367
368 qlcnic_rom_unlock(adapter);
369 return ret;
370 }
371
qlcnic_rom_fast_read(struct qlcnic_adapter * adapter,u32 addr,u32 * valp)372 int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, u32 addr, u32 *valp)
373 {
374 int ret;
375
376 if (qlcnic_rom_lock(adapter) != 0)
377 return -EIO;
378
379 ret = do_rom_fast_read(adapter, addr, valp);
380 qlcnic_rom_unlock(adapter);
381 return ret;
382 }
383
qlcnic_pinit_from_rom(struct qlcnic_adapter * adapter)384 int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter)
385 {
386 int addr, err = 0;
387 int i, n, init_delay;
388 struct crb_addr_pair *buf;
389 unsigned offset;
390 u32 off, val;
391 struct pci_dev *pdev = adapter->pdev;
392
393 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE, 0);
394 QLC_SHARED_REG_WR32(adapter, QLCNIC_RCVPEG_STATE, 0);
395
396 /* Halt all the indiviual PEGs and other blocks */
397 /* disable all I2Q */
398 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x10, 0x0);
399 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x14, 0x0);
400 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x18, 0x0);
401 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x1c, 0x0);
402 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x20, 0x0);
403 QLCWR32(adapter, QLCNIC_CRB_I2Q + 0x24, 0x0);
404
405 /* disable all niu interrupts */
406 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x40, 0xff);
407 /* disable xge rx/tx */
408 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x70000, 0x00);
409 /* disable xg1 rx/tx */
410 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x80000, 0x00);
411 /* disable sideband mac */
412 QLCWR32(adapter, QLCNIC_CRB_NIU + 0x90000, 0x00);
413 /* disable ap0 mac */
414 QLCWR32(adapter, QLCNIC_CRB_NIU + 0xa0000, 0x00);
415 /* disable ap1 mac */
416 QLCWR32(adapter, QLCNIC_CRB_NIU + 0xb0000, 0x00);
417
418 /* halt sre */
419 val = QLCRD32(adapter, QLCNIC_CRB_SRE + 0x1000, &err);
420 if (err == -EIO)
421 return err;
422 QLCWR32(adapter, QLCNIC_CRB_SRE + 0x1000, val & (~(0x1)));
423
424 /* halt epg */
425 QLCWR32(adapter, QLCNIC_CRB_EPG + 0x1300, 0x1);
426
427 /* halt timers */
428 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x0, 0x0);
429 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x8, 0x0);
430 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x10, 0x0);
431 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x18, 0x0);
432 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x100, 0x0);
433 QLCWR32(adapter, QLCNIC_CRB_TIMER + 0x200, 0x0);
434 /* halt pegs */
435 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x3c, 1);
436 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x3c, 1);
437 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x3c, 1);
438 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x3c, 1);
439 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x3c, 1);
440 msleep(20);
441
442 /* big hammer don't reset CAM block on reset */
443 QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0xfeffffff);
444
445 /* Init HW CRB block */
446 if (qlcnic_rom_fast_read(adapter, 0, &n) != 0 || (n != 0xcafecafe) ||
447 qlcnic_rom_fast_read(adapter, 4, &n) != 0) {
448 dev_err(&pdev->dev, "ERROR Reading crb_init area: val:%x\n", n);
449 return -EIO;
450 }
451 offset = n & 0xffffU;
452 n = (n >> 16) & 0xffffU;
453
454 if (n >= 1024) {
455 dev_err(&pdev->dev, "QLOGIC card flash not initialized.\n");
456 return -EIO;
457 }
458
459 buf = kcalloc(n, sizeof(struct crb_addr_pair), GFP_KERNEL);
460 if (buf == NULL)
461 return -ENOMEM;
462
463 for (i = 0; i < n; i++) {
464 if (qlcnic_rom_fast_read(adapter, 8*i + 4*offset, &val) != 0 ||
465 qlcnic_rom_fast_read(adapter, 8*i + 4*offset + 4, &addr) != 0) {
466 kfree(buf);
467 return -EIO;
468 }
469
470 buf[i].addr = addr;
471 buf[i].data = val;
472 }
473
474 for (i = 0; i < n; i++) {
475
476 off = qlcnic_decode_crb_addr(buf[i].addr);
477 if (off == QLCNIC_ADDR_ERROR) {
478 dev_err(&pdev->dev, "CRB init value out of range %x\n",
479 buf[i].addr);
480 continue;
481 }
482 off += QLCNIC_PCI_CRBSPACE;
483
484 if (off & 1)
485 continue;
486
487 /* skipping cold reboot MAGIC */
488 if (off == QLCNIC_CAM_RAM(0x1fc))
489 continue;
490 if (off == (QLCNIC_CRB_I2C0 + 0x1c))
491 continue;
492 if (off == (ROMUSB_GLB + 0xbc)) /* do not reset PCI */
493 continue;
494 if (off == (ROMUSB_GLB + 0xa8))
495 continue;
496 if (off == (ROMUSB_GLB + 0xc8)) /* core clock */
497 continue;
498 if (off == (ROMUSB_GLB + 0x24)) /* MN clock */
499 continue;
500 if (off == (ROMUSB_GLB + 0x1c)) /* MS clock */
501 continue;
502 if ((off & 0x0ff00000) == QLCNIC_CRB_DDR_NET)
503 continue;
504 /* skip the function enable register */
505 if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION))
506 continue;
507 if (off == QLCNIC_PCIE_REG(PCIE_SETUP_FUNCTION2))
508 continue;
509 if ((off & 0x0ff00000) == QLCNIC_CRB_SMB)
510 continue;
511
512 init_delay = 1;
513 /* After writing this register, HW needs time for CRB */
514 /* to quiet down (else crb_window returns 0xffffffff) */
515 if (off == QLCNIC_ROMUSB_GLB_SW_RESET)
516 init_delay = 1000;
517
518 QLCWR32(adapter, off, buf[i].data);
519
520 msleep(init_delay);
521 }
522 kfree(buf);
523
524 /* Initialize protocol process engine */
525 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0xec, 0x1e);
526 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_D + 0x4c, 8);
527 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_I + 0x4c, 8);
528 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x8, 0);
529 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0xc, 0);
530 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0x8, 0);
531 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_1 + 0xc, 0);
532 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0x8, 0);
533 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_2 + 0xc, 0);
534 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0x8, 0);
535 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_3 + 0xc, 0);
536 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0x8, 0);
537 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_4 + 0xc, 0);
538 usleep_range(1000, 1500);
539
540 QLC_SHARED_REG_WR32(adapter, QLCNIC_PEG_HALT_STATUS1, 0);
541 QLC_SHARED_REG_WR32(adapter, QLCNIC_PEG_HALT_STATUS2, 0);
542
543 return 0;
544 }
545
qlcnic_cmd_peg_ready(struct qlcnic_adapter * adapter)546 static int qlcnic_cmd_peg_ready(struct qlcnic_adapter *adapter)
547 {
548 u32 val;
549 int retries = QLCNIC_CMDPEG_CHECK_RETRY_COUNT;
550
551 do {
552 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CMDPEG_STATE);
553
554 switch (val) {
555 case PHAN_INITIALIZE_COMPLETE:
556 case PHAN_INITIALIZE_ACK:
557 return 0;
558 case PHAN_INITIALIZE_FAILED:
559 goto out_err;
560 default:
561 break;
562 }
563
564 msleep(QLCNIC_CMDPEG_CHECK_DELAY);
565
566 } while (--retries);
567
568 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE,
569 PHAN_INITIALIZE_FAILED);
570
571 out_err:
572 dev_err(&adapter->pdev->dev, "Command Peg initialization not "
573 "complete, state: 0x%x.\n", val);
574 return -EIO;
575 }
576
577 static int
qlcnic_receive_peg_ready(struct qlcnic_adapter * adapter)578 qlcnic_receive_peg_ready(struct qlcnic_adapter *adapter)
579 {
580 u32 val;
581 int retries = QLCNIC_RCVPEG_CHECK_RETRY_COUNT;
582
583 do {
584 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_RCVPEG_STATE);
585
586 if (val == PHAN_PEG_RCV_INITIALIZED)
587 return 0;
588
589 msleep(QLCNIC_RCVPEG_CHECK_DELAY);
590
591 } while (--retries);
592
593 dev_err(&adapter->pdev->dev, "Receive Peg initialization not complete, state: 0x%x.\n",
594 val);
595 return -EIO;
596 }
597
598 int
qlcnic_check_fw_status(struct qlcnic_adapter * adapter)599 qlcnic_check_fw_status(struct qlcnic_adapter *adapter)
600 {
601 int err;
602
603 err = qlcnic_cmd_peg_ready(adapter);
604 if (err)
605 return err;
606
607 err = qlcnic_receive_peg_ready(adapter);
608 if (err)
609 return err;
610
611 QLC_SHARED_REG_WR32(adapter, QLCNIC_CMDPEG_STATE, PHAN_INITIALIZE_ACK);
612
613 return err;
614 }
615
616 int
qlcnic_setup_idc_param(struct qlcnic_adapter * adapter)617 qlcnic_setup_idc_param(struct qlcnic_adapter *adapter) {
618
619 int timeo;
620 u32 val;
621
622 val = QLC_SHARED_REG_RD32(adapter, QLCNIC_CRB_DEV_PARTITION_INFO);
623 val = QLC_DEV_GET_DRV(val, adapter->portnum);
624 if ((val & 0x3) != QLCNIC_TYPE_NIC) {
625 dev_err(&adapter->pdev->dev,
626 "Not an Ethernet NIC func=%u\n", val);
627 return -EIO;
628 }
629 adapter->ahw->physical_port = (val >> 2);
630 if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DEV_INIT_TIMEOUT, &timeo))
631 timeo = QLCNIC_INIT_TIMEOUT_SECS;
632
633 adapter->dev_init_timeo = timeo;
634
635 if (qlcnic_rom_fast_read(adapter, QLCNIC_ROM_DRV_RESET_TIMEOUT, &timeo))
636 timeo = QLCNIC_RESET_TIMEOUT_SECS;
637
638 adapter->reset_ack_timeo = timeo;
639
640 return 0;
641 }
642
qlcnic_get_flt_entry(struct qlcnic_adapter * adapter,u8 region,struct qlcnic_flt_entry * region_entry)643 static int qlcnic_get_flt_entry(struct qlcnic_adapter *adapter, u8 region,
644 struct qlcnic_flt_entry *region_entry)
645 {
646 struct qlcnic_flt_header flt_hdr;
647 struct qlcnic_flt_entry *flt_entry;
648 int i = 0, ret;
649 u32 entry_size;
650
651 memset(region_entry, 0, sizeof(struct qlcnic_flt_entry));
652 ret = qlcnic_rom_fast_read_words(adapter, QLCNIC_FLT_LOCATION,
653 (u8 *)&flt_hdr,
654 sizeof(struct qlcnic_flt_header));
655 if (ret) {
656 dev_warn(&adapter->pdev->dev,
657 "error reading flash layout header\n");
658 return -EIO;
659 }
660
661 entry_size = flt_hdr.len - sizeof(struct qlcnic_flt_header);
662 flt_entry = vzalloc(entry_size);
663 if (flt_entry == NULL)
664 return -EIO;
665
666 ret = qlcnic_rom_fast_read_words(adapter, QLCNIC_FLT_LOCATION +
667 sizeof(struct qlcnic_flt_header),
668 (u8 *)flt_entry, entry_size);
669 if (ret) {
670 dev_warn(&adapter->pdev->dev,
671 "error reading flash layout entries\n");
672 goto err_out;
673 }
674
675 while (i < (entry_size/sizeof(struct qlcnic_flt_entry))) {
676 if (flt_entry[i].region == region)
677 break;
678 i++;
679 }
680 if (i >= (entry_size/sizeof(struct qlcnic_flt_entry))) {
681 dev_warn(&adapter->pdev->dev,
682 "region=%x not found in %d regions\n", region, i);
683 ret = -EIO;
684 goto err_out;
685 }
686 memcpy(region_entry, &flt_entry[i], sizeof(struct qlcnic_flt_entry));
687
688 err_out:
689 vfree(flt_entry);
690 return ret;
691 }
692
693 int
qlcnic_check_flash_fw_ver(struct qlcnic_adapter * adapter)694 qlcnic_check_flash_fw_ver(struct qlcnic_adapter *adapter)
695 {
696 struct qlcnic_flt_entry fw_entry;
697 u32 ver = -1, min_ver;
698 int ret;
699
700 if (adapter->ahw->revision_id == QLCNIC_P3P_C0)
701 ret = qlcnic_get_flt_entry(adapter, QLCNIC_C0_FW_IMAGE_REGION,
702 &fw_entry);
703 else
704 ret = qlcnic_get_flt_entry(adapter, QLCNIC_B0_FW_IMAGE_REGION,
705 &fw_entry);
706
707 if (!ret)
708 /* 0-4:-signature, 4-8:-fw version */
709 qlcnic_rom_fast_read(adapter, fw_entry.start_addr + 4,
710 (int *)&ver);
711 else
712 qlcnic_rom_fast_read(adapter, QLCNIC_FW_VERSION_OFFSET,
713 (int *)&ver);
714
715 ver = QLCNIC_DECODE_VERSION(ver);
716 min_ver = QLCNIC_MIN_FW_VERSION;
717
718 if (ver < min_ver) {
719 dev_err(&adapter->pdev->dev,
720 "firmware version %d.%d.%d unsupported."
721 "Min supported version %d.%d.%d\n",
722 _major(ver), _minor(ver), _build(ver),
723 _major(min_ver), _minor(min_ver), _build(min_ver));
724 return -EINVAL;
725 }
726
727 return 0;
728 }
729
730 static int
qlcnic_has_mn(struct qlcnic_adapter * adapter)731 qlcnic_has_mn(struct qlcnic_adapter *adapter)
732 {
733 u32 capability = 0;
734 int err = 0;
735
736 capability = QLCRD32(adapter, QLCNIC_PEG_TUNE_CAPABILITY, &err);
737 if (err == -EIO)
738 return err;
739 if (capability & QLCNIC_PEG_TUNE_MN_PRESENT)
740 return 1;
741
742 return 0;
743 }
744
745 static
qlcnic_get_table_desc(const u8 * unirom,int section)746 struct uni_table_desc *qlcnic_get_table_desc(const u8 *unirom, int section)
747 {
748 u32 i, entries;
749 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
750 entries = le32_to_cpu(directory->num_entries);
751
752 for (i = 0; i < entries; i++) {
753
754 u32 offs = le32_to_cpu(directory->findex) +
755 i * le32_to_cpu(directory->entry_size);
756 u32 tab_type = le32_to_cpu(*((__le32 *)&unirom[offs] + 8));
757
758 if (tab_type == section)
759 return (struct uni_table_desc *) &unirom[offs];
760 }
761
762 return NULL;
763 }
764
765 #define FILEHEADER_SIZE (14 * 4)
766
767 static int
qlcnic_validate_header(struct qlcnic_adapter * adapter)768 qlcnic_validate_header(struct qlcnic_adapter *adapter)
769 {
770 const u8 *unirom = adapter->fw->data;
771 struct uni_table_desc *directory = (struct uni_table_desc *) &unirom[0];
772 u32 entries, entry_size, tab_size, fw_file_size;
773
774 fw_file_size = adapter->fw->size;
775
776 if (fw_file_size < FILEHEADER_SIZE)
777 return -EINVAL;
778
779 entries = le32_to_cpu(directory->num_entries);
780 entry_size = le32_to_cpu(directory->entry_size);
781 tab_size = le32_to_cpu(directory->findex) + (entries * entry_size);
782
783 if (fw_file_size < tab_size)
784 return -EINVAL;
785
786 return 0;
787 }
788
789 static int
qlcnic_validate_bootld(struct qlcnic_adapter * adapter)790 qlcnic_validate_bootld(struct qlcnic_adapter *adapter)
791 {
792 struct uni_table_desc *tab_desc;
793 struct uni_data_desc *descr;
794 u32 offs, tab_size, data_size, idx;
795 const u8 *unirom = adapter->fw->data;
796 __le32 temp;
797
798 temp = *((__le32 *)&unirom[adapter->file_prd_off] +
799 QLCNIC_UNI_BOOTLD_IDX_OFF);
800 idx = le32_to_cpu(temp);
801 tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_BOOTLD);
802
803 if (!tab_desc)
804 return -EINVAL;
805
806 tab_size = le32_to_cpu(tab_desc->findex) +
807 le32_to_cpu(tab_desc->entry_size) * (idx + 1);
808
809 if (adapter->fw->size < tab_size)
810 return -EINVAL;
811
812 offs = le32_to_cpu(tab_desc->findex) +
813 le32_to_cpu(tab_desc->entry_size) * idx;
814 descr = (struct uni_data_desc *)&unirom[offs];
815
816 data_size = le32_to_cpu(descr->findex) + le32_to_cpu(descr->size);
817
818 if (adapter->fw->size < data_size)
819 return -EINVAL;
820
821 return 0;
822 }
823
824 static int
qlcnic_validate_fw(struct qlcnic_adapter * adapter)825 qlcnic_validate_fw(struct qlcnic_adapter *adapter)
826 {
827 struct uni_table_desc *tab_desc;
828 struct uni_data_desc *descr;
829 const u8 *unirom = adapter->fw->data;
830 u32 offs, tab_size, data_size, idx;
831 __le32 temp;
832
833 temp = *((__le32 *)&unirom[adapter->file_prd_off] +
834 QLCNIC_UNI_FIRMWARE_IDX_OFF);
835 idx = le32_to_cpu(temp);
836 tab_desc = qlcnic_get_table_desc(unirom, QLCNIC_UNI_DIR_SECT_FW);
837
838 if (!tab_desc)
839 return -EINVAL;
840
841 tab_size = le32_to_cpu(tab_desc->findex) +
842 le32_to_cpu(tab_desc->entry_size) * (idx + 1);
843
844 if (adapter->fw->size < tab_size)
845 return -EINVAL;
846
847 offs = le32_to_cpu(tab_desc->findex) +
848 le32_to_cpu(tab_desc->entry_size) * idx;
849 descr = (struct uni_data_desc *)&unirom[offs];
850 data_size = le32_to_cpu(descr->findex) + le32_to_cpu(descr->size);
851
852 if (adapter->fw->size < data_size)
853 return -EINVAL;
854
855 return 0;
856 }
857
858 static int
qlcnic_validate_product_offs(struct qlcnic_adapter * adapter)859 qlcnic_validate_product_offs(struct qlcnic_adapter *adapter)
860 {
861 struct uni_table_desc *ptab_descr;
862 const u8 *unirom = adapter->fw->data;
863 int mn_present = qlcnic_has_mn(adapter);
864 u32 entries, entry_size, tab_size, i;
865 __le32 temp;
866
867 ptab_descr = qlcnic_get_table_desc(unirom,
868 QLCNIC_UNI_DIR_SECT_PRODUCT_TBL);
869 if (!ptab_descr)
870 return -EINVAL;
871
872 entries = le32_to_cpu(ptab_descr->num_entries);
873 entry_size = le32_to_cpu(ptab_descr->entry_size);
874 tab_size = le32_to_cpu(ptab_descr->findex) + (entries * entry_size);
875
876 if (adapter->fw->size < tab_size)
877 return -EINVAL;
878
879 nomn:
880 for (i = 0; i < entries; i++) {
881
882 u32 flags, file_chiprev, offs;
883 u8 chiprev = adapter->ahw->revision_id;
884 u32 flagbit;
885
886 offs = le32_to_cpu(ptab_descr->findex) +
887 i * le32_to_cpu(ptab_descr->entry_size);
888 temp = *((__le32 *)&unirom[offs] + QLCNIC_UNI_FLAGS_OFF);
889 flags = le32_to_cpu(temp);
890 temp = *((__le32 *)&unirom[offs] + QLCNIC_UNI_CHIP_REV_OFF);
891 file_chiprev = le32_to_cpu(temp);
892
893 flagbit = mn_present ? 1 : 2;
894
895 if ((chiprev == file_chiprev) &&
896 ((1ULL << flagbit) & flags)) {
897 adapter->file_prd_off = offs;
898 return 0;
899 }
900 }
901 if (mn_present) {
902 mn_present = 0;
903 goto nomn;
904 }
905 return -EINVAL;
906 }
907
908 static int
qlcnic_validate_unified_romimage(struct qlcnic_adapter * adapter)909 qlcnic_validate_unified_romimage(struct qlcnic_adapter *adapter)
910 {
911 if (qlcnic_validate_header(adapter)) {
912 dev_err(&adapter->pdev->dev,
913 "unified image: header validation failed\n");
914 return -EINVAL;
915 }
916
917 if (qlcnic_validate_product_offs(adapter)) {
918 dev_err(&adapter->pdev->dev,
919 "unified image: product validation failed\n");
920 return -EINVAL;
921 }
922
923 if (qlcnic_validate_bootld(adapter)) {
924 dev_err(&adapter->pdev->dev,
925 "unified image: bootld validation failed\n");
926 return -EINVAL;
927 }
928
929 if (qlcnic_validate_fw(adapter)) {
930 dev_err(&adapter->pdev->dev,
931 "unified image: firmware validation failed\n");
932 return -EINVAL;
933 }
934
935 return 0;
936 }
937
938 static
qlcnic_get_data_desc(struct qlcnic_adapter * adapter,u32 section,u32 idx_offset)939 struct uni_data_desc *qlcnic_get_data_desc(struct qlcnic_adapter *adapter,
940 u32 section, u32 idx_offset)
941 {
942 const u8 *unirom = adapter->fw->data;
943 struct uni_table_desc *tab_desc;
944 u32 offs, idx;
945 __le32 temp;
946
947 temp = *((__le32 *)&unirom[adapter->file_prd_off] + idx_offset);
948 idx = le32_to_cpu(temp);
949
950 tab_desc = qlcnic_get_table_desc(unirom, section);
951
952 if (tab_desc == NULL)
953 return NULL;
954
955 offs = le32_to_cpu(tab_desc->findex) +
956 le32_to_cpu(tab_desc->entry_size) * idx;
957
958 return (struct uni_data_desc *)&unirom[offs];
959 }
960
961 static u8 *
qlcnic_get_bootld_offs(struct qlcnic_adapter * adapter)962 qlcnic_get_bootld_offs(struct qlcnic_adapter *adapter)
963 {
964 u32 offs = QLCNIC_BOOTLD_START;
965 struct uni_data_desc *data_desc;
966
967 data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_BOOTLD,
968 QLCNIC_UNI_BOOTLD_IDX_OFF);
969
970 if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
971 offs = le32_to_cpu(data_desc->findex);
972
973 return (u8 *)&adapter->fw->data[offs];
974 }
975
976 static u8 *
qlcnic_get_fw_offs(struct qlcnic_adapter * adapter)977 qlcnic_get_fw_offs(struct qlcnic_adapter *adapter)
978 {
979 u32 offs = QLCNIC_IMAGE_START;
980 struct uni_data_desc *data_desc;
981
982 data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
983 QLCNIC_UNI_FIRMWARE_IDX_OFF);
984 if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
985 offs = le32_to_cpu(data_desc->findex);
986
987 return (u8 *)&adapter->fw->data[offs];
988 }
989
qlcnic_get_fw_size(struct qlcnic_adapter * adapter)990 static u32 qlcnic_get_fw_size(struct qlcnic_adapter *adapter)
991 {
992 struct uni_data_desc *data_desc;
993 const u8 *unirom = adapter->fw->data;
994
995 data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
996 QLCNIC_UNI_FIRMWARE_IDX_OFF);
997
998 if (adapter->ahw->fw_type == QLCNIC_UNIFIED_ROMIMAGE)
999 return le32_to_cpu(data_desc->size);
1000 else
1001 return le32_to_cpu(*(__le32 *)&unirom[QLCNIC_FW_SIZE_OFFSET]);
1002 }
1003
qlcnic_get_fw_version(struct qlcnic_adapter * adapter)1004 static u32 qlcnic_get_fw_version(struct qlcnic_adapter *adapter)
1005 {
1006 struct uni_data_desc *fw_data_desc;
1007 const struct firmware *fw = adapter->fw;
1008 u32 major, minor, sub;
1009 __le32 version_offset;
1010 const u8 *ver_str;
1011 int i, ret;
1012
1013 if (adapter->ahw->fw_type != QLCNIC_UNIFIED_ROMIMAGE) {
1014 version_offset = *(__le32 *)&fw->data[QLCNIC_FW_VERSION_OFFSET];
1015 return le32_to_cpu(version_offset);
1016 }
1017
1018 fw_data_desc = qlcnic_get_data_desc(adapter, QLCNIC_UNI_DIR_SECT_FW,
1019 QLCNIC_UNI_FIRMWARE_IDX_OFF);
1020 ver_str = fw->data + le32_to_cpu(fw_data_desc->findex) +
1021 le32_to_cpu(fw_data_desc->size) - 17;
1022
1023 for (i = 0; i < 12; i++) {
1024 if (!strncmp(&ver_str[i], "REV=", 4)) {
1025 ret = sscanf(&ver_str[i+4], "%u.%u.%u ",
1026 &major, &minor, &sub);
1027 if (ret != 3)
1028 return 0;
1029 else
1030 return major + (minor << 8) + (sub << 16);
1031 }
1032 }
1033
1034 return 0;
1035 }
1036
qlcnic_get_bios_version(struct qlcnic_adapter * adapter)1037 static u32 qlcnic_get_bios_version(struct qlcnic_adapter *adapter)
1038 {
1039 const struct firmware *fw = adapter->fw;
1040 u32 bios_ver, prd_off = adapter->file_prd_off;
1041 u8 *version_offset;
1042 __le32 temp;
1043
1044 if (adapter->ahw->fw_type != QLCNIC_UNIFIED_ROMIMAGE) {
1045 version_offset = (u8 *)&fw->data[QLCNIC_BIOS_VERSION_OFFSET];
1046 return le32_to_cpu(*(__le32 *)version_offset);
1047 }
1048
1049 temp = *((__le32 *)(&fw->data[prd_off]) + QLCNIC_UNI_BIOS_VERSION_OFF);
1050 bios_ver = le32_to_cpu(temp);
1051
1052 return (bios_ver << 16) + ((bios_ver >> 8) & 0xff00) + (bios_ver >> 24);
1053 }
1054
qlcnic_rom_lock_recovery(struct qlcnic_adapter * adapter)1055 static void qlcnic_rom_lock_recovery(struct qlcnic_adapter *adapter)
1056 {
1057 if (qlcnic_pcie_sem_lock(adapter, 2, QLCNIC_ROM_LOCK_ID))
1058 dev_info(&adapter->pdev->dev, "Resetting rom_lock\n");
1059
1060 qlcnic_pcie_sem_unlock(adapter, 2);
1061 }
1062
1063 static int
qlcnic_check_fw_hearbeat(struct qlcnic_adapter * adapter)1064 qlcnic_check_fw_hearbeat(struct qlcnic_adapter *adapter)
1065 {
1066 u32 heartbeat, ret = -EIO;
1067 int retries = QLCNIC_HEARTBEAT_CHECK_RETRY_COUNT;
1068
1069 adapter->heartbeat = QLC_SHARED_REG_RD32(adapter,
1070 QLCNIC_PEG_ALIVE_COUNTER);
1071
1072 do {
1073 msleep(QLCNIC_HEARTBEAT_PERIOD_MSECS);
1074 heartbeat = QLC_SHARED_REG_RD32(adapter,
1075 QLCNIC_PEG_ALIVE_COUNTER);
1076 if (heartbeat != adapter->heartbeat) {
1077 ret = QLCNIC_RCODE_SUCCESS;
1078 break;
1079 }
1080 } while (--retries);
1081
1082 return ret;
1083 }
1084
1085 int
qlcnic_need_fw_reset(struct qlcnic_adapter * adapter)1086 qlcnic_need_fw_reset(struct qlcnic_adapter *adapter)
1087 {
1088 if ((adapter->flags & QLCNIC_FW_HANG) ||
1089 qlcnic_check_fw_hearbeat(adapter)) {
1090 qlcnic_rom_lock_recovery(adapter);
1091 return 1;
1092 }
1093
1094 if (adapter->need_fw_reset)
1095 return 1;
1096
1097 if (adapter->fw)
1098 return 1;
1099
1100 return 0;
1101 }
1102
1103 static const char *fw_name[] = {
1104 QLCNIC_UNIFIED_ROMIMAGE_NAME,
1105 QLCNIC_FLASH_ROMIMAGE_NAME,
1106 };
1107
1108 int
qlcnic_load_firmware(struct qlcnic_adapter * adapter)1109 qlcnic_load_firmware(struct qlcnic_adapter *adapter)
1110 {
1111 __le64 *ptr64;
1112 u32 i, flashaddr, size;
1113 const struct firmware *fw = adapter->fw;
1114 struct pci_dev *pdev = adapter->pdev;
1115
1116 dev_info(&pdev->dev, "loading firmware from %s\n",
1117 fw_name[adapter->ahw->fw_type]);
1118
1119 if (fw) {
1120 u64 data;
1121
1122 size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
1123
1124 ptr64 = (__le64 *)qlcnic_get_bootld_offs(adapter);
1125 flashaddr = QLCNIC_BOOTLD_START;
1126
1127 for (i = 0; i < size; i++) {
1128 data = le64_to_cpu(ptr64[i]);
1129
1130 if (qlcnic_pci_mem_write_2M(adapter, flashaddr, data))
1131 return -EIO;
1132
1133 flashaddr += 8;
1134 }
1135
1136 size = qlcnic_get_fw_size(adapter) / 8;
1137
1138 ptr64 = (__le64 *)qlcnic_get_fw_offs(adapter);
1139 flashaddr = QLCNIC_IMAGE_START;
1140
1141 for (i = 0; i < size; i++) {
1142 data = le64_to_cpu(ptr64[i]);
1143
1144 if (qlcnic_pci_mem_write_2M(adapter,
1145 flashaddr, data))
1146 return -EIO;
1147
1148 flashaddr += 8;
1149 }
1150
1151 size = qlcnic_get_fw_size(adapter) % 8;
1152 if (size) {
1153 data = le64_to_cpu(ptr64[i]);
1154
1155 if (qlcnic_pci_mem_write_2M(adapter,
1156 flashaddr, data))
1157 return -EIO;
1158 }
1159
1160 } else {
1161 u64 data;
1162 u32 hi, lo;
1163 int ret;
1164 struct qlcnic_flt_entry bootld_entry;
1165
1166 ret = qlcnic_get_flt_entry(adapter, QLCNIC_BOOTLD_REGION,
1167 &bootld_entry);
1168 if (!ret) {
1169 size = bootld_entry.size / 8;
1170 flashaddr = bootld_entry.start_addr;
1171 } else {
1172 size = (QLCNIC_IMAGE_START - QLCNIC_BOOTLD_START) / 8;
1173 flashaddr = QLCNIC_BOOTLD_START;
1174 dev_info(&pdev->dev,
1175 "using legacy method to get flash fw region");
1176 }
1177
1178 for (i = 0; i < size; i++) {
1179 if (qlcnic_rom_fast_read(adapter,
1180 flashaddr, (int *)&lo) != 0)
1181 return -EIO;
1182 if (qlcnic_rom_fast_read(adapter,
1183 flashaddr + 4, (int *)&hi) != 0)
1184 return -EIO;
1185
1186 data = (((u64)hi << 32) | lo);
1187
1188 if (qlcnic_pci_mem_write_2M(adapter,
1189 flashaddr, data))
1190 return -EIO;
1191
1192 flashaddr += 8;
1193 }
1194 }
1195 usleep_range(1000, 1500);
1196
1197 QLCWR32(adapter, QLCNIC_CRB_PEG_NET_0 + 0x18, 0x1020);
1198 QLCWR32(adapter, QLCNIC_ROMUSB_GLB_SW_RESET, 0x80001e);
1199 return 0;
1200 }
1201
1202 static int
qlcnic_validate_firmware(struct qlcnic_adapter * adapter)1203 qlcnic_validate_firmware(struct qlcnic_adapter *adapter)
1204 {
1205 u32 val;
1206 u32 ver, bios, min_size;
1207 struct pci_dev *pdev = adapter->pdev;
1208 const struct firmware *fw = adapter->fw;
1209 u8 fw_type = adapter->ahw->fw_type;
1210
1211 if (fw_type == QLCNIC_UNIFIED_ROMIMAGE) {
1212 if (qlcnic_validate_unified_romimage(adapter))
1213 return -EINVAL;
1214
1215 min_size = QLCNIC_UNI_FW_MIN_SIZE;
1216 } else {
1217 val = le32_to_cpu(*(__le32 *)&fw->data[QLCNIC_FW_MAGIC_OFFSET]);
1218 if (val != QLCNIC_BDINFO_MAGIC)
1219 return -EINVAL;
1220
1221 min_size = QLCNIC_FW_MIN_SIZE;
1222 }
1223
1224 if (fw->size < min_size)
1225 return -EINVAL;
1226
1227 val = qlcnic_get_fw_version(adapter);
1228 ver = QLCNIC_DECODE_VERSION(val);
1229
1230 if (ver < QLCNIC_MIN_FW_VERSION) {
1231 dev_err(&pdev->dev,
1232 "%s: firmware version %d.%d.%d unsupported\n",
1233 fw_name[fw_type], _major(ver), _minor(ver), _build(ver));
1234 return -EINVAL;
1235 }
1236
1237 val = qlcnic_get_bios_version(adapter);
1238 qlcnic_rom_fast_read(adapter, QLCNIC_BIOS_VERSION_OFFSET, (int *)&bios);
1239 if (val != bios) {
1240 dev_err(&pdev->dev, "%s: firmware bios is incompatible\n",
1241 fw_name[fw_type]);
1242 return -EINVAL;
1243 }
1244
1245 QLC_SHARED_REG_WR32(adapter, QLCNIC_FW_IMG_VALID, QLCNIC_BDINFO_MAGIC);
1246 return 0;
1247 }
1248
1249 static void
qlcnic_get_next_fwtype(struct qlcnic_adapter * adapter)1250 qlcnic_get_next_fwtype(struct qlcnic_adapter *adapter)
1251 {
1252 u8 fw_type;
1253
1254 switch (adapter->ahw->fw_type) {
1255 case QLCNIC_UNKNOWN_ROMIMAGE:
1256 fw_type = QLCNIC_UNIFIED_ROMIMAGE;
1257 break;
1258
1259 case QLCNIC_UNIFIED_ROMIMAGE:
1260 default:
1261 fw_type = QLCNIC_FLASH_ROMIMAGE;
1262 break;
1263 }
1264
1265 adapter->ahw->fw_type = fw_type;
1266 }
1267
1268
1269
qlcnic_request_firmware(struct qlcnic_adapter * adapter)1270 void qlcnic_request_firmware(struct qlcnic_adapter *adapter)
1271 {
1272 struct pci_dev *pdev = adapter->pdev;
1273 int rc;
1274
1275 adapter->ahw->fw_type = QLCNIC_UNKNOWN_ROMIMAGE;
1276
1277 next:
1278 qlcnic_get_next_fwtype(adapter);
1279
1280 if (adapter->ahw->fw_type == QLCNIC_FLASH_ROMIMAGE) {
1281 adapter->fw = NULL;
1282 } else {
1283 rc = request_firmware(&adapter->fw,
1284 fw_name[adapter->ahw->fw_type],
1285 &pdev->dev);
1286 if (rc != 0)
1287 goto next;
1288
1289 rc = qlcnic_validate_firmware(adapter);
1290 if (rc != 0) {
1291 release_firmware(adapter->fw);
1292 usleep_range(1000, 1500);
1293 goto next;
1294 }
1295 }
1296 }
1297
1298
1299 void
qlcnic_release_firmware(struct qlcnic_adapter * adapter)1300 qlcnic_release_firmware(struct qlcnic_adapter *adapter)
1301 {
1302 release_firmware(adapter->fw);
1303 adapter->fw = NULL;
1304 }
1305