1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * ALSA driver for RME Digi9652 audio interfaces
4 *
5 * Copyright (c) 1999 IEM - Winfried Ritsch
6 * Copyright (c) 1999-2001 Paul Davis
7 */
8
9 #include <linux/delay.h>
10 #include <linux/init.h>
11 #include <linux/interrupt.h>
12 #include <linux/pci.h>
13 #include <linux/module.h>
14 #include <linux/io.h>
15 #include <linux/nospec.h>
16
17 #include <sound/core.h>
18 #include <sound/control.h>
19 #include <sound/pcm.h>
20 #include <sound/info.h>
21 #include <sound/asoundef.h>
22 #include <sound/initval.h>
23
24 #include <asm/current.h>
25
26 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
27 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
28 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
29 static bool precise_ptr[SNDRV_CARDS]; /* Enable precise pointer */
30
31 module_param_array(index, int, NULL, 0444);
32 MODULE_PARM_DESC(index, "Index value for RME Digi9652 (Hammerfall) soundcard.");
33 module_param_array(id, charp, NULL, 0444);
34 MODULE_PARM_DESC(id, "ID string for RME Digi9652 (Hammerfall) soundcard.");
35 module_param_array(enable, bool, NULL, 0444);
36 MODULE_PARM_DESC(enable, "Enable/disable specific RME96{52,36} soundcards.");
37 module_param_array(precise_ptr, bool, NULL, 0444);
38 MODULE_PARM_DESC(precise_ptr, "Enable precise pointer (doesn't work reliably).");
39 MODULE_AUTHOR("Paul Davis <pbd@op.net>, Winfried Ritsch");
40 MODULE_DESCRIPTION("RME Digi9652/Digi9636");
41 MODULE_LICENSE("GPL");
42 MODULE_SUPPORTED_DEVICE("{{RME,Hammerfall},"
43 "{RME,Hammerfall-Light}}");
44
45 /* The Hammerfall has two sets of 24 ADAT + 2 S/PDIF channels, one for
46 capture, one for playback. Both the ADAT and S/PDIF channels appear
47 to the host CPU in the same block of memory. There is no functional
48 difference between them in terms of access.
49
50 The Hammerfall Light is identical to the Hammerfall, except that it
51 has 2 sets 18 channels (16 ADAT + 2 S/PDIF) for capture and playback.
52 */
53
54 #define RME9652_NCHANNELS 26
55 #define RME9636_NCHANNELS 18
56
57 /* Preferred sync source choices - used by "sync_pref" control switch */
58
59 #define RME9652_SYNC_FROM_SPDIF 0
60 #define RME9652_SYNC_FROM_ADAT1 1
61 #define RME9652_SYNC_FROM_ADAT2 2
62 #define RME9652_SYNC_FROM_ADAT3 3
63
64 /* Possible sources of S/PDIF input */
65
66 #define RME9652_SPDIFIN_OPTICAL 0 /* optical (ADAT1) */
67 #define RME9652_SPDIFIN_COAXIAL 1 /* coaxial (RCA) */
68 #define RME9652_SPDIFIN_INTERN 2 /* internal (CDROM) */
69
70 /* ------------- Status-Register bits --------------------- */
71
72 #define RME9652_IRQ (1<<0) /* IRQ is High if not reset by irq_clear */
73 #define RME9652_lock_2 (1<<1) /* ADAT 3-PLL: 1=locked, 0=unlocked */
74 #define RME9652_lock_1 (1<<2) /* ADAT 2-PLL: 1=locked, 0=unlocked */
75 #define RME9652_lock_0 (1<<3) /* ADAT 1-PLL: 1=locked, 0=unlocked */
76 #define RME9652_fs48 (1<<4) /* sample rate is 0=44.1/88.2,1=48/96 Khz */
77 #define RME9652_wsel_rd (1<<5) /* if Word-Clock is used and valid then 1 */
78 /* bits 6-15 encode h/w buffer pointer position */
79 #define RME9652_sync_2 (1<<16) /* if ADAT-IN 3 in sync to system clock */
80 #define RME9652_sync_1 (1<<17) /* if ADAT-IN 2 in sync to system clock */
81 #define RME9652_sync_0 (1<<18) /* if ADAT-IN 1 in sync to system clock */
82 #define RME9652_DS_rd (1<<19) /* 1=Double Speed Mode, 0=Normal Speed */
83 #define RME9652_tc_busy (1<<20) /* 1=time-code copy in progress (960ms) */
84 #define RME9652_tc_out (1<<21) /* time-code out bit */
85 #define RME9652_F_0 (1<<22) /* 000=64kHz, 100=88.2kHz, 011=96kHz */
86 #define RME9652_F_1 (1<<23) /* 111=32kHz, 110=44.1kHz, 101=48kHz, */
87 #define RME9652_F_2 (1<<24) /* external Crystal Chip if ERF=1 */
88 #define RME9652_ERF (1<<25) /* Error-Flag of SDPIF Receiver (1=No Lock) */
89 #define RME9652_buffer_id (1<<26) /* toggles by each interrupt on rec/play */
90 #define RME9652_tc_valid (1<<27) /* 1 = a signal is detected on time-code input */
91 #define RME9652_SPDIF_READ (1<<28) /* byte available from Rev 1.5+ S/PDIF interface */
92
93 #define RME9652_sync (RME9652_sync_0|RME9652_sync_1|RME9652_sync_2)
94 #define RME9652_lock (RME9652_lock_0|RME9652_lock_1|RME9652_lock_2)
95 #define RME9652_F (RME9652_F_0|RME9652_F_1|RME9652_F_2)
96 #define rme9652_decode_spdif_rate(x) ((x)>>22)
97
98 /* Bit 6..15 : h/w buffer pointer */
99
100 #define RME9652_buf_pos 0x000FFC0
101
102 /* Bits 31,30,29 are bits 5,4,3 of h/w pointer position on later
103 Rev G EEPROMS and Rev 1.5 cards or later.
104 */
105
106 #define RME9652_REV15_buf_pos(x) ((((x)&0xE0000000)>>26)|((x)&RME9652_buf_pos))
107
108 /* amount of io space we remap for register access. i'm not sure we
109 even need this much, but 1K is nice round number :)
110 */
111
112 #define RME9652_IO_EXTENT 1024
113
114 #define RME9652_init_buffer 0
115 #define RME9652_play_buffer 32 /* holds ptr to 26x64kBit host RAM */
116 #define RME9652_rec_buffer 36 /* holds ptr to 26x64kBit host RAM */
117 #define RME9652_control_register 64
118 #define RME9652_irq_clear 96
119 #define RME9652_time_code 100 /* useful if used with alesis adat */
120 #define RME9652_thru_base 128 /* 132...228 Thru for 26 channels */
121
122 /* Read-only registers */
123
124 /* Writing to any of the register locations writes to the status
125 register. We'll use the first location as our point of access.
126 */
127
128 #define RME9652_status_register 0
129
130 /* --------- Control-Register Bits ---------------- */
131
132
133 #define RME9652_start_bit (1<<0) /* start record/play */
134 /* bits 1-3 encode buffersize/latency */
135 #define RME9652_Master (1<<4) /* Clock Mode Master=1,Slave/Auto=0 */
136 #define RME9652_IE (1<<5) /* Interrupt Enable */
137 #define RME9652_freq (1<<6) /* samplerate 0=44.1/88.2, 1=48/96 kHz */
138 #define RME9652_freq1 (1<<7) /* if 0, 32kHz, else always 1 */
139 #define RME9652_DS (1<<8) /* Doule Speed 0=44.1/48, 1=88.2/96 Khz */
140 #define RME9652_PRO (1<<9) /* S/PDIF out: 0=consumer, 1=professional */
141 #define RME9652_EMP (1<<10) /* Emphasis 0=None, 1=ON */
142 #define RME9652_Dolby (1<<11) /* Non-audio bit 1=set, 0=unset */
143 #define RME9652_opt_out (1<<12) /* Use 1st optical OUT as SPDIF: 1=yes,0=no */
144 #define RME9652_wsel (1<<13) /* use Wordclock as sync (overwrites master) */
145 #define RME9652_inp_0 (1<<14) /* SPDIF-IN: 00=optical (ADAT1), */
146 #define RME9652_inp_1 (1<<15) /* 01=koaxial (Cinch), 10=Internal CDROM */
147 #define RME9652_SyncPref_ADAT2 (1<<16)
148 #define RME9652_SyncPref_ADAT3 (1<<17)
149 #define RME9652_SPDIF_RESET (1<<18) /* Rev 1.5+: h/w S/PDIF receiver */
150 #define RME9652_SPDIF_SELECT (1<<19)
151 #define RME9652_SPDIF_CLOCK (1<<20)
152 #define RME9652_SPDIF_WRITE (1<<21)
153 #define RME9652_ADAT1_INTERNAL (1<<22) /* Rev 1.5+: if set, internal CD connector carries ADAT */
154
155 /* buffersize = 512Bytes * 2^n, where n is made from Bit2 ... Bit0 */
156
157 #define RME9652_latency 0x0e
158 #define rme9652_encode_latency(x) (((x)&0x7)<<1)
159 #define rme9652_decode_latency(x) (((x)>>1)&0x7)
160 #define rme9652_running_double_speed(s) ((s)->control_register & RME9652_DS)
161 #define RME9652_inp (RME9652_inp_0|RME9652_inp_1)
162 #define rme9652_encode_spdif_in(x) (((x)&0x3)<<14)
163 #define rme9652_decode_spdif_in(x) (((x)>>14)&0x3)
164
165 #define RME9652_SyncPref_Mask (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
166 #define RME9652_SyncPref_ADAT1 0
167 #define RME9652_SyncPref_SPDIF (RME9652_SyncPref_ADAT2|RME9652_SyncPref_ADAT3)
168
169 /* the size of a substream (1 mono data stream) */
170
171 #define RME9652_CHANNEL_BUFFER_SAMPLES (16*1024)
172 #define RME9652_CHANNEL_BUFFER_BYTES (4*RME9652_CHANNEL_BUFFER_SAMPLES)
173
174 /* the size of the area we need to allocate for DMA transfers. the
175 size is the same regardless of the number of channels - the
176 9636 still uses the same memory area.
177
178 Note that we allocate 1 more channel than is apparently needed
179 because the h/w seems to write 1 byte beyond the end of the last
180 page. Sigh.
181 */
182
183 #define RME9652_DMA_AREA_BYTES ((RME9652_NCHANNELS+1) * RME9652_CHANNEL_BUFFER_BYTES)
184 #define RME9652_DMA_AREA_KILOBYTES (RME9652_DMA_AREA_BYTES/1024)
185
186 struct snd_rme9652 {
187 int dev;
188
189 spinlock_t lock;
190 int irq;
191 unsigned long port;
192 void __iomem *iobase;
193
194 int precise_ptr;
195
196 u32 control_register; /* cached value */
197 u32 thru_bits; /* thru 1=on, 0=off channel 1=Bit1... channel 26= Bit26 */
198
199 u32 creg_spdif;
200 u32 creg_spdif_stream;
201
202 char *card_name; /* hammerfall or hammerfall light names */
203
204 size_t hw_offsetmask; /* &-with status register to get real hw_offset */
205 size_t prev_hw_offset; /* previous hw offset */
206 size_t max_jitter; /* maximum jitter in frames for
207 hw pointer */
208 size_t period_bytes; /* guess what this is */
209
210 unsigned char ds_channels;
211 unsigned char ss_channels; /* different for hammerfall/hammerfall-light */
212
213 struct snd_dma_buffer playback_dma_buf;
214 struct snd_dma_buffer capture_dma_buf;
215
216 unsigned char *capture_buffer; /* suitably aligned address */
217 unsigned char *playback_buffer; /* suitably aligned address */
218
219 pid_t capture_pid;
220 pid_t playback_pid;
221
222 struct snd_pcm_substream *capture_substream;
223 struct snd_pcm_substream *playback_substream;
224 int running;
225
226 int passthru; /* non-zero if doing pass-thru */
227 int hw_rev; /* h/w rev * 10 (i.e. 1.5 has hw_rev = 15) */
228
229 int last_spdif_sample_rate; /* so that we can catch externally ... */
230 int last_adat_sample_rate; /* ... induced rate changes */
231
232 const signed char *channel_map;
233
234 struct snd_card *card;
235 struct snd_pcm *pcm;
236 struct pci_dev *pci;
237 struct snd_kcontrol *spdif_ctl;
238
239 };
240
241 /* These tables map the ALSA channels 1..N to the channels that we
242 need to use in order to find the relevant channel buffer. RME
243 refer to this kind of mapping as between "the ADAT channel and
244 the DMA channel." We index it using the logical audio channel,
245 and the value is the DMA channel (i.e. channel buffer number)
246 where the data for that channel can be read/written from/to.
247 */
248
249 static const signed char channel_map_9652_ss[26] = {
250 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
251 18, 19, 20, 21, 22, 23, 24, 25
252 };
253
254 static const signed char channel_map_9636_ss[26] = {
255 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15,
256 /* channels 16 and 17 are S/PDIF */
257 24, 25,
258 /* channels 18-25 don't exist */
259 -1, -1, -1, -1, -1, -1, -1, -1
260 };
261
262 static const signed char channel_map_9652_ds[26] = {
263 /* ADAT channels are remapped */
264 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
265 /* channels 12 and 13 are S/PDIF */
266 24, 25,
267 /* others don't exist */
268 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
269 };
270
271 static const signed char channel_map_9636_ds[26] = {
272 /* ADAT channels are remapped */
273 1, 3, 5, 7, 9, 11, 13, 15,
274 /* channels 8 and 9 are S/PDIF */
275 24, 25,
276 /* others don't exist */
277 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
278 };
279
snd_hammerfall_get_buffer(struct pci_dev * pci,struct snd_dma_buffer * dmab,size_t size)280 static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size)
281 {
282 return snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, &pci->dev, size, dmab);
283 }
284
snd_hammerfall_free_buffer(struct snd_dma_buffer * dmab,struct pci_dev * pci)285 static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci)
286 {
287 if (dmab->area)
288 snd_dma_free_pages(dmab);
289 }
290
291
292 static const struct pci_device_id snd_rme9652_ids[] = {
293 {
294 .vendor = 0x10ee,
295 .device = 0x3fc4,
296 .subvendor = PCI_ANY_ID,
297 .subdevice = PCI_ANY_ID,
298 }, /* RME Digi9652 */
299 { 0, },
300 };
301
302 MODULE_DEVICE_TABLE(pci, snd_rme9652_ids);
303
rme9652_write(struct snd_rme9652 * rme9652,int reg,int val)304 static inline void rme9652_write(struct snd_rme9652 *rme9652, int reg, int val)
305 {
306 writel(val, rme9652->iobase + reg);
307 }
308
rme9652_read(struct snd_rme9652 * rme9652,int reg)309 static inline unsigned int rme9652_read(struct snd_rme9652 *rme9652, int reg)
310 {
311 return readl(rme9652->iobase + reg);
312 }
313
snd_rme9652_use_is_exclusive(struct snd_rme9652 * rme9652)314 static inline int snd_rme9652_use_is_exclusive(struct snd_rme9652 *rme9652)
315 {
316 unsigned long flags;
317 int ret = 1;
318
319 spin_lock_irqsave(&rme9652->lock, flags);
320 if ((rme9652->playback_pid != rme9652->capture_pid) &&
321 (rme9652->playback_pid >= 0) && (rme9652->capture_pid >= 0)) {
322 ret = 0;
323 }
324 spin_unlock_irqrestore(&rme9652->lock, flags);
325 return ret;
326 }
327
rme9652_adat_sample_rate(struct snd_rme9652 * rme9652)328 static inline int rme9652_adat_sample_rate(struct snd_rme9652 *rme9652)
329 {
330 if (rme9652_running_double_speed(rme9652)) {
331 return (rme9652_read(rme9652, RME9652_status_register) &
332 RME9652_fs48) ? 96000 : 88200;
333 } else {
334 return (rme9652_read(rme9652, RME9652_status_register) &
335 RME9652_fs48) ? 48000 : 44100;
336 }
337 }
338
rme9652_compute_period_size(struct snd_rme9652 * rme9652)339 static inline void rme9652_compute_period_size(struct snd_rme9652 *rme9652)
340 {
341 unsigned int i;
342
343 i = rme9652->control_register & RME9652_latency;
344 rme9652->period_bytes = 1 << ((rme9652_decode_latency(i) + 8));
345 rme9652->hw_offsetmask =
346 (rme9652->period_bytes * 2 - 1) & RME9652_buf_pos;
347 rme9652->max_jitter = 80;
348 }
349
rme9652_hw_pointer(struct snd_rme9652 * rme9652)350 static snd_pcm_uframes_t rme9652_hw_pointer(struct snd_rme9652 *rme9652)
351 {
352 int status;
353 unsigned int offset, frag;
354 snd_pcm_uframes_t period_size = rme9652->period_bytes / 4;
355 snd_pcm_sframes_t delta;
356
357 status = rme9652_read(rme9652, RME9652_status_register);
358 if (!rme9652->precise_ptr)
359 return (status & RME9652_buffer_id) ? period_size : 0;
360 offset = status & RME9652_buf_pos;
361
362 /* The hardware may give a backward movement for up to 80 frames
363 Martin Kirst <martin.kirst@freenet.de> knows the details.
364 */
365
366 delta = rme9652->prev_hw_offset - offset;
367 delta &= 0xffff;
368 if (delta <= (snd_pcm_sframes_t)rme9652->max_jitter * 4)
369 offset = rme9652->prev_hw_offset;
370 else
371 rme9652->prev_hw_offset = offset;
372 offset &= rme9652->hw_offsetmask;
373 offset /= 4;
374 frag = status & RME9652_buffer_id;
375
376 if (offset < period_size) {
377 if (offset > rme9652->max_jitter) {
378 if (frag)
379 dev_err(rme9652->card->dev,
380 "Unexpected hw_pointer position (bufid == 0): status: %x offset: %d\n",
381 status, offset);
382 } else if (!frag)
383 return 0;
384 offset -= rme9652->max_jitter;
385 if ((int)offset < 0)
386 offset += period_size * 2;
387 } else {
388 if (offset > period_size + rme9652->max_jitter) {
389 if (!frag)
390 dev_err(rme9652->card->dev,
391 "Unexpected hw_pointer position (bufid == 1): status: %x offset: %d\n",
392 status, offset);
393 } else if (frag)
394 return period_size;
395 offset -= rme9652->max_jitter;
396 }
397
398 return offset;
399 }
400
rme9652_reset_hw_pointer(struct snd_rme9652 * rme9652)401 static inline void rme9652_reset_hw_pointer(struct snd_rme9652 *rme9652)
402 {
403 int i;
404
405 /* reset the FIFO pointer to zero. We do this by writing to 8
406 registers, each of which is a 32bit wide register, and set
407 them all to zero. Note that s->iobase is a pointer to
408 int32, not pointer to char.
409 */
410
411 for (i = 0; i < 8; i++) {
412 rme9652_write(rme9652, i * 4, 0);
413 udelay(10);
414 }
415 rme9652->prev_hw_offset = 0;
416 }
417
rme9652_start(struct snd_rme9652 * s)418 static inline void rme9652_start(struct snd_rme9652 *s)
419 {
420 s->control_register |= (RME9652_IE | RME9652_start_bit);
421 rme9652_write(s, RME9652_control_register, s->control_register);
422 }
423
rme9652_stop(struct snd_rme9652 * s)424 static inline void rme9652_stop(struct snd_rme9652 *s)
425 {
426 s->control_register &= ~(RME9652_start_bit | RME9652_IE);
427 rme9652_write(s, RME9652_control_register, s->control_register);
428 }
429
rme9652_set_interrupt_interval(struct snd_rme9652 * s,unsigned int frames)430 static int rme9652_set_interrupt_interval(struct snd_rme9652 *s,
431 unsigned int frames)
432 {
433 int restart = 0;
434 int n;
435
436 spin_lock_irq(&s->lock);
437
438 if ((restart = s->running)) {
439 rme9652_stop(s);
440 }
441
442 frames >>= 7;
443 n = 0;
444 while (frames) {
445 n++;
446 frames >>= 1;
447 }
448
449 s->control_register &= ~RME9652_latency;
450 s->control_register |= rme9652_encode_latency(n);
451
452 rme9652_write(s, RME9652_control_register, s->control_register);
453
454 rme9652_compute_period_size(s);
455
456 if (restart)
457 rme9652_start(s);
458
459 spin_unlock_irq(&s->lock);
460
461 return 0;
462 }
463
rme9652_set_rate(struct snd_rme9652 * rme9652,int rate)464 static int rme9652_set_rate(struct snd_rme9652 *rme9652, int rate)
465 {
466 int restart;
467 int reject_if_open = 0;
468 int xrate;
469
470 if (!snd_rme9652_use_is_exclusive (rme9652)) {
471 return -EBUSY;
472 }
473
474 /* Changing from a "single speed" to a "double speed" rate is
475 not allowed if any substreams are open. This is because
476 such a change causes a shift in the location of
477 the DMA buffers and a reduction in the number of available
478 buffers.
479
480 Note that a similar but essentially insoluble problem
481 exists for externally-driven rate changes. All we can do
482 is to flag rate changes in the read/write routines.
483 */
484
485 spin_lock_irq(&rme9652->lock);
486 xrate = rme9652_adat_sample_rate(rme9652);
487
488 switch (rate) {
489 case 44100:
490 if (xrate > 48000) {
491 reject_if_open = 1;
492 }
493 rate = 0;
494 break;
495 case 48000:
496 if (xrate > 48000) {
497 reject_if_open = 1;
498 }
499 rate = RME9652_freq;
500 break;
501 case 88200:
502 if (xrate < 48000) {
503 reject_if_open = 1;
504 }
505 rate = RME9652_DS;
506 break;
507 case 96000:
508 if (xrate < 48000) {
509 reject_if_open = 1;
510 }
511 rate = RME9652_DS | RME9652_freq;
512 break;
513 default:
514 spin_unlock_irq(&rme9652->lock);
515 return -EINVAL;
516 }
517
518 if (reject_if_open && (rme9652->capture_pid >= 0 || rme9652->playback_pid >= 0)) {
519 spin_unlock_irq(&rme9652->lock);
520 return -EBUSY;
521 }
522
523 if ((restart = rme9652->running)) {
524 rme9652_stop(rme9652);
525 }
526 rme9652->control_register &= ~(RME9652_freq | RME9652_DS);
527 rme9652->control_register |= rate;
528 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
529
530 if (restart) {
531 rme9652_start(rme9652);
532 }
533
534 if (rate & RME9652_DS) {
535 if (rme9652->ss_channels == RME9652_NCHANNELS) {
536 rme9652->channel_map = channel_map_9652_ds;
537 } else {
538 rme9652->channel_map = channel_map_9636_ds;
539 }
540 } else {
541 if (rme9652->ss_channels == RME9652_NCHANNELS) {
542 rme9652->channel_map = channel_map_9652_ss;
543 } else {
544 rme9652->channel_map = channel_map_9636_ss;
545 }
546 }
547
548 spin_unlock_irq(&rme9652->lock);
549 return 0;
550 }
551
rme9652_set_thru(struct snd_rme9652 * rme9652,int channel,int enable)552 static void rme9652_set_thru(struct snd_rme9652 *rme9652, int channel, int enable)
553 {
554 int i;
555
556 rme9652->passthru = 0;
557
558 if (channel < 0) {
559
560 /* set thru for all channels */
561
562 if (enable) {
563 for (i = 0; i < RME9652_NCHANNELS; i++) {
564 rme9652->thru_bits |= (1 << i);
565 rme9652_write(rme9652, RME9652_thru_base + i * 4, 1);
566 }
567 } else {
568 for (i = 0; i < RME9652_NCHANNELS; i++) {
569 rme9652->thru_bits &= ~(1 << i);
570 rme9652_write(rme9652, RME9652_thru_base + i * 4, 0);
571 }
572 }
573
574 } else {
575 int mapped_channel;
576
577 mapped_channel = rme9652->channel_map[channel];
578
579 if (enable) {
580 rme9652->thru_bits |= (1 << mapped_channel);
581 } else {
582 rme9652->thru_bits &= ~(1 << mapped_channel);
583 }
584
585 rme9652_write(rme9652,
586 RME9652_thru_base + mapped_channel * 4,
587 enable ? 1 : 0);
588 }
589 }
590
rme9652_set_passthru(struct snd_rme9652 * rme9652,int onoff)591 static int rme9652_set_passthru(struct snd_rme9652 *rme9652, int onoff)
592 {
593 if (onoff) {
594 rme9652_set_thru(rme9652, -1, 1);
595
596 /* we don't want interrupts, so do a
597 custom version of rme9652_start().
598 */
599
600 rme9652->control_register =
601 RME9652_inp_0 |
602 rme9652_encode_latency(7) |
603 RME9652_start_bit;
604
605 rme9652_reset_hw_pointer(rme9652);
606
607 rme9652_write(rme9652, RME9652_control_register,
608 rme9652->control_register);
609 rme9652->passthru = 1;
610 } else {
611 rme9652_set_thru(rme9652, -1, 0);
612 rme9652_stop(rme9652);
613 rme9652->passthru = 0;
614 }
615
616 return 0;
617 }
618
rme9652_spdif_set_bit(struct snd_rme9652 * rme9652,int mask,int onoff)619 static void rme9652_spdif_set_bit (struct snd_rme9652 *rme9652, int mask, int onoff)
620 {
621 if (onoff)
622 rme9652->control_register |= mask;
623 else
624 rme9652->control_register &= ~mask;
625
626 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
627 }
628
rme9652_spdif_write_byte(struct snd_rme9652 * rme9652,const int val)629 static void rme9652_spdif_write_byte (struct snd_rme9652 *rme9652, const int val)
630 {
631 long mask;
632 long i;
633
634 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
635 if (val & mask)
636 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 1);
637 else
638 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_WRITE, 0);
639
640 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
641 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
642 }
643 }
644
rme9652_spdif_read_byte(struct snd_rme9652 * rme9652)645 static int rme9652_spdif_read_byte (struct snd_rme9652 *rme9652)
646 {
647 long mask;
648 long val;
649 long i;
650
651 val = 0;
652
653 for (i = 0, mask = 0x80; i < 8; i++, mask >>= 1) {
654 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 1);
655 if (rme9652_read (rme9652, RME9652_status_register) & RME9652_SPDIF_READ)
656 val |= mask;
657 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_CLOCK, 0);
658 }
659
660 return val;
661 }
662
rme9652_write_spdif_codec(struct snd_rme9652 * rme9652,const int address,const int data)663 static void rme9652_write_spdif_codec (struct snd_rme9652 *rme9652, const int address, const int data)
664 {
665 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
666 rme9652_spdif_write_byte (rme9652, 0x20);
667 rme9652_spdif_write_byte (rme9652, address);
668 rme9652_spdif_write_byte (rme9652, data);
669 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
670 }
671
672
rme9652_spdif_read_codec(struct snd_rme9652 * rme9652,const int address)673 static int rme9652_spdif_read_codec (struct snd_rme9652 *rme9652, const int address)
674 {
675 int ret;
676
677 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
678 rme9652_spdif_write_byte (rme9652, 0x20);
679 rme9652_spdif_write_byte (rme9652, address);
680 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
681 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 1);
682
683 rme9652_spdif_write_byte (rme9652, 0x21);
684 ret = rme9652_spdif_read_byte (rme9652);
685 rme9652_spdif_set_bit (rme9652, RME9652_SPDIF_SELECT, 0);
686
687 return ret;
688 }
689
rme9652_initialize_spdif_receiver(struct snd_rme9652 * rme9652)690 static void rme9652_initialize_spdif_receiver (struct snd_rme9652 *rme9652)
691 {
692 /* XXX what unsets this ? */
693
694 rme9652->control_register |= RME9652_SPDIF_RESET;
695
696 rme9652_write_spdif_codec (rme9652, 4, 0x40);
697 rme9652_write_spdif_codec (rme9652, 17, 0x13);
698 rme9652_write_spdif_codec (rme9652, 6, 0x02);
699 }
700
rme9652_spdif_sample_rate(struct snd_rme9652 * s)701 static inline int rme9652_spdif_sample_rate(struct snd_rme9652 *s)
702 {
703 unsigned int rate_bits;
704
705 if (rme9652_read(s, RME9652_status_register) & RME9652_ERF) {
706 return -1; /* error condition */
707 }
708
709 if (s->hw_rev == 15) {
710
711 int x, y, ret;
712
713 x = rme9652_spdif_read_codec (s, 30);
714
715 if (x != 0)
716 y = 48000 * 64 / x;
717 else
718 y = 0;
719
720 if (y > 30400 && y < 33600) ret = 32000;
721 else if (y > 41900 && y < 46000) ret = 44100;
722 else if (y > 46000 && y < 50400) ret = 48000;
723 else if (y > 60800 && y < 67200) ret = 64000;
724 else if (y > 83700 && y < 92000) ret = 88200;
725 else if (y > 92000 && y < 100000) ret = 96000;
726 else ret = 0;
727 return ret;
728 }
729
730 rate_bits = rme9652_read(s, RME9652_status_register) & RME9652_F;
731
732 switch (rme9652_decode_spdif_rate(rate_bits)) {
733 case 0x7:
734 return 32000;
735 break;
736
737 case 0x6:
738 return 44100;
739 break;
740
741 case 0x5:
742 return 48000;
743 break;
744
745 case 0x4:
746 return 88200;
747 break;
748
749 case 0x3:
750 return 96000;
751 break;
752
753 case 0x0:
754 return 64000;
755 break;
756
757 default:
758 dev_err(s->card->dev,
759 "%s: unknown S/PDIF input rate (bits = 0x%x)\n",
760 s->card_name, rate_bits);
761 return 0;
762 break;
763 }
764 }
765
766 /*-----------------------------------------------------------------------------
767 Control Interface
768 ----------------------------------------------------------------------------*/
769
snd_rme9652_convert_from_aes(struct snd_aes_iec958 * aes)770 static u32 snd_rme9652_convert_from_aes(struct snd_aes_iec958 *aes)
771 {
772 u32 val = 0;
773 val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? RME9652_PRO : 0;
774 val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? RME9652_Dolby : 0;
775 if (val & RME9652_PRO)
776 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? RME9652_EMP : 0;
777 else
778 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? RME9652_EMP : 0;
779 return val;
780 }
781
snd_rme9652_convert_to_aes(struct snd_aes_iec958 * aes,u32 val)782 static void snd_rme9652_convert_to_aes(struct snd_aes_iec958 *aes, u32 val)
783 {
784 aes->status[0] = ((val & RME9652_PRO) ? IEC958_AES0_PROFESSIONAL : 0) |
785 ((val & RME9652_Dolby) ? IEC958_AES0_NONAUDIO : 0);
786 if (val & RME9652_PRO)
787 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
788 else
789 aes->status[0] |= (val & RME9652_EMP) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
790 }
791
snd_rme9652_control_spdif_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)792 static int snd_rme9652_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
793 {
794 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
795 uinfo->count = 1;
796 return 0;
797 }
798
snd_rme9652_control_spdif_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)799 static int snd_rme9652_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
800 {
801 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
802
803 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif);
804 return 0;
805 }
806
snd_rme9652_control_spdif_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)807 static int snd_rme9652_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
808 {
809 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
810 int change;
811 u32 val;
812
813 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
814 spin_lock_irq(&rme9652->lock);
815 change = val != rme9652->creg_spdif;
816 rme9652->creg_spdif = val;
817 spin_unlock_irq(&rme9652->lock);
818 return change;
819 }
820
snd_rme9652_control_spdif_stream_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)821 static int snd_rme9652_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
822 {
823 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
824 uinfo->count = 1;
825 return 0;
826 }
827
snd_rme9652_control_spdif_stream_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)828 static int snd_rme9652_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
829 {
830 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
831
832 snd_rme9652_convert_to_aes(&ucontrol->value.iec958, rme9652->creg_spdif_stream);
833 return 0;
834 }
835
snd_rme9652_control_spdif_stream_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)836 static int snd_rme9652_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
837 {
838 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
839 int change;
840 u32 val;
841
842 val = snd_rme9652_convert_from_aes(&ucontrol->value.iec958);
843 spin_lock_irq(&rme9652->lock);
844 change = val != rme9652->creg_spdif_stream;
845 rme9652->creg_spdif_stream = val;
846 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
847 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= val);
848 spin_unlock_irq(&rme9652->lock);
849 return change;
850 }
851
snd_rme9652_control_spdif_mask_info(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)852 static int snd_rme9652_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
853 {
854 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
855 uinfo->count = 1;
856 return 0;
857 }
858
snd_rme9652_control_spdif_mask_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)859 static int snd_rme9652_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
860 {
861 ucontrol->value.iec958.status[0] = kcontrol->private_value;
862 return 0;
863 }
864
865 #define RME9652_ADAT1_IN(xname, xindex) \
866 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
867 .info = snd_rme9652_info_adat1_in, \
868 .get = snd_rme9652_get_adat1_in, \
869 .put = snd_rme9652_put_adat1_in }
870
rme9652_adat1_in(struct snd_rme9652 * rme9652)871 static unsigned int rme9652_adat1_in(struct snd_rme9652 *rme9652)
872 {
873 if (rme9652->control_register & RME9652_ADAT1_INTERNAL)
874 return 1;
875 return 0;
876 }
877
rme9652_set_adat1_input(struct snd_rme9652 * rme9652,int internal)878 static int rme9652_set_adat1_input(struct snd_rme9652 *rme9652, int internal)
879 {
880 int restart = 0;
881
882 if (internal) {
883 rme9652->control_register |= RME9652_ADAT1_INTERNAL;
884 } else {
885 rme9652->control_register &= ~RME9652_ADAT1_INTERNAL;
886 }
887
888 /* XXX do we actually need to stop the card when we do this ? */
889
890 if ((restart = rme9652->running)) {
891 rme9652_stop(rme9652);
892 }
893
894 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
895
896 if (restart) {
897 rme9652_start(rme9652);
898 }
899
900 return 0;
901 }
902
snd_rme9652_info_adat1_in(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)903 static int snd_rme9652_info_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
904 {
905 static const char * const texts[2] = {"ADAT1", "Internal"};
906
907 return snd_ctl_enum_info(uinfo, 1, 2, texts);
908 }
909
snd_rme9652_get_adat1_in(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)910 static int snd_rme9652_get_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
911 {
912 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
913
914 spin_lock_irq(&rme9652->lock);
915 ucontrol->value.enumerated.item[0] = rme9652_adat1_in(rme9652);
916 spin_unlock_irq(&rme9652->lock);
917 return 0;
918 }
919
snd_rme9652_put_adat1_in(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)920 static int snd_rme9652_put_adat1_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
921 {
922 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
923 int change;
924 unsigned int val;
925
926 if (!snd_rme9652_use_is_exclusive(rme9652))
927 return -EBUSY;
928 val = ucontrol->value.enumerated.item[0] % 2;
929 spin_lock_irq(&rme9652->lock);
930 change = val != rme9652_adat1_in(rme9652);
931 if (change)
932 rme9652_set_adat1_input(rme9652, val);
933 spin_unlock_irq(&rme9652->lock);
934 return change;
935 }
936
937 #define RME9652_SPDIF_IN(xname, xindex) \
938 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
939 .info = snd_rme9652_info_spdif_in, \
940 .get = snd_rme9652_get_spdif_in, .put = snd_rme9652_put_spdif_in }
941
rme9652_spdif_in(struct snd_rme9652 * rme9652)942 static unsigned int rme9652_spdif_in(struct snd_rme9652 *rme9652)
943 {
944 return rme9652_decode_spdif_in(rme9652->control_register &
945 RME9652_inp);
946 }
947
rme9652_set_spdif_input(struct snd_rme9652 * rme9652,int in)948 static int rme9652_set_spdif_input(struct snd_rme9652 *rme9652, int in)
949 {
950 int restart = 0;
951
952 rme9652->control_register &= ~RME9652_inp;
953 rme9652->control_register |= rme9652_encode_spdif_in(in);
954
955 if ((restart = rme9652->running)) {
956 rme9652_stop(rme9652);
957 }
958
959 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
960
961 if (restart) {
962 rme9652_start(rme9652);
963 }
964
965 return 0;
966 }
967
snd_rme9652_info_spdif_in(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)968 static int snd_rme9652_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
969 {
970 static const char * const texts[3] = {"ADAT1", "Coaxial", "Internal"};
971
972 return snd_ctl_enum_info(uinfo, 1, 3, texts);
973 }
974
snd_rme9652_get_spdif_in(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)975 static int snd_rme9652_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
976 {
977 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
978
979 spin_lock_irq(&rme9652->lock);
980 ucontrol->value.enumerated.item[0] = rme9652_spdif_in(rme9652);
981 spin_unlock_irq(&rme9652->lock);
982 return 0;
983 }
984
snd_rme9652_put_spdif_in(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)985 static int snd_rme9652_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
986 {
987 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
988 int change;
989 unsigned int val;
990
991 if (!snd_rme9652_use_is_exclusive(rme9652))
992 return -EBUSY;
993 val = ucontrol->value.enumerated.item[0] % 3;
994 spin_lock_irq(&rme9652->lock);
995 change = val != rme9652_spdif_in(rme9652);
996 if (change)
997 rme9652_set_spdif_input(rme9652, val);
998 spin_unlock_irq(&rme9652->lock);
999 return change;
1000 }
1001
1002 #define RME9652_SPDIF_OUT(xname, xindex) \
1003 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1004 .info = snd_rme9652_info_spdif_out, \
1005 .get = snd_rme9652_get_spdif_out, .put = snd_rme9652_put_spdif_out }
1006
rme9652_spdif_out(struct snd_rme9652 * rme9652)1007 static int rme9652_spdif_out(struct snd_rme9652 *rme9652)
1008 {
1009 return (rme9652->control_register & RME9652_opt_out) ? 1 : 0;
1010 }
1011
rme9652_set_spdif_output(struct snd_rme9652 * rme9652,int out)1012 static int rme9652_set_spdif_output(struct snd_rme9652 *rme9652, int out)
1013 {
1014 int restart = 0;
1015
1016 if (out) {
1017 rme9652->control_register |= RME9652_opt_out;
1018 } else {
1019 rme9652->control_register &= ~RME9652_opt_out;
1020 }
1021
1022 if ((restart = rme9652->running)) {
1023 rme9652_stop(rme9652);
1024 }
1025
1026 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1027
1028 if (restart) {
1029 rme9652_start(rme9652);
1030 }
1031
1032 return 0;
1033 }
1034
1035 #define snd_rme9652_info_spdif_out snd_ctl_boolean_mono_info
1036
snd_rme9652_get_spdif_out(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1037 static int snd_rme9652_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1038 {
1039 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1040
1041 spin_lock_irq(&rme9652->lock);
1042 ucontrol->value.integer.value[0] = rme9652_spdif_out(rme9652);
1043 spin_unlock_irq(&rme9652->lock);
1044 return 0;
1045 }
1046
snd_rme9652_put_spdif_out(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1047 static int snd_rme9652_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1048 {
1049 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1050 int change;
1051 unsigned int val;
1052
1053 if (!snd_rme9652_use_is_exclusive(rme9652))
1054 return -EBUSY;
1055 val = ucontrol->value.integer.value[0] & 1;
1056 spin_lock_irq(&rme9652->lock);
1057 change = (int)val != rme9652_spdif_out(rme9652);
1058 rme9652_set_spdif_output(rme9652, val);
1059 spin_unlock_irq(&rme9652->lock);
1060 return change;
1061 }
1062
1063 #define RME9652_SYNC_MODE(xname, xindex) \
1064 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1065 .info = snd_rme9652_info_sync_mode, \
1066 .get = snd_rme9652_get_sync_mode, .put = snd_rme9652_put_sync_mode }
1067
rme9652_sync_mode(struct snd_rme9652 * rme9652)1068 static int rme9652_sync_mode(struct snd_rme9652 *rme9652)
1069 {
1070 if (rme9652->control_register & RME9652_wsel) {
1071 return 2;
1072 } else if (rme9652->control_register & RME9652_Master) {
1073 return 1;
1074 } else {
1075 return 0;
1076 }
1077 }
1078
rme9652_set_sync_mode(struct snd_rme9652 * rme9652,int mode)1079 static int rme9652_set_sync_mode(struct snd_rme9652 *rme9652, int mode)
1080 {
1081 int restart = 0;
1082
1083 switch (mode) {
1084 case 0:
1085 rme9652->control_register &=
1086 ~(RME9652_Master | RME9652_wsel);
1087 break;
1088 case 1:
1089 rme9652->control_register =
1090 (rme9652->control_register & ~RME9652_wsel) | RME9652_Master;
1091 break;
1092 case 2:
1093 rme9652->control_register |=
1094 (RME9652_Master | RME9652_wsel);
1095 break;
1096 }
1097
1098 if ((restart = rme9652->running)) {
1099 rme9652_stop(rme9652);
1100 }
1101
1102 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1103
1104 if (restart) {
1105 rme9652_start(rme9652);
1106 }
1107
1108 return 0;
1109 }
1110
snd_rme9652_info_sync_mode(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)1111 static int snd_rme9652_info_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1112 {
1113 static const char * const texts[3] = {
1114 "AutoSync", "Master", "Word Clock"
1115 };
1116
1117 return snd_ctl_enum_info(uinfo, 1, 3, texts);
1118 }
1119
snd_rme9652_get_sync_mode(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1120 static int snd_rme9652_get_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1121 {
1122 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1123
1124 spin_lock_irq(&rme9652->lock);
1125 ucontrol->value.enumerated.item[0] = rme9652_sync_mode(rme9652);
1126 spin_unlock_irq(&rme9652->lock);
1127 return 0;
1128 }
1129
snd_rme9652_put_sync_mode(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1130 static int snd_rme9652_put_sync_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1131 {
1132 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1133 int change;
1134 unsigned int val;
1135
1136 val = ucontrol->value.enumerated.item[0] % 3;
1137 spin_lock_irq(&rme9652->lock);
1138 change = (int)val != rme9652_sync_mode(rme9652);
1139 rme9652_set_sync_mode(rme9652, val);
1140 spin_unlock_irq(&rme9652->lock);
1141 return change;
1142 }
1143
1144 #define RME9652_SYNC_PREF(xname, xindex) \
1145 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1146 .info = snd_rme9652_info_sync_pref, \
1147 .get = snd_rme9652_get_sync_pref, .put = snd_rme9652_put_sync_pref }
1148
rme9652_sync_pref(struct snd_rme9652 * rme9652)1149 static int rme9652_sync_pref(struct snd_rme9652 *rme9652)
1150 {
1151 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1152 case RME9652_SyncPref_ADAT1:
1153 return RME9652_SYNC_FROM_ADAT1;
1154 case RME9652_SyncPref_ADAT2:
1155 return RME9652_SYNC_FROM_ADAT2;
1156 case RME9652_SyncPref_ADAT3:
1157 return RME9652_SYNC_FROM_ADAT3;
1158 case RME9652_SyncPref_SPDIF:
1159 return RME9652_SYNC_FROM_SPDIF;
1160 }
1161 /* Not reachable */
1162 return 0;
1163 }
1164
rme9652_set_sync_pref(struct snd_rme9652 * rme9652,int pref)1165 static int rme9652_set_sync_pref(struct snd_rme9652 *rme9652, int pref)
1166 {
1167 int restart;
1168
1169 rme9652->control_register &= ~RME9652_SyncPref_Mask;
1170 switch (pref) {
1171 case RME9652_SYNC_FROM_ADAT1:
1172 rme9652->control_register |= RME9652_SyncPref_ADAT1;
1173 break;
1174 case RME9652_SYNC_FROM_ADAT2:
1175 rme9652->control_register |= RME9652_SyncPref_ADAT2;
1176 break;
1177 case RME9652_SYNC_FROM_ADAT3:
1178 rme9652->control_register |= RME9652_SyncPref_ADAT3;
1179 break;
1180 case RME9652_SYNC_FROM_SPDIF:
1181 rme9652->control_register |= RME9652_SyncPref_SPDIF;
1182 break;
1183 }
1184
1185 if ((restart = rme9652->running)) {
1186 rme9652_stop(rme9652);
1187 }
1188
1189 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1190
1191 if (restart) {
1192 rme9652_start(rme9652);
1193 }
1194
1195 return 0;
1196 }
1197
snd_rme9652_info_sync_pref(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)1198 static int snd_rme9652_info_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1199 {
1200 static const char * const texts[4] = {
1201 "IEC958 In", "ADAT1 In", "ADAT2 In", "ADAT3 In"
1202 };
1203 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1204
1205 return snd_ctl_enum_info(uinfo, 1,
1206 rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3,
1207 texts);
1208 }
1209
snd_rme9652_get_sync_pref(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1210 static int snd_rme9652_get_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1211 {
1212 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1213
1214 spin_lock_irq(&rme9652->lock);
1215 ucontrol->value.enumerated.item[0] = rme9652_sync_pref(rme9652);
1216 spin_unlock_irq(&rme9652->lock);
1217 return 0;
1218 }
1219
snd_rme9652_put_sync_pref(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1220 static int snd_rme9652_put_sync_pref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1221 {
1222 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1223 int change, max;
1224 unsigned int val;
1225
1226 if (!snd_rme9652_use_is_exclusive(rme9652))
1227 return -EBUSY;
1228 max = rme9652->ss_channels == RME9652_NCHANNELS ? 4 : 3;
1229 val = ucontrol->value.enumerated.item[0] % max;
1230 spin_lock_irq(&rme9652->lock);
1231 change = (int)val != rme9652_sync_pref(rme9652);
1232 rme9652_set_sync_pref(rme9652, val);
1233 spin_unlock_irq(&rme9652->lock);
1234 return change;
1235 }
1236
snd_rme9652_info_thru(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)1237 static int snd_rme9652_info_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1238 {
1239 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1240 uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
1241 uinfo->count = rme9652->ss_channels;
1242 uinfo->value.integer.min = 0;
1243 uinfo->value.integer.max = 1;
1244 return 0;
1245 }
1246
snd_rme9652_get_thru(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1247 static int snd_rme9652_get_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1248 {
1249 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1250 unsigned int k;
1251 u32 thru_bits = rme9652->thru_bits;
1252
1253 for (k = 0; k < rme9652->ss_channels; ++k) {
1254 ucontrol->value.integer.value[k] = !!(thru_bits & (1 << k));
1255 }
1256 return 0;
1257 }
1258
snd_rme9652_put_thru(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1259 static int snd_rme9652_put_thru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1260 {
1261 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1262 int change;
1263 unsigned int chn;
1264 u32 thru_bits = 0;
1265
1266 if (!snd_rme9652_use_is_exclusive(rme9652))
1267 return -EBUSY;
1268
1269 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1270 if (ucontrol->value.integer.value[chn])
1271 thru_bits |= 1 << chn;
1272 }
1273
1274 spin_lock_irq(&rme9652->lock);
1275 change = thru_bits ^ rme9652->thru_bits;
1276 if (change) {
1277 for (chn = 0; chn < rme9652->ss_channels; ++chn) {
1278 if (!(change & (1 << chn)))
1279 continue;
1280 rme9652_set_thru(rme9652,chn,thru_bits&(1<<chn));
1281 }
1282 }
1283 spin_unlock_irq(&rme9652->lock);
1284 return !!change;
1285 }
1286
1287 #define RME9652_PASSTHRU(xname, xindex) \
1288 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1289 .info = snd_rme9652_info_passthru, \
1290 .put = snd_rme9652_put_passthru, \
1291 .get = snd_rme9652_get_passthru }
1292
1293 #define snd_rme9652_info_passthru snd_ctl_boolean_mono_info
1294
snd_rme9652_get_passthru(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1295 static int snd_rme9652_get_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1296 {
1297 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1298
1299 spin_lock_irq(&rme9652->lock);
1300 ucontrol->value.integer.value[0] = rme9652->passthru;
1301 spin_unlock_irq(&rme9652->lock);
1302 return 0;
1303 }
1304
snd_rme9652_put_passthru(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1305 static int snd_rme9652_put_passthru(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1306 {
1307 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1308 int change;
1309 unsigned int val;
1310 int err = 0;
1311
1312 if (!snd_rme9652_use_is_exclusive(rme9652))
1313 return -EBUSY;
1314
1315 val = ucontrol->value.integer.value[0] & 1;
1316 spin_lock_irq(&rme9652->lock);
1317 change = (ucontrol->value.integer.value[0] != rme9652->passthru);
1318 if (change)
1319 err = rme9652_set_passthru(rme9652, val);
1320 spin_unlock_irq(&rme9652->lock);
1321 return err ? err : change;
1322 }
1323
1324 /* Read-only switches */
1325
1326 #define RME9652_SPDIF_RATE(xname, xindex) \
1327 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1328 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1329 .info = snd_rme9652_info_spdif_rate, \
1330 .get = snd_rme9652_get_spdif_rate }
1331
snd_rme9652_info_spdif_rate(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)1332 static int snd_rme9652_info_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1333 {
1334 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1335 uinfo->count = 1;
1336 uinfo->value.integer.min = 0;
1337 uinfo->value.integer.max = 96000;
1338 return 0;
1339 }
1340
snd_rme9652_get_spdif_rate(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1341 static int snd_rme9652_get_spdif_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1342 {
1343 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1344
1345 spin_lock_irq(&rme9652->lock);
1346 ucontrol->value.integer.value[0] = rme9652_spdif_sample_rate(rme9652);
1347 spin_unlock_irq(&rme9652->lock);
1348 return 0;
1349 }
1350
1351 #define RME9652_ADAT_SYNC(xname, xindex, xidx) \
1352 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1353 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1354 .info = snd_rme9652_info_adat_sync, \
1355 .get = snd_rme9652_get_adat_sync, .private_value = xidx }
1356
snd_rme9652_info_adat_sync(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_info * uinfo)1357 static int snd_rme9652_info_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1358 {
1359 static const char * const texts[4] = {
1360 "No Lock", "Lock", "No Lock Sync", "Lock Sync"
1361 };
1362
1363 return snd_ctl_enum_info(uinfo, 1, 4, texts);
1364 }
1365
snd_rme9652_get_adat_sync(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1366 static int snd_rme9652_get_adat_sync(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1367 {
1368 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1369 unsigned int mask1, mask2, val;
1370
1371 switch (kcontrol->private_value) {
1372 case 0: mask1 = RME9652_lock_0; mask2 = RME9652_sync_0; break;
1373 case 1: mask1 = RME9652_lock_1; mask2 = RME9652_sync_1; break;
1374 case 2: mask1 = RME9652_lock_2; mask2 = RME9652_sync_2; break;
1375 default: return -EINVAL;
1376 }
1377 val = rme9652_read(rme9652, RME9652_status_register);
1378 ucontrol->value.enumerated.item[0] = (val & mask1) ? 1 : 0;
1379 ucontrol->value.enumerated.item[0] |= (val & mask2) ? 2 : 0;
1380 return 0;
1381 }
1382
1383 #define RME9652_TC_VALID(xname, xindex) \
1384 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1385 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
1386 .info = snd_rme9652_info_tc_valid, \
1387 .get = snd_rme9652_get_tc_valid }
1388
1389 #define snd_rme9652_info_tc_valid snd_ctl_boolean_mono_info
1390
snd_rme9652_get_tc_valid(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1391 static int snd_rme9652_get_tc_valid(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1392 {
1393 struct snd_rme9652 *rme9652 = snd_kcontrol_chip(kcontrol);
1394
1395 ucontrol->value.integer.value[0] =
1396 (rme9652_read(rme9652, RME9652_status_register) & RME9652_tc_valid) ? 1 : 0;
1397 return 0;
1398 }
1399
1400 #ifdef ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE
1401
1402 /* FIXME: this routine needs a port to the new control API --jk */
1403
snd_rme9652_get_tc_value(void * private_data,snd_kswitch_t * kswitch,snd_switch_t * uswitch)1404 static int snd_rme9652_get_tc_value(void *private_data,
1405 snd_kswitch_t *kswitch,
1406 snd_switch_t *uswitch)
1407 {
1408 struct snd_rme9652 *s = (struct snd_rme9652 *) private_data;
1409 u32 value;
1410 int i;
1411
1412 uswitch->type = SNDRV_SW_TYPE_DWORD;
1413
1414 if ((rme9652_read(s, RME9652_status_register) &
1415 RME9652_tc_valid) == 0) {
1416 uswitch->value.data32[0] = 0;
1417 return 0;
1418 }
1419
1420 /* timecode request */
1421
1422 rme9652_write(s, RME9652_time_code, 0);
1423
1424 /* XXX bug alert: loop-based timing !!!! */
1425
1426 for (i = 0; i < 50; i++) {
1427 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy))
1428 break;
1429 }
1430
1431 if (!(rme9652_read(s, i * 4) & RME9652_tc_busy)) {
1432 return -EIO;
1433 }
1434
1435 value = 0;
1436
1437 for (i = 0; i < 32; i++) {
1438 value >>= 1;
1439
1440 if (rme9652_read(s, i * 4) & RME9652_tc_out)
1441 value |= 0x80000000;
1442 }
1443
1444 if (value > 2 * 60 * 48000) {
1445 value -= 2 * 60 * 48000;
1446 } else {
1447 value = 0;
1448 }
1449
1450 uswitch->value.data32[0] = value;
1451
1452 return 0;
1453 }
1454
1455 #endif /* ALSA_HAS_STANDARD_WAY_OF_RETURNING_TIMECODE */
1456
1457 static const struct snd_kcontrol_new snd_rme9652_controls[] = {
1458 {
1459 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1460 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
1461 .info = snd_rme9652_control_spdif_info,
1462 .get = snd_rme9652_control_spdif_get,
1463 .put = snd_rme9652_control_spdif_put,
1464 },
1465 {
1466 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
1467 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1468 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
1469 .info = snd_rme9652_control_spdif_stream_info,
1470 .get = snd_rme9652_control_spdif_stream_get,
1471 .put = snd_rme9652_control_spdif_stream_put,
1472 },
1473 {
1474 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1475 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1476 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
1477 .info = snd_rme9652_control_spdif_mask_info,
1478 .get = snd_rme9652_control_spdif_mask_get,
1479 .private_value = IEC958_AES0_NONAUDIO |
1480 IEC958_AES0_PROFESSIONAL |
1481 IEC958_AES0_CON_EMPHASIS,
1482 },
1483 {
1484 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1485 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1486 .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
1487 .info = snd_rme9652_control_spdif_mask_info,
1488 .get = snd_rme9652_control_spdif_mask_get,
1489 .private_value = IEC958_AES0_NONAUDIO |
1490 IEC958_AES0_PROFESSIONAL |
1491 IEC958_AES0_PRO_EMPHASIS,
1492 },
1493 RME9652_SPDIF_IN("IEC958 Input Connector", 0),
1494 RME9652_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
1495 RME9652_SYNC_MODE("Sync Mode", 0),
1496 RME9652_SYNC_PREF("Preferred Sync Source", 0),
1497 {
1498 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1499 .name = "Channels Thru",
1500 .index = 0,
1501 .info = snd_rme9652_info_thru,
1502 .get = snd_rme9652_get_thru,
1503 .put = snd_rme9652_put_thru,
1504 },
1505 RME9652_SPDIF_RATE("IEC958 Sample Rate", 0),
1506 RME9652_ADAT_SYNC("ADAT1 Sync Check", 0, 0),
1507 RME9652_ADAT_SYNC("ADAT2 Sync Check", 0, 1),
1508 RME9652_TC_VALID("Timecode Valid", 0),
1509 RME9652_PASSTHRU("Passthru", 0)
1510 };
1511
1512 static const struct snd_kcontrol_new snd_rme9652_adat3_check =
1513 RME9652_ADAT_SYNC("ADAT3 Sync Check", 0, 2);
1514
1515 static const struct snd_kcontrol_new snd_rme9652_adat1_input =
1516 RME9652_ADAT1_IN("ADAT1 Input Source", 0);
1517
snd_rme9652_create_controls(struct snd_card * card,struct snd_rme9652 * rme9652)1518 static int snd_rme9652_create_controls(struct snd_card *card, struct snd_rme9652 *rme9652)
1519 {
1520 unsigned int idx;
1521 int err;
1522 struct snd_kcontrol *kctl;
1523
1524 for (idx = 0; idx < ARRAY_SIZE(snd_rme9652_controls); idx++) {
1525 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_controls[idx], rme9652))) < 0)
1526 return err;
1527 if (idx == 1) /* IEC958 (S/PDIF) Stream */
1528 rme9652->spdif_ctl = kctl;
1529 }
1530
1531 if (rme9652->ss_channels == RME9652_NCHANNELS)
1532 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat3_check, rme9652))) < 0)
1533 return err;
1534
1535 if (rme9652->hw_rev >= 15)
1536 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_rme9652_adat1_input, rme9652))) < 0)
1537 return err;
1538
1539 return 0;
1540 }
1541
1542 /*------------------------------------------------------------
1543 /proc interface
1544 ------------------------------------------------------------*/
1545
1546 static void
snd_rme9652_proc_read(struct snd_info_entry * entry,struct snd_info_buffer * buffer)1547 snd_rme9652_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
1548 {
1549 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) entry->private_data;
1550 u32 thru_bits = rme9652->thru_bits;
1551 int show_auto_sync_source = 0;
1552 int i;
1553 unsigned int status;
1554 int x;
1555
1556 status = rme9652_read(rme9652, RME9652_status_register);
1557
1558 snd_iprintf(buffer, "%s (Card #%d)\n", rme9652->card_name, rme9652->card->number + 1);
1559 snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
1560 rme9652->capture_buffer, rme9652->playback_buffer);
1561 snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
1562 rme9652->irq, rme9652->port, (unsigned long)rme9652->iobase);
1563 snd_iprintf(buffer, "Control register: %x\n", rme9652->control_register);
1564
1565 snd_iprintf(buffer, "\n");
1566
1567 x = 1 << (6 + rme9652_decode_latency(rme9652->control_register &
1568 RME9652_latency));
1569
1570 snd_iprintf(buffer, "Latency: %d samples (2 periods of %lu bytes)\n",
1571 x, (unsigned long) rme9652->period_bytes);
1572 snd_iprintf(buffer, "Hardware pointer (frames): %ld\n",
1573 rme9652_hw_pointer(rme9652));
1574 snd_iprintf(buffer, "Passthru: %s\n",
1575 rme9652->passthru ? "yes" : "no");
1576
1577 if ((rme9652->control_register & (RME9652_Master | RME9652_wsel)) == 0) {
1578 snd_iprintf(buffer, "Clock mode: autosync\n");
1579 show_auto_sync_source = 1;
1580 } else if (rme9652->control_register & RME9652_wsel) {
1581 if (status & RME9652_wsel_rd) {
1582 snd_iprintf(buffer, "Clock mode: word clock\n");
1583 } else {
1584 snd_iprintf(buffer, "Clock mode: word clock (no signal)\n");
1585 }
1586 } else {
1587 snd_iprintf(buffer, "Clock mode: master\n");
1588 }
1589
1590 if (show_auto_sync_source) {
1591 switch (rme9652->control_register & RME9652_SyncPref_Mask) {
1592 case RME9652_SyncPref_ADAT1:
1593 snd_iprintf(buffer, "Pref. sync source: ADAT1\n");
1594 break;
1595 case RME9652_SyncPref_ADAT2:
1596 snd_iprintf(buffer, "Pref. sync source: ADAT2\n");
1597 break;
1598 case RME9652_SyncPref_ADAT3:
1599 snd_iprintf(buffer, "Pref. sync source: ADAT3\n");
1600 break;
1601 case RME9652_SyncPref_SPDIF:
1602 snd_iprintf(buffer, "Pref. sync source: IEC958\n");
1603 break;
1604 default:
1605 snd_iprintf(buffer, "Pref. sync source: ???\n");
1606 }
1607 }
1608
1609 if (rme9652->hw_rev >= 15)
1610 snd_iprintf(buffer, "\nADAT1 Input source: %s\n",
1611 (rme9652->control_register & RME9652_ADAT1_INTERNAL) ?
1612 "Internal" : "ADAT1 optical");
1613
1614 snd_iprintf(buffer, "\n");
1615
1616 switch (rme9652_decode_spdif_in(rme9652->control_register &
1617 RME9652_inp)) {
1618 case RME9652_SPDIFIN_OPTICAL:
1619 snd_iprintf(buffer, "IEC958 input: ADAT1\n");
1620 break;
1621 case RME9652_SPDIFIN_COAXIAL:
1622 snd_iprintf(buffer, "IEC958 input: Coaxial\n");
1623 break;
1624 case RME9652_SPDIFIN_INTERN:
1625 snd_iprintf(buffer, "IEC958 input: Internal\n");
1626 break;
1627 default:
1628 snd_iprintf(buffer, "IEC958 input: ???\n");
1629 break;
1630 }
1631
1632 if (rme9652->control_register & RME9652_opt_out) {
1633 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
1634 } else {
1635 snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
1636 }
1637
1638 if (rme9652->control_register & RME9652_PRO) {
1639 snd_iprintf(buffer, "IEC958 quality: Professional\n");
1640 } else {
1641 snd_iprintf(buffer, "IEC958 quality: Consumer\n");
1642 }
1643
1644 if (rme9652->control_register & RME9652_EMP) {
1645 snd_iprintf(buffer, "IEC958 emphasis: on\n");
1646 } else {
1647 snd_iprintf(buffer, "IEC958 emphasis: off\n");
1648 }
1649
1650 if (rme9652->control_register & RME9652_Dolby) {
1651 snd_iprintf(buffer, "IEC958 Dolby: on\n");
1652 } else {
1653 snd_iprintf(buffer, "IEC958 Dolby: off\n");
1654 }
1655
1656 i = rme9652_spdif_sample_rate(rme9652);
1657
1658 if (i < 0) {
1659 snd_iprintf(buffer,
1660 "IEC958 sample rate: error flag set\n");
1661 } else if (i == 0) {
1662 snd_iprintf(buffer, "IEC958 sample rate: undetermined\n");
1663 } else {
1664 snd_iprintf(buffer, "IEC958 sample rate: %d\n", i);
1665 }
1666
1667 snd_iprintf(buffer, "\n");
1668
1669 snd_iprintf(buffer, "ADAT Sample rate: %dHz\n",
1670 rme9652_adat_sample_rate(rme9652));
1671
1672 /* Sync Check */
1673
1674 x = status & RME9652_sync_0;
1675 if (status & RME9652_lock_0) {
1676 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
1677 } else {
1678 snd_iprintf(buffer, "ADAT1: No Lock\n");
1679 }
1680
1681 x = status & RME9652_sync_1;
1682 if (status & RME9652_lock_1) {
1683 snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
1684 } else {
1685 snd_iprintf(buffer, "ADAT2: No Lock\n");
1686 }
1687
1688 x = status & RME9652_sync_2;
1689 if (status & RME9652_lock_2) {
1690 snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
1691 } else {
1692 snd_iprintf(buffer, "ADAT3: No Lock\n");
1693 }
1694
1695 snd_iprintf(buffer, "\n");
1696
1697 snd_iprintf(buffer, "Timecode signal: %s\n",
1698 (status & RME9652_tc_valid) ? "yes" : "no");
1699
1700 /* thru modes */
1701
1702 snd_iprintf(buffer, "Punch Status:\n\n");
1703
1704 for (i = 0; i < rme9652->ss_channels; i++) {
1705 if (thru_bits & (1 << i)) {
1706 snd_iprintf(buffer, "%2d: on ", i + 1);
1707 } else {
1708 snd_iprintf(buffer, "%2d: off ", i + 1);
1709 }
1710
1711 if (((i + 1) % 8) == 0) {
1712 snd_iprintf(buffer, "\n");
1713 }
1714 }
1715
1716 snd_iprintf(buffer, "\n");
1717 }
1718
snd_rme9652_proc_init(struct snd_rme9652 * rme9652)1719 static void snd_rme9652_proc_init(struct snd_rme9652 *rme9652)
1720 {
1721 snd_card_ro_proc_new(rme9652->card, "rme9652", rme9652,
1722 snd_rme9652_proc_read);
1723 }
1724
snd_rme9652_free_buffers(struct snd_rme9652 * rme9652)1725 static void snd_rme9652_free_buffers(struct snd_rme9652 *rme9652)
1726 {
1727 snd_hammerfall_free_buffer(&rme9652->capture_dma_buf, rme9652->pci);
1728 snd_hammerfall_free_buffer(&rme9652->playback_dma_buf, rme9652->pci);
1729 }
1730
snd_rme9652_free(struct snd_rme9652 * rme9652)1731 static int snd_rme9652_free(struct snd_rme9652 *rme9652)
1732 {
1733 if (rme9652->irq >= 0)
1734 rme9652_stop(rme9652);
1735 snd_rme9652_free_buffers(rme9652);
1736
1737 if (rme9652->irq >= 0)
1738 free_irq(rme9652->irq, (void *)rme9652);
1739 iounmap(rme9652->iobase);
1740 if (rme9652->port)
1741 pci_release_regions(rme9652->pci);
1742
1743 if (pci_is_enabled(rme9652->pci))
1744 pci_disable_device(rme9652->pci);
1745 return 0;
1746 }
1747
snd_rme9652_initialize_memory(struct snd_rme9652 * rme9652)1748 static int snd_rme9652_initialize_memory(struct snd_rme9652 *rme9652)
1749 {
1750 unsigned long pb_bus, cb_bus;
1751
1752 if (snd_hammerfall_get_buffer(rme9652->pci, &rme9652->capture_dma_buf, RME9652_DMA_AREA_BYTES) < 0 ||
1753 snd_hammerfall_get_buffer(rme9652->pci, &rme9652->playback_dma_buf, RME9652_DMA_AREA_BYTES) < 0) {
1754 if (rme9652->capture_dma_buf.area)
1755 snd_dma_free_pages(&rme9652->capture_dma_buf);
1756 dev_err(rme9652->card->dev,
1757 "%s: no buffers available\n", rme9652->card_name);
1758 return -ENOMEM;
1759 }
1760
1761 /* Align to bus-space 64K boundary */
1762
1763 cb_bus = ALIGN(rme9652->capture_dma_buf.addr, 0x10000ul);
1764 pb_bus = ALIGN(rme9652->playback_dma_buf.addr, 0x10000ul);
1765
1766 /* Tell the card where it is */
1767
1768 rme9652_write(rme9652, RME9652_rec_buffer, cb_bus);
1769 rme9652_write(rme9652, RME9652_play_buffer, pb_bus);
1770
1771 rme9652->capture_buffer = rme9652->capture_dma_buf.area + (cb_bus - rme9652->capture_dma_buf.addr);
1772 rme9652->playback_buffer = rme9652->playback_dma_buf.area + (pb_bus - rme9652->playback_dma_buf.addr);
1773
1774 return 0;
1775 }
1776
snd_rme9652_set_defaults(struct snd_rme9652 * rme9652)1777 static void snd_rme9652_set_defaults(struct snd_rme9652 *rme9652)
1778 {
1779 unsigned int k;
1780
1781 /* ASSUMPTION: rme9652->lock is either held, or
1782 there is no need to hold it (e.g. during module
1783 initialization).
1784 */
1785
1786 /* set defaults:
1787
1788 SPDIF Input via Coax
1789 autosync clock mode
1790 maximum latency (7 = 8192 samples, 64Kbyte buffer,
1791 which implies 2 4096 sample, 32Kbyte periods).
1792
1793 if rev 1.5, initialize the S/PDIF receiver.
1794
1795 */
1796
1797 rme9652->control_register =
1798 RME9652_inp_0 | rme9652_encode_latency(7);
1799
1800 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register);
1801
1802 rme9652_reset_hw_pointer(rme9652);
1803 rme9652_compute_period_size(rme9652);
1804
1805 /* default: thru off for all channels */
1806
1807 for (k = 0; k < RME9652_NCHANNELS; ++k)
1808 rme9652_write(rme9652, RME9652_thru_base + k * 4, 0);
1809
1810 rme9652->thru_bits = 0;
1811 rme9652->passthru = 0;
1812
1813 /* set a default rate so that the channel map is set up */
1814
1815 rme9652_set_rate(rme9652, 48000);
1816 }
1817
snd_rme9652_interrupt(int irq,void * dev_id)1818 static irqreturn_t snd_rme9652_interrupt(int irq, void *dev_id)
1819 {
1820 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) dev_id;
1821
1822 if (!(rme9652_read(rme9652, RME9652_status_register) & RME9652_IRQ)) {
1823 return IRQ_NONE;
1824 }
1825
1826 rme9652_write(rme9652, RME9652_irq_clear, 0);
1827
1828 if (rme9652->capture_substream) {
1829 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
1830 }
1831
1832 if (rme9652->playback_substream) {
1833 snd_pcm_period_elapsed(rme9652->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
1834 }
1835 return IRQ_HANDLED;
1836 }
1837
snd_rme9652_hw_pointer(struct snd_pcm_substream * substream)1838 static snd_pcm_uframes_t snd_rme9652_hw_pointer(struct snd_pcm_substream *substream)
1839 {
1840 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1841 return rme9652_hw_pointer(rme9652);
1842 }
1843
rme9652_channel_buffer_location(struct snd_rme9652 * rme9652,int stream,int channel)1844 static signed char *rme9652_channel_buffer_location(struct snd_rme9652 *rme9652,
1845 int stream,
1846 int channel)
1847
1848 {
1849 int mapped_channel;
1850
1851 if (snd_BUG_ON(channel < 0 || channel >= RME9652_NCHANNELS))
1852 return NULL;
1853
1854 if ((mapped_channel = rme9652->channel_map[channel]) < 0) {
1855 return NULL;
1856 }
1857
1858 if (stream == SNDRV_PCM_STREAM_CAPTURE) {
1859 return rme9652->capture_buffer +
1860 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1861 } else {
1862 return rme9652->playback_buffer +
1863 (mapped_channel * RME9652_CHANNEL_BUFFER_BYTES);
1864 }
1865 }
1866
snd_rme9652_playback_copy(struct snd_pcm_substream * substream,int channel,unsigned long pos,void __user * src,unsigned long count)1867 static int snd_rme9652_playback_copy(struct snd_pcm_substream *substream,
1868 int channel, unsigned long pos,
1869 void __user *src, unsigned long count)
1870 {
1871 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1872 signed char *channel_buf;
1873
1874 if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES))
1875 return -EINVAL;
1876
1877 channel_buf = rme9652_channel_buffer_location (rme9652,
1878 substream->pstr->stream,
1879 channel);
1880 if (snd_BUG_ON(!channel_buf))
1881 return -EIO;
1882 if (copy_from_user(channel_buf + pos, src, count))
1883 return -EFAULT;
1884 return 0;
1885 }
1886
snd_rme9652_playback_copy_kernel(struct snd_pcm_substream * substream,int channel,unsigned long pos,void * src,unsigned long count)1887 static int snd_rme9652_playback_copy_kernel(struct snd_pcm_substream *substream,
1888 int channel, unsigned long pos,
1889 void *src, unsigned long count)
1890 {
1891 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1892 signed char *channel_buf;
1893
1894 channel_buf = rme9652_channel_buffer_location(rme9652,
1895 substream->pstr->stream,
1896 channel);
1897 if (snd_BUG_ON(!channel_buf))
1898 return -EIO;
1899 memcpy(channel_buf + pos, src, count);
1900 return 0;
1901 }
1902
snd_rme9652_capture_copy(struct snd_pcm_substream * substream,int channel,unsigned long pos,void __user * dst,unsigned long count)1903 static int snd_rme9652_capture_copy(struct snd_pcm_substream *substream,
1904 int channel, unsigned long pos,
1905 void __user *dst, unsigned long count)
1906 {
1907 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1908 signed char *channel_buf;
1909
1910 if (snd_BUG_ON(pos + count > RME9652_CHANNEL_BUFFER_BYTES))
1911 return -EINVAL;
1912
1913 channel_buf = rme9652_channel_buffer_location (rme9652,
1914 substream->pstr->stream,
1915 channel);
1916 if (snd_BUG_ON(!channel_buf))
1917 return -EIO;
1918 if (copy_to_user(dst, channel_buf + pos, count))
1919 return -EFAULT;
1920 return 0;
1921 }
1922
snd_rme9652_capture_copy_kernel(struct snd_pcm_substream * substream,int channel,unsigned long pos,void * dst,unsigned long count)1923 static int snd_rme9652_capture_copy_kernel(struct snd_pcm_substream *substream,
1924 int channel, unsigned long pos,
1925 void *dst, unsigned long count)
1926 {
1927 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1928 signed char *channel_buf;
1929
1930 channel_buf = rme9652_channel_buffer_location(rme9652,
1931 substream->pstr->stream,
1932 channel);
1933 if (snd_BUG_ON(!channel_buf))
1934 return -EIO;
1935 memcpy(dst, channel_buf + pos, count);
1936 return 0;
1937 }
1938
snd_rme9652_hw_silence(struct snd_pcm_substream * substream,int channel,unsigned long pos,unsigned long count)1939 static int snd_rme9652_hw_silence(struct snd_pcm_substream *substream,
1940 int channel, unsigned long pos,
1941 unsigned long count)
1942 {
1943 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1944 signed char *channel_buf;
1945
1946 channel_buf = rme9652_channel_buffer_location (rme9652,
1947 substream->pstr->stream,
1948 channel);
1949 if (snd_BUG_ON(!channel_buf))
1950 return -EIO;
1951 memset(channel_buf + pos, 0, count);
1952 return 0;
1953 }
1954
snd_rme9652_reset(struct snd_pcm_substream * substream)1955 static int snd_rme9652_reset(struct snd_pcm_substream *substream)
1956 {
1957 struct snd_pcm_runtime *runtime = substream->runtime;
1958 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1959 struct snd_pcm_substream *other;
1960 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
1961 other = rme9652->capture_substream;
1962 else
1963 other = rme9652->playback_substream;
1964 if (rme9652->running)
1965 runtime->status->hw_ptr = rme9652_hw_pointer(rme9652);
1966 else
1967 runtime->status->hw_ptr = 0;
1968 if (other) {
1969 struct snd_pcm_substream *s;
1970 struct snd_pcm_runtime *oruntime = other->runtime;
1971 snd_pcm_group_for_each_entry(s, substream) {
1972 if (s == other) {
1973 oruntime->status->hw_ptr = runtime->status->hw_ptr;
1974 break;
1975 }
1976 }
1977 }
1978 return 0;
1979 }
1980
snd_rme9652_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params)1981 static int snd_rme9652_hw_params(struct snd_pcm_substream *substream,
1982 struct snd_pcm_hw_params *params)
1983 {
1984 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
1985 int err;
1986 pid_t this_pid;
1987 pid_t other_pid;
1988
1989 spin_lock_irq(&rme9652->lock);
1990
1991 if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1992 rme9652->control_register &= ~(RME9652_PRO | RME9652_Dolby | RME9652_EMP);
1993 rme9652_write(rme9652, RME9652_control_register, rme9652->control_register |= rme9652->creg_spdif_stream);
1994 this_pid = rme9652->playback_pid;
1995 other_pid = rme9652->capture_pid;
1996 } else {
1997 this_pid = rme9652->capture_pid;
1998 other_pid = rme9652->playback_pid;
1999 }
2000
2001 if ((other_pid > 0) && (this_pid != other_pid)) {
2002
2003 /* The other stream is open, and not by the same
2004 task as this one. Make sure that the parameters
2005 that matter are the same.
2006 */
2007
2008 if ((int)params_rate(params) !=
2009 rme9652_adat_sample_rate(rme9652)) {
2010 spin_unlock_irq(&rme9652->lock);
2011 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2012 return -EBUSY;
2013 }
2014
2015 if (params_period_size(params) != rme9652->period_bytes / 4) {
2016 spin_unlock_irq(&rme9652->lock);
2017 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2018 return -EBUSY;
2019 }
2020
2021 /* We're fine. */
2022
2023 spin_unlock_irq(&rme9652->lock);
2024 return 0;
2025
2026 } else {
2027 spin_unlock_irq(&rme9652->lock);
2028 }
2029
2030 /* how to make sure that the rate matches an externally-set one ?
2031 */
2032
2033 if ((err = rme9652_set_rate(rme9652, params_rate(params))) < 0) {
2034 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
2035 return err;
2036 }
2037
2038 if ((err = rme9652_set_interrupt_interval(rme9652, params_period_size(params))) < 0) {
2039 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
2040 return err;
2041 }
2042
2043 return 0;
2044 }
2045
snd_rme9652_channel_info(struct snd_pcm_substream * substream,struct snd_pcm_channel_info * info)2046 static int snd_rme9652_channel_info(struct snd_pcm_substream *substream,
2047 struct snd_pcm_channel_info *info)
2048 {
2049 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2050 int chn;
2051
2052 if (snd_BUG_ON(info->channel >= RME9652_NCHANNELS))
2053 return -EINVAL;
2054
2055 chn = rme9652->channel_map[array_index_nospec(info->channel,
2056 RME9652_NCHANNELS)];
2057 if (chn < 0)
2058 return -EINVAL;
2059
2060 info->offset = chn * RME9652_CHANNEL_BUFFER_BYTES;
2061 info->first = 0;
2062 info->step = 32;
2063 return 0;
2064 }
2065
snd_rme9652_ioctl(struct snd_pcm_substream * substream,unsigned int cmd,void * arg)2066 static int snd_rme9652_ioctl(struct snd_pcm_substream *substream,
2067 unsigned int cmd, void *arg)
2068 {
2069 switch (cmd) {
2070 case SNDRV_PCM_IOCTL1_RESET:
2071 {
2072 return snd_rme9652_reset(substream);
2073 }
2074 case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
2075 {
2076 struct snd_pcm_channel_info *info = arg;
2077 return snd_rme9652_channel_info(substream, info);
2078 }
2079 default:
2080 break;
2081 }
2082
2083 return snd_pcm_lib_ioctl(substream, cmd, arg);
2084 }
2085
rme9652_silence_playback(struct snd_rme9652 * rme9652)2086 static void rme9652_silence_playback(struct snd_rme9652 *rme9652)
2087 {
2088 memset(rme9652->playback_buffer, 0, RME9652_DMA_AREA_BYTES);
2089 }
2090
snd_rme9652_trigger(struct snd_pcm_substream * substream,int cmd)2091 static int snd_rme9652_trigger(struct snd_pcm_substream *substream,
2092 int cmd)
2093 {
2094 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2095 struct snd_pcm_substream *other;
2096 int running;
2097 spin_lock(&rme9652->lock);
2098 running = rme9652->running;
2099 switch (cmd) {
2100 case SNDRV_PCM_TRIGGER_START:
2101 running |= 1 << substream->stream;
2102 break;
2103 case SNDRV_PCM_TRIGGER_STOP:
2104 running &= ~(1 << substream->stream);
2105 break;
2106 default:
2107 snd_BUG();
2108 spin_unlock(&rme9652->lock);
2109 return -EINVAL;
2110 }
2111 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2112 other = rme9652->capture_substream;
2113 else
2114 other = rme9652->playback_substream;
2115
2116 if (other) {
2117 struct snd_pcm_substream *s;
2118 snd_pcm_group_for_each_entry(s, substream) {
2119 if (s == other) {
2120 snd_pcm_trigger_done(s, substream);
2121 if (cmd == SNDRV_PCM_TRIGGER_START)
2122 running |= 1 << s->stream;
2123 else
2124 running &= ~(1 << s->stream);
2125 goto _ok;
2126 }
2127 }
2128 if (cmd == SNDRV_PCM_TRIGGER_START) {
2129 if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
2130 substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2131 rme9652_silence_playback(rme9652);
2132 } else {
2133 if (running &&
2134 substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
2135 rme9652_silence_playback(rme9652);
2136 }
2137 } else {
2138 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
2139 rme9652_silence_playback(rme9652);
2140 }
2141 _ok:
2142 snd_pcm_trigger_done(substream, substream);
2143 if (!rme9652->running && running)
2144 rme9652_start(rme9652);
2145 else if (rme9652->running && !running)
2146 rme9652_stop(rme9652);
2147 rme9652->running = running;
2148 spin_unlock(&rme9652->lock);
2149
2150 return 0;
2151 }
2152
snd_rme9652_prepare(struct snd_pcm_substream * substream)2153 static int snd_rme9652_prepare(struct snd_pcm_substream *substream)
2154 {
2155 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2156 unsigned long flags;
2157
2158 spin_lock_irqsave(&rme9652->lock, flags);
2159 if (!rme9652->running)
2160 rme9652_reset_hw_pointer(rme9652);
2161 spin_unlock_irqrestore(&rme9652->lock, flags);
2162 return 0;
2163 }
2164
2165 static const struct snd_pcm_hardware snd_rme9652_playback_subinfo =
2166 {
2167 .info = (SNDRV_PCM_INFO_MMAP |
2168 SNDRV_PCM_INFO_MMAP_VALID |
2169 SNDRV_PCM_INFO_NONINTERLEAVED |
2170 SNDRV_PCM_INFO_SYNC_START |
2171 SNDRV_PCM_INFO_DOUBLE),
2172 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2173 .rates = (SNDRV_PCM_RATE_44100 |
2174 SNDRV_PCM_RATE_48000 |
2175 SNDRV_PCM_RATE_88200 |
2176 SNDRV_PCM_RATE_96000),
2177 .rate_min = 44100,
2178 .rate_max = 96000,
2179 .channels_min = 10,
2180 .channels_max = 26,
2181 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES * 26,
2182 .period_bytes_min = (64 * 4) * 10,
2183 .period_bytes_max = (8192 * 4) * 26,
2184 .periods_min = 2,
2185 .periods_max = 2,
2186 .fifo_size = 0,
2187 };
2188
2189 static const struct snd_pcm_hardware snd_rme9652_capture_subinfo =
2190 {
2191 .info = (SNDRV_PCM_INFO_MMAP |
2192 SNDRV_PCM_INFO_MMAP_VALID |
2193 SNDRV_PCM_INFO_NONINTERLEAVED |
2194 SNDRV_PCM_INFO_SYNC_START),
2195 .formats = SNDRV_PCM_FMTBIT_S32_LE,
2196 .rates = (SNDRV_PCM_RATE_44100 |
2197 SNDRV_PCM_RATE_48000 |
2198 SNDRV_PCM_RATE_88200 |
2199 SNDRV_PCM_RATE_96000),
2200 .rate_min = 44100,
2201 .rate_max = 96000,
2202 .channels_min = 10,
2203 .channels_max = 26,
2204 .buffer_bytes_max = RME9652_CHANNEL_BUFFER_BYTES *26,
2205 .period_bytes_min = (64 * 4) * 10,
2206 .period_bytes_max = (8192 * 4) * 26,
2207 .periods_min = 2,
2208 .periods_max = 2,
2209 .fifo_size = 0,
2210 };
2211
2212 static const unsigned int period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
2213
2214 static const struct snd_pcm_hw_constraint_list hw_constraints_period_sizes = {
2215 .count = ARRAY_SIZE(period_sizes),
2216 .list = period_sizes,
2217 .mask = 0
2218 };
2219
snd_rme9652_hw_rule_channels(struct snd_pcm_hw_params * params,struct snd_pcm_hw_rule * rule)2220 static int snd_rme9652_hw_rule_channels(struct snd_pcm_hw_params *params,
2221 struct snd_pcm_hw_rule *rule)
2222 {
2223 struct snd_rme9652 *rme9652 = rule->private;
2224 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2225 unsigned int list[2] = { rme9652->ds_channels, rme9652->ss_channels };
2226 return snd_interval_list(c, 2, list, 0);
2227 }
2228
snd_rme9652_hw_rule_channels_rate(struct snd_pcm_hw_params * params,struct snd_pcm_hw_rule * rule)2229 static int snd_rme9652_hw_rule_channels_rate(struct snd_pcm_hw_params *params,
2230 struct snd_pcm_hw_rule *rule)
2231 {
2232 struct snd_rme9652 *rme9652 = rule->private;
2233 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2234 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2235 if (r->min > 48000) {
2236 struct snd_interval t = {
2237 .min = rme9652->ds_channels,
2238 .max = rme9652->ds_channels,
2239 .integer = 1,
2240 };
2241 return snd_interval_refine(c, &t);
2242 } else if (r->max < 88200) {
2243 struct snd_interval t = {
2244 .min = rme9652->ss_channels,
2245 .max = rme9652->ss_channels,
2246 .integer = 1,
2247 };
2248 return snd_interval_refine(c, &t);
2249 }
2250 return 0;
2251 }
2252
snd_rme9652_hw_rule_rate_channels(struct snd_pcm_hw_params * params,struct snd_pcm_hw_rule * rule)2253 static int snd_rme9652_hw_rule_rate_channels(struct snd_pcm_hw_params *params,
2254 struct snd_pcm_hw_rule *rule)
2255 {
2256 struct snd_rme9652 *rme9652 = rule->private;
2257 struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
2258 struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
2259 if (c->min >= rme9652->ss_channels) {
2260 struct snd_interval t = {
2261 .min = 44100,
2262 .max = 48000,
2263 .integer = 1,
2264 };
2265 return snd_interval_refine(r, &t);
2266 } else if (c->max <= rme9652->ds_channels) {
2267 struct snd_interval t = {
2268 .min = 88200,
2269 .max = 96000,
2270 .integer = 1,
2271 };
2272 return snd_interval_refine(r, &t);
2273 }
2274 return 0;
2275 }
2276
snd_rme9652_playback_open(struct snd_pcm_substream * substream)2277 static int snd_rme9652_playback_open(struct snd_pcm_substream *substream)
2278 {
2279 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2280 struct snd_pcm_runtime *runtime = substream->runtime;
2281
2282 spin_lock_irq(&rme9652->lock);
2283
2284 snd_pcm_set_sync(substream);
2285
2286 runtime->hw = snd_rme9652_playback_subinfo;
2287 runtime->dma_area = rme9652->playback_buffer;
2288 runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2289
2290 if (rme9652->capture_substream == NULL) {
2291 rme9652_stop(rme9652);
2292 rme9652_set_thru(rme9652, -1, 0);
2293 }
2294
2295 rme9652->playback_pid = current->pid;
2296 rme9652->playback_substream = substream;
2297
2298 spin_unlock_irq(&rme9652->lock);
2299
2300 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2301 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2302 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2303 snd_rme9652_hw_rule_channels, rme9652,
2304 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2305 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2306 snd_rme9652_hw_rule_channels_rate, rme9652,
2307 SNDRV_PCM_HW_PARAM_RATE, -1);
2308 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2309 snd_rme9652_hw_rule_rate_channels, rme9652,
2310 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2311
2312 rme9652->creg_spdif_stream = rme9652->creg_spdif;
2313 rme9652->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2314 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2315 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2316 return 0;
2317 }
2318
snd_rme9652_playback_release(struct snd_pcm_substream * substream)2319 static int snd_rme9652_playback_release(struct snd_pcm_substream *substream)
2320 {
2321 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2322
2323 spin_lock_irq(&rme9652->lock);
2324
2325 rme9652->playback_pid = -1;
2326 rme9652->playback_substream = NULL;
2327
2328 spin_unlock_irq(&rme9652->lock);
2329
2330 rme9652->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
2331 snd_ctl_notify(rme9652->card, SNDRV_CTL_EVENT_MASK_VALUE |
2332 SNDRV_CTL_EVENT_MASK_INFO, &rme9652->spdif_ctl->id);
2333 return 0;
2334 }
2335
2336
snd_rme9652_capture_open(struct snd_pcm_substream * substream)2337 static int snd_rme9652_capture_open(struct snd_pcm_substream *substream)
2338 {
2339 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2340 struct snd_pcm_runtime *runtime = substream->runtime;
2341
2342 spin_lock_irq(&rme9652->lock);
2343
2344 snd_pcm_set_sync(substream);
2345
2346 runtime->hw = snd_rme9652_capture_subinfo;
2347 runtime->dma_area = rme9652->capture_buffer;
2348 runtime->dma_bytes = RME9652_DMA_AREA_BYTES;
2349
2350 if (rme9652->playback_substream == NULL) {
2351 rme9652_stop(rme9652);
2352 rme9652_set_thru(rme9652, -1, 0);
2353 }
2354
2355 rme9652->capture_pid = current->pid;
2356 rme9652->capture_substream = substream;
2357
2358 spin_unlock_irq(&rme9652->lock);
2359
2360 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
2361 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hw_constraints_period_sizes);
2362 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2363 snd_rme9652_hw_rule_channels, rme9652,
2364 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2365 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
2366 snd_rme9652_hw_rule_channels_rate, rme9652,
2367 SNDRV_PCM_HW_PARAM_RATE, -1);
2368 snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
2369 snd_rme9652_hw_rule_rate_channels, rme9652,
2370 SNDRV_PCM_HW_PARAM_CHANNELS, -1);
2371 return 0;
2372 }
2373
snd_rme9652_capture_release(struct snd_pcm_substream * substream)2374 static int snd_rme9652_capture_release(struct snd_pcm_substream *substream)
2375 {
2376 struct snd_rme9652 *rme9652 = snd_pcm_substream_chip(substream);
2377
2378 spin_lock_irq(&rme9652->lock);
2379
2380 rme9652->capture_pid = -1;
2381 rme9652->capture_substream = NULL;
2382
2383 spin_unlock_irq(&rme9652->lock);
2384 return 0;
2385 }
2386
2387 static const struct snd_pcm_ops snd_rme9652_playback_ops = {
2388 .open = snd_rme9652_playback_open,
2389 .close = snd_rme9652_playback_release,
2390 .ioctl = snd_rme9652_ioctl,
2391 .hw_params = snd_rme9652_hw_params,
2392 .prepare = snd_rme9652_prepare,
2393 .trigger = snd_rme9652_trigger,
2394 .pointer = snd_rme9652_hw_pointer,
2395 .copy_user = snd_rme9652_playback_copy,
2396 .copy_kernel = snd_rme9652_playback_copy_kernel,
2397 .fill_silence = snd_rme9652_hw_silence,
2398 };
2399
2400 static const struct snd_pcm_ops snd_rme9652_capture_ops = {
2401 .open = snd_rme9652_capture_open,
2402 .close = snd_rme9652_capture_release,
2403 .ioctl = snd_rme9652_ioctl,
2404 .hw_params = snd_rme9652_hw_params,
2405 .prepare = snd_rme9652_prepare,
2406 .trigger = snd_rme9652_trigger,
2407 .pointer = snd_rme9652_hw_pointer,
2408 .copy_user = snd_rme9652_capture_copy,
2409 .copy_kernel = snd_rme9652_capture_copy_kernel,
2410 };
2411
snd_rme9652_create_pcm(struct snd_card * card,struct snd_rme9652 * rme9652)2412 static int snd_rme9652_create_pcm(struct snd_card *card,
2413 struct snd_rme9652 *rme9652)
2414 {
2415 struct snd_pcm *pcm;
2416 int err;
2417
2418 if ((err = snd_pcm_new(card,
2419 rme9652->card_name,
2420 0, 1, 1, &pcm)) < 0) {
2421 return err;
2422 }
2423
2424 rme9652->pcm = pcm;
2425 pcm->private_data = rme9652;
2426 strcpy(pcm->name, rme9652->card_name);
2427
2428 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_rme9652_playback_ops);
2429 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_rme9652_capture_ops);
2430
2431 pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
2432
2433 return 0;
2434 }
2435
snd_rme9652_create(struct snd_card * card,struct snd_rme9652 * rme9652,int precise_ptr)2436 static int snd_rme9652_create(struct snd_card *card,
2437 struct snd_rme9652 *rme9652,
2438 int precise_ptr)
2439 {
2440 struct pci_dev *pci = rme9652->pci;
2441 int err;
2442 int status;
2443 unsigned short rev;
2444
2445 rme9652->irq = -1;
2446 rme9652->card = card;
2447
2448 pci_read_config_word(rme9652->pci, PCI_CLASS_REVISION, &rev);
2449
2450 switch (rev & 0xff) {
2451 case 3:
2452 case 4:
2453 case 8:
2454 case 9:
2455 break;
2456
2457 default:
2458 /* who knows? */
2459 return -ENODEV;
2460 }
2461
2462 if ((err = pci_enable_device(pci)) < 0)
2463 return err;
2464
2465 spin_lock_init(&rme9652->lock);
2466
2467 if ((err = pci_request_regions(pci, "rme9652")) < 0)
2468 return err;
2469 rme9652->port = pci_resource_start(pci, 0);
2470 rme9652->iobase = ioremap(rme9652->port, RME9652_IO_EXTENT);
2471 if (rme9652->iobase == NULL) {
2472 dev_err(card->dev, "unable to remap region 0x%lx-0x%lx\n",
2473 rme9652->port, rme9652->port + RME9652_IO_EXTENT - 1);
2474 return -EBUSY;
2475 }
2476
2477 if (request_irq(pci->irq, snd_rme9652_interrupt, IRQF_SHARED,
2478 KBUILD_MODNAME, rme9652)) {
2479 dev_err(card->dev, "unable to request IRQ %d\n", pci->irq);
2480 return -EBUSY;
2481 }
2482 rme9652->irq = pci->irq;
2483 card->sync_irq = rme9652->irq;
2484 rme9652->precise_ptr = precise_ptr;
2485
2486 /* Determine the h/w rev level of the card. This seems like
2487 a particularly kludgy way to encode it, but its what RME
2488 chose to do, so we follow them ...
2489 */
2490
2491 status = rme9652_read(rme9652, RME9652_status_register);
2492 if (rme9652_decode_spdif_rate(status&RME9652_F) == 1) {
2493 rme9652->hw_rev = 15;
2494 } else {
2495 rme9652->hw_rev = 11;
2496 }
2497
2498 /* Differentiate between the standard Hammerfall, and the
2499 "Light", which does not have the expansion board. This
2500 method comes from information received from Mathhias
2501 Clausen at RME. Display the EEPROM and h/w revID where
2502 relevant.
2503 */
2504
2505 switch (rev) {
2506 case 8: /* original eprom */
2507 strcpy(card->driver, "RME9636");
2508 if (rme9652->hw_rev == 15) {
2509 rme9652->card_name = "RME Digi9636 (Rev 1.5)";
2510 } else {
2511 rme9652->card_name = "RME Digi9636";
2512 }
2513 rme9652->ss_channels = RME9636_NCHANNELS;
2514 break;
2515 case 9: /* W36_G EPROM */
2516 strcpy(card->driver, "RME9636");
2517 rme9652->card_name = "RME Digi9636 (Rev G)";
2518 rme9652->ss_channels = RME9636_NCHANNELS;
2519 break;
2520 case 4: /* W52_G EPROM */
2521 strcpy(card->driver, "RME9652");
2522 rme9652->card_name = "RME Digi9652 (Rev G)";
2523 rme9652->ss_channels = RME9652_NCHANNELS;
2524 break;
2525 case 3: /* original eprom */
2526 strcpy(card->driver, "RME9652");
2527 if (rme9652->hw_rev == 15) {
2528 rme9652->card_name = "RME Digi9652 (Rev 1.5)";
2529 } else {
2530 rme9652->card_name = "RME Digi9652";
2531 }
2532 rme9652->ss_channels = RME9652_NCHANNELS;
2533 break;
2534 }
2535
2536 rme9652->ds_channels = (rme9652->ss_channels - 2) / 2 + 2;
2537
2538 pci_set_master(rme9652->pci);
2539
2540 if ((err = snd_rme9652_initialize_memory(rme9652)) < 0) {
2541 return err;
2542 }
2543
2544 if ((err = snd_rme9652_create_pcm(card, rme9652)) < 0) {
2545 return err;
2546 }
2547
2548 if ((err = snd_rme9652_create_controls(card, rme9652)) < 0) {
2549 return err;
2550 }
2551
2552 snd_rme9652_proc_init(rme9652);
2553
2554 rme9652->last_spdif_sample_rate = -1;
2555 rme9652->last_adat_sample_rate = -1;
2556 rme9652->playback_pid = -1;
2557 rme9652->capture_pid = -1;
2558 rme9652->capture_substream = NULL;
2559 rme9652->playback_substream = NULL;
2560
2561 snd_rme9652_set_defaults(rme9652);
2562
2563 if (rme9652->hw_rev == 15) {
2564 rme9652_initialize_spdif_receiver (rme9652);
2565 }
2566
2567 return 0;
2568 }
2569
snd_rme9652_card_free(struct snd_card * card)2570 static void snd_rme9652_card_free(struct snd_card *card)
2571 {
2572 struct snd_rme9652 *rme9652 = (struct snd_rme9652 *) card->private_data;
2573
2574 if (rme9652)
2575 snd_rme9652_free(rme9652);
2576 }
2577
snd_rme9652_probe(struct pci_dev * pci,const struct pci_device_id * pci_id)2578 static int snd_rme9652_probe(struct pci_dev *pci,
2579 const struct pci_device_id *pci_id)
2580 {
2581 static int dev;
2582 struct snd_rme9652 *rme9652;
2583 struct snd_card *card;
2584 int err;
2585
2586 if (dev >= SNDRV_CARDS)
2587 return -ENODEV;
2588 if (!enable[dev]) {
2589 dev++;
2590 return -ENOENT;
2591 }
2592
2593 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
2594 sizeof(struct snd_rme9652), &card);
2595
2596 if (err < 0)
2597 return err;
2598
2599 rme9652 = (struct snd_rme9652 *) card->private_data;
2600 card->private_free = snd_rme9652_card_free;
2601 rme9652->dev = dev;
2602 rme9652->pci = pci;
2603 err = snd_rme9652_create(card, rme9652, precise_ptr[dev]);
2604 if (err)
2605 goto free_card;
2606
2607 strcpy(card->shortname, rme9652->card_name);
2608
2609 sprintf(card->longname, "%s at 0x%lx, irq %d",
2610 card->shortname, rme9652->port, rme9652->irq);
2611 err = snd_card_register(card);
2612 if (err) {
2613 free_card:
2614 snd_card_free(card);
2615 return err;
2616 }
2617 pci_set_drvdata(pci, card);
2618 dev++;
2619 return 0;
2620 }
2621
snd_rme9652_remove(struct pci_dev * pci)2622 static void snd_rme9652_remove(struct pci_dev *pci)
2623 {
2624 snd_card_free(pci_get_drvdata(pci));
2625 }
2626
2627 static struct pci_driver rme9652_driver = {
2628 .name = KBUILD_MODNAME,
2629 .id_table = snd_rme9652_ids,
2630 .probe = snd_rme9652_probe,
2631 .remove = snd_rme9652_remove,
2632 };
2633
2634 module_pci_driver(rme9652_driver);
2635