1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <stdlib.h>
25
26 #include "compiler/brw_inst.h"
27 #include "compiler/brw_eu.h"
28 #include "compiler/brw_isa_info.h"
29
30 #include "intel_disasm.h"
31
32 static bool
is_send(uint32_t opcode)33 is_send(uint32_t opcode)
34 {
35 return (opcode == BRW_OPCODE_SEND ||
36 opcode == BRW_OPCODE_SENDC ||
37 opcode == BRW_OPCODE_SENDS ||
38 opcode == BRW_OPCODE_SENDSC );
39 }
40
41 static int
intel_disasm_find_end(const struct brw_isa_info * isa,const void * assembly,int start)42 intel_disasm_find_end(const struct brw_isa_info *isa,
43 const void *assembly, int start)
44 {
45 const struct intel_device_info *devinfo = isa->devinfo;
46 int offset = start;
47
48 /* This loop exits when send-with-EOT or when opcode is 0 */
49 while (true) {
50 const brw_inst *insn = assembly + offset;
51
52 if (brw_inst_cmpt_control(devinfo, insn)) {
53 offset += 8;
54 } else {
55 offset += 16;
56 }
57
58 /* Simplistic, but efficient way to terminate disasm */
59 uint32_t opcode = brw_inst_opcode(isa, insn);
60 if (opcode == 0 || (is_send(opcode) && brw_inst_eot(devinfo, insn))) {
61 break;
62 }
63 }
64
65 return offset;
66 }
67
68 void
intel_disassemble(const struct brw_isa_info * isa,const void * assembly,int start,FILE * out)69 intel_disassemble(const struct brw_isa_info *isa,
70 const void *assembly, int start, FILE *out)
71 {
72 int end = intel_disasm_find_end(isa, assembly, start);
73
74 /* Make a dummy disasm structure that brw_validate_instructions
75 * can work from.
76 */
77 struct disasm_info *disasm_info = disasm_initialize(isa, NULL);
78 disasm_new_inst_group(disasm_info, start);
79 disasm_new_inst_group(disasm_info, end);
80
81 brw_validate_instructions(isa, assembly, start, end, disasm_info);
82
83 void *mem_ctx = ralloc_context(NULL);
84 const struct brw_label *root_label =
85 brw_label_assembly(isa, assembly, start, end, mem_ctx);
86
87 foreach_list_typed(struct inst_group, group, link,
88 &disasm_info->group_list) {
89 struct exec_node *next_node = exec_node_get_next(&group->link);
90 if (exec_node_is_tail_sentinel(next_node))
91 break;
92
93 struct inst_group *next =
94 exec_node_data(struct inst_group, next_node, link);
95
96 int start_offset = group->offset;
97 int end_offset = next->offset;
98
99 brw_disassemble(isa, assembly, start_offset, end_offset,
100 root_label, out);
101
102 if (group->error) {
103 fputs(group->error, out);
104 }
105 }
106
107 ralloc_free(mem_ctx);
108 ralloc_free(disasm_info);
109 }
110