1 /*
2 * Copyright © 2017 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include "anv_nir.h"
25 #include "anv_private.h"
26 #include "nir/nir.h"
27 #include "nir/nir_builder.h"
28 #include "nir/nir_vulkan.h"
29
30 struct ycbcr_state {
31 nir_builder *builder;
32 nir_ssa_def *image_size;
33 nir_tex_instr *origin_tex;
34 nir_deref_instr *tex_deref;
35 struct anv_ycbcr_conversion *conversion;
36 };
37
38 /* TODO: we should probably replace this with a push constant/uniform. */
39 static nir_ssa_def *
get_texture_size(struct ycbcr_state * state,nir_deref_instr * texture)40 get_texture_size(struct ycbcr_state *state, nir_deref_instr *texture)
41 {
42 if (state->image_size)
43 return state->image_size;
44
45 nir_builder *b = state->builder;
46 const struct glsl_type *type = texture->type;
47 nir_tex_instr *tex = nir_tex_instr_create(b->shader, 1);
48
49 tex->op = nir_texop_txs;
50 tex->sampler_dim = glsl_get_sampler_dim(type);
51 tex->is_array = glsl_sampler_type_is_array(type);
52 tex->is_shadow = glsl_sampler_type_is_shadow(type);
53 tex->dest_type = nir_type_int32;
54
55 tex->src[0].src_type = nir_tex_src_texture_deref;
56 tex->src[0].src = nir_src_for_ssa(&texture->dest.ssa);
57
58 nir_ssa_dest_init(&tex->instr, &tex->dest,
59 nir_tex_instr_dest_size(tex), 32, NULL);
60 nir_builder_instr_insert(b, &tex->instr);
61
62 state->image_size = nir_i2f32(b, &tex->dest.ssa);
63
64 return state->image_size;
65 }
66
67 static nir_ssa_def *
implicit_downsampled_coord(nir_builder * b,nir_ssa_def * value,nir_ssa_def * max_value,int div_scale)68 implicit_downsampled_coord(nir_builder *b,
69 nir_ssa_def *value,
70 nir_ssa_def *max_value,
71 int div_scale)
72 {
73 return nir_fadd(b,
74 value,
75 nir_fdiv(b,
76 nir_imm_float(b, 1.0f),
77 nir_fmul(b,
78 nir_imm_float(b, div_scale),
79 max_value)));
80 }
81
82 static nir_ssa_def *
implicit_downsampled_coords(struct ycbcr_state * state,nir_ssa_def * old_coords,const struct anv_format_plane * plane_format)83 implicit_downsampled_coords(struct ycbcr_state *state,
84 nir_ssa_def *old_coords,
85 const struct anv_format_plane *plane_format)
86 {
87 nir_builder *b = state->builder;
88 struct anv_ycbcr_conversion *conversion = state->conversion;
89 nir_ssa_def *image_size = get_texture_size(state, state->tex_deref);
90 nir_ssa_def *comp[4] = { NULL, };
91 int c;
92
93 for (c = 0; c < ARRAY_SIZE(conversion->chroma_offsets); c++) {
94 if (plane_format->denominator_scales[c] > 1 &&
95 conversion->chroma_offsets[c] == VK_CHROMA_LOCATION_COSITED_EVEN) {
96 comp[c] = implicit_downsampled_coord(b,
97 nir_channel(b, old_coords, c),
98 nir_channel(b, image_size, c),
99 plane_format->denominator_scales[c]);
100 } else {
101 comp[c] = nir_channel(b, old_coords, c);
102 }
103 }
104
105 /* Leave other coordinates untouched */
106 for (; c < old_coords->num_components; c++)
107 comp[c] = nir_channel(b, old_coords, c);
108
109 return nir_vec(b, comp, old_coords->num_components);
110 }
111
112 static nir_ssa_def *
create_plane_tex_instr_implicit(struct ycbcr_state * state,uint32_t plane)113 create_plane_tex_instr_implicit(struct ycbcr_state *state,
114 uint32_t plane)
115 {
116 nir_builder *b = state->builder;
117 struct anv_ycbcr_conversion *conversion = state->conversion;
118 const struct anv_format_plane *plane_format =
119 &conversion->format->planes[plane];
120 nir_tex_instr *old_tex = state->origin_tex;
121 nir_tex_instr *tex = nir_tex_instr_create(b->shader, old_tex->num_srcs + 1);
122
123 for (uint32_t i = 0; i < old_tex->num_srcs; i++) {
124 tex->src[i].src_type = old_tex->src[i].src_type;
125
126 switch (old_tex->src[i].src_type) {
127 case nir_tex_src_coord:
128 if (plane_format->has_chroma && conversion->chroma_reconstruction) {
129 assert(old_tex->src[i].src.is_ssa);
130 tex->src[i].src =
131 nir_src_for_ssa(implicit_downsampled_coords(state,
132 old_tex->src[i].src.ssa,
133 plane_format));
134 break;
135 }
136 FALLTHROUGH;
137 default:
138 nir_src_copy(&tex->src[i].src, &old_tex->src[i].src);
139 break;
140 }
141 }
142 tex->src[tex->num_srcs - 1].src = nir_src_for_ssa(nir_imm_int(b, plane));
143 tex->src[tex->num_srcs - 1].src_type = nir_tex_src_plane;
144
145 tex->sampler_dim = old_tex->sampler_dim;
146 tex->dest_type = old_tex->dest_type;
147
148 tex->op = old_tex->op;
149 tex->coord_components = old_tex->coord_components;
150 tex->is_new_style_shadow = old_tex->is_new_style_shadow;
151 tex->component = old_tex->component;
152
153 tex->texture_index = old_tex->texture_index;
154 tex->sampler_index = old_tex->sampler_index;
155 tex->is_array = old_tex->is_array;
156
157 nir_ssa_dest_init(&tex->instr, &tex->dest,
158 old_tex->dest.ssa.num_components,
159 nir_dest_bit_size(old_tex->dest), NULL);
160 nir_builder_instr_insert(b, &tex->instr);
161
162 return &tex->dest.ssa;
163 }
164
165 static unsigned
channel_to_component(enum isl_channel_select channel)166 channel_to_component(enum isl_channel_select channel)
167 {
168 switch (channel) {
169 case ISL_CHANNEL_SELECT_RED:
170 return 0;
171 case ISL_CHANNEL_SELECT_GREEN:
172 return 1;
173 case ISL_CHANNEL_SELECT_BLUE:
174 return 2;
175 case ISL_CHANNEL_SELECT_ALPHA:
176 return 3;
177 default:
178 unreachable("invalid channel");
179 return 0;
180 }
181 }
182
183 static enum isl_channel_select
swizzle_channel(struct isl_swizzle swizzle,unsigned channel)184 swizzle_channel(struct isl_swizzle swizzle, unsigned channel)
185 {
186 switch (channel) {
187 case 0:
188 return swizzle.r;
189 case 1:
190 return swizzle.g;
191 case 2:
192 return swizzle.b;
193 case 3:
194 return swizzle.a;
195 default:
196 unreachable("invalid channel");
197 return 0;
198 }
199 }
200
201 static bool
anv_nir_lower_ycbcr_textures_instr(nir_builder * builder,nir_instr * instr,void * cb_data)202 anv_nir_lower_ycbcr_textures_instr(nir_builder *builder,
203 nir_instr *instr,
204 void *cb_data)
205 {
206 const struct anv_pipeline_layout *layout = cb_data;
207
208 if (instr->type != nir_instr_type_tex)
209 return false;
210
211 nir_tex_instr *tex = nir_instr_as_tex(instr);
212
213 int deref_src_idx = nir_tex_instr_src_index(tex, nir_tex_src_texture_deref);
214 assert(deref_src_idx >= 0);
215 nir_deref_instr *deref = nir_src_as_deref(tex->src[deref_src_idx].src);
216
217 nir_variable *var = nir_deref_instr_get_variable(deref);
218 const struct anv_descriptor_set_layout *set_layout =
219 layout->set[var->data.descriptor_set].layout;
220 const struct anv_descriptor_set_binding_layout *binding =
221 &set_layout->binding[var->data.binding];
222
223 /* For the following instructions, we don't apply any change and let the
224 * instruction apply to the first plane.
225 */
226 if (tex->op == nir_texop_txs ||
227 tex->op == nir_texop_query_levels ||
228 tex->op == nir_texop_lod)
229 return false;
230
231 if (binding->immutable_samplers == NULL)
232 return false;
233
234 assert(tex->texture_index == 0);
235 unsigned array_index = 0;
236 if (deref->deref_type != nir_deref_type_var) {
237 assert(deref->deref_type == nir_deref_type_array);
238 if (!nir_src_is_const(deref->arr.index))
239 return false;
240 array_index = nir_src_as_uint(deref->arr.index);
241 array_index = MIN2(array_index, binding->array_size - 1);
242 }
243 const struct anv_sampler *sampler = binding->immutable_samplers[array_index];
244
245 if (sampler->conversion == NULL)
246 return false;
247
248 struct ycbcr_state state = {
249 .builder = builder,
250 .origin_tex = tex,
251 .tex_deref = deref,
252 .conversion = sampler->conversion,
253 };
254
255 builder->cursor = nir_before_instr(&tex->instr);
256
257 const struct anv_format *format = state.conversion->format;
258 const struct isl_format_layout *y_isl_layout = NULL;
259 for (uint32_t p = 0; p < format->n_planes; p++) {
260 if (!format->planes[p].has_chroma)
261 y_isl_layout = isl_format_get_layout(format->planes[p].isl_format);
262 }
263 assert(y_isl_layout != NULL);
264 uint8_t y_bpc = y_isl_layout->channels_array[0].bits;
265
266 /* |ycbcr_comp| holds components in the order : Cr-Y-Cb */
267 nir_ssa_def *zero = nir_imm_float(builder, 0.0f);
268 nir_ssa_def *one = nir_imm_float(builder, 1.0f);
269 /* Use extra 2 channels for following swizzle */
270 nir_ssa_def *ycbcr_comp[5] = { zero, zero, zero, one, zero };
271
272 uint8_t ycbcr_bpcs[5];
273 memset(ycbcr_bpcs, y_bpc, sizeof(ycbcr_bpcs));
274
275 /* Go through all the planes and gather the samples into a |ycbcr_comp|
276 * while applying a swizzle required by the spec:
277 *
278 * R, G, B should respectively map to Cr, Y, Cb
279 */
280 for (uint32_t p = 0; p < format->n_planes; p++) {
281 const struct anv_format_plane *plane_format = &format->planes[p];
282 nir_ssa_def *plane_sample = create_plane_tex_instr_implicit(&state, p);
283
284 for (uint32_t pc = 0; pc < 4; pc++) {
285 enum isl_channel_select ycbcr_swizzle =
286 swizzle_channel(plane_format->ycbcr_swizzle, pc);
287 if (ycbcr_swizzle == ISL_CHANNEL_SELECT_ZERO)
288 continue;
289
290 unsigned ycbcr_component = channel_to_component(ycbcr_swizzle);
291 ycbcr_comp[ycbcr_component] = nir_channel(builder, plane_sample, pc);
292
293 /* Also compute the number of bits for each component. */
294 const struct isl_format_layout *isl_layout =
295 isl_format_get_layout(plane_format->isl_format);
296 ycbcr_bpcs[ycbcr_component] = isl_layout->channels_array[pc].bits;
297 }
298 }
299
300 /* Now remaps components to the order specified by the conversion. */
301 nir_ssa_def *swizzled_comp[4] = { NULL, };
302 uint32_t swizzled_bpcs[4] = { 0, };
303
304 for (uint32_t i = 0; i < ARRAY_SIZE(state.conversion->mapping); i++) {
305 /* Maps to components in |ycbcr_comp| */
306 static const uint32_t swizzle_mapping[] = {
307 [VK_COMPONENT_SWIZZLE_ZERO] = 4,
308 [VK_COMPONENT_SWIZZLE_ONE] = 3,
309 [VK_COMPONENT_SWIZZLE_R] = 0,
310 [VK_COMPONENT_SWIZZLE_G] = 1,
311 [VK_COMPONENT_SWIZZLE_B] = 2,
312 [VK_COMPONENT_SWIZZLE_A] = 3,
313 };
314 const VkComponentSwizzle m = state.conversion->mapping[i];
315
316 if (m == VK_COMPONENT_SWIZZLE_IDENTITY) {
317 swizzled_comp[i] = ycbcr_comp[i];
318 swizzled_bpcs[i] = ycbcr_bpcs[i];
319 } else {
320 swizzled_comp[i] = ycbcr_comp[swizzle_mapping[m]];
321 swizzled_bpcs[i] = ycbcr_bpcs[swizzle_mapping[m]];
322 }
323 }
324
325 nir_ssa_def *result = nir_vec(builder, swizzled_comp, 4);
326 if (state.conversion->ycbcr_model != VK_SAMPLER_YCBCR_MODEL_CONVERSION_RGB_IDENTITY) {
327 result = nir_convert_ycbcr_to_rgb(builder,
328 state.conversion->ycbcr_model,
329 state.conversion->ycbcr_range,
330 result,
331 swizzled_bpcs);
332 }
333
334 nir_ssa_def_rewrite_uses(&tex->dest.ssa, result);
335 nir_instr_remove(&tex->instr);
336
337 return true;
338 }
339
340 bool
anv_nir_lower_ycbcr_textures(nir_shader * shader,const struct anv_pipeline_layout * layout)341 anv_nir_lower_ycbcr_textures(nir_shader *shader,
342 const struct anv_pipeline_layout *layout)
343 {
344 return nir_shader_instructions_pass(shader,
345 anv_nir_lower_ycbcr_textures_instr,
346 nir_metadata_block_index |
347 nir_metadata_dominance,
348 (void *)layout);
349 }
350