1<?xml version="1.0" encoding="UTF-8"?> 2<!-- 3Copyright © 2020 Google, Inc. 4 5Permission is hereby granted, free of charge, to any person obtaining a 6copy of this software and associated documentation files (the "Software"), 7to deal in the Software without restriction, including without limitation 8the rights to use, copy, modify, merge, publish, distribute, sublicense, 9and/or sell copies of the Software, and to permit persons to whom the 10Software is furnished to do so, subject to the following conditions: 11 12The above copyright notice and this permission notice (including the next 13paragraph) shall be included in all copies or substantial portions of the 14Software. 15 16THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 22SOFTWARE. 23 --> 24 25<isa> 26 27<!-- 28 Cat0 Instructions: 29 --> 30 31<bitset name="#instruction-cat0" extends="#instruction"> 32 <!-- 33 TODO immed size is 16b for a3xx, 20b for a4xx, 32b for a5xx+.. should we 34 try to express this? Also, not all cat0 take an immed, so maybe push 35 this further down the hierarchy? 36 --> 37 <field name="IMMED" low="0" high="31" type="branch"/> 38 39 <field name="REPEAT" low="40" high="42" type="#rptN"/> 40 <pattern pos="43">x</pattern> 41 <field name="SS" pos="44" type="bool" display="(ss)"/> 42 <field name="EQ" pos="48" type="bool" display="(eq)"/> 43 <field name="JP" pos="59" type="bool" display="(jp)"/> 44 <field name="SY" pos="60" type="bool" display="(sy)"/> 45 <pattern low="61" high="63">000</pattern> <!-- cat0 --> 46 <encode> 47 <map name="IMMED">src->cat0.immed</map> 48 <map name="COMP1">src->cat0.comp1</map> 49 <map name="COMP2">src->cat0.comp2</map> 50 <map name="INV1">src->cat0.inv1</map> 51 <map name="INV2">src->cat0.inv2</map> 52 </encode> 53</bitset> 54 55 56<bitset name="#instruction-cat0-0src" extends="#instruction-cat0"> 57 <display> 58 {SY}{SS}{EQ}{JP}{REPEAT}{NAME} 59 </display> 60 <pattern low="32" high="36">00000</pattern> 61 <pattern low="37" high="39">000</pattern> <!-- BRTYPE --> 62 <pattern low="45" high="47">000</pattern> <!-- src1 --> 63 <pattern low="52" high="54">000</pattern> <!-- src0 --> 64</bitset> 65 66<bitset name="nop" extends="#instruction-cat0-0src"> 67 <pattern low="49" high="51">xx0</pattern> <!-- OPC_HI --> 68 <pattern low="55" high="58">0000</pattern> <!-- OPC --> 69</bitset> 70 71<bitset name="end" extends="#instruction-cat0-0src"> 72 <pattern low="49" high="51">xx0</pattern> <!-- OPC_HI --> 73 <pattern low="55" high="58">0110</pattern> <!-- OPC --> 74</bitset> 75 76<bitset name="ret" extends="#instruction-cat0-0src"> 77 <pattern low="49" high="51">xx0</pattern> <!-- OPC_HI --> 78 <pattern low="55" high="58">0100</pattern> <!-- OPC --> 79</bitset> 80 81<bitset name="emit" extends="#instruction-cat0-0src"> 82 <pattern low="49" high="51">xx0</pattern> <!-- OPC_HI --> 83 <pattern low="55" high="58">0111</pattern> <!-- OPC --> 84</bitset> 85 86<bitset name="cut" extends="#instruction-cat0-0src"> 87 <pattern low="49" high="51">xx0</pattern> <!-- OPC_HI --> 88 <pattern low="55" high="58">1000</pattern> <!-- OPC --> 89</bitset> 90 91<bitset name="chmask" extends="#instruction-cat0-0src"> 92 <pattern low="49" high="51">xx0</pattern> <!-- OPC_HI --> 93 <pattern low="55" high="58">1001</pattern> <!-- OPC --> 94</bitset> 95 96<bitset name="chsh" extends="#instruction-cat0-0src"> 97 <pattern low="49" high="51">xx0</pattern> <!-- OPC_HI --> 98 <pattern low="55" high="58">1010</pattern> <!-- OPC --> 99</bitset> 100 101<bitset name="flow_rev" extends="#instruction-cat0-0src"> 102 <pattern low="49" high="51">xx0</pattern> <!-- OPC_HI --> 103 <pattern low="55" high="58">1011</pattern> <!-- OPC --> 104</bitset> 105 106<bitset name="shpe" extends="#instruction-cat0-0src"> 107 <doc>SHader Prologue End</doc> 108 <pattern low="49" high="51">xx1</pattern> <!-- OPC_HI --> 109 <pattern low="55" high="58">1000</pattern> <!-- OPC --> 110</bitset> 111 112<bitset name="prede" extends="#instruction-cat0-0src"> 113 <pattern low="49" high="51">xx1</pattern> <!-- OPC_HI --> 114 <pattern low="55" high="58">1111</pattern> <!-- OPC --> 115</bitset> 116 117 118<bitset name="#instruction-cat0-1src" extends="#instruction-cat0"> 119 <display> 120 {SY}{SS}{EQ}{JP}{NAME} {INV1}p0.{COMP1} 121 </display> 122 <pattern low="32" high="36">00000</pattern> 123 <pattern low="37" high="39">000</pattern> <!-- BRTYPE --> 124 <pattern low="45" high="47">000</pattern> <!-- src1 --> 125 <field name="INV1" pos="52" type="bool" display="!"> 126 <doc>Invert source condition</doc> 127 </field> 128 <field name="COMP1" low="53" high="54" type="#swiz"> 129 <doc>Predicate register (p0.c) component for source</doc> 130 </field> 131</bitset> 132 133<bitset name="kill" extends="#instruction-cat0-1src"> 134 <pattern low="49" high="51">xx0</pattern> <!-- OPC_HI --> 135 <pattern low="55" high="58">0101</pattern> <!-- OPC --> 136</bitset> 137 138<bitset name="predt" extends="#instruction-cat0-1src"> 139 <pattern low="49" high="51">xx1</pattern> <!-- OPC_HI --> 140 <pattern low="55" high="58">1101</pattern> <!-- OPC --> 141</bitset> 142 143<bitset name="predf" extends="#instruction-cat0-1src"> 144 <pattern low="49" high="51">xx1</pattern> <!-- OPC_HI --> 145 <pattern low="55" high="58">1110</pattern> <!-- OPC --> 146</bitset> 147 148 149<bitset name="#instruction-cat0-immed" extends="#instruction-cat0"> 150 <display> 151 {SY}{SS}{JP}{NAME} #{IMMED} 152 </display> 153 <pattern low="32" high="36">xxxxx</pattern> <!-- INDEX --> 154 <pattern low="37" high="39">xxx</pattern> <!-- BRTYPE --> 155 <pattern low="45" high="47">xxx</pattern> <!-- src1 --> 156 <pattern low="52" high="54">xxx</pattern> <!-- src0 --> 157</bitset> 158 159<bitset name="jump" extends="#instruction-cat0-immed"> 160 <pattern low="49" high="51">xx0</pattern> <!-- OPC_HI --> 161 <pattern low="55" high="58">0010</pattern> <!-- OPC --> 162</bitset> 163 164<bitset name="call" extends="#instruction-cat0-immed"> 165 <pattern low="49" high="51">xx0</pattern> <!-- OPC_HI --> 166 <pattern low="55" high="58">0011</pattern> <!-- OPC --> 167</bitset> 168 169<bitset name="bkt" extends="#instruction-cat0-immed"> 170 <pattern low="49" high="51">xx1</pattern> <!-- OPC_HI --> 171 <pattern low="55" high="58">0000</pattern> <!-- OPC --> 172</bitset> 173 174<bitset name="getlast" extends="#instruction-cat0"> 175 <doc> 176 Perform a jump for all fibers in the first cluster with any active 177 fibers, except for the last fiber in the cluster. 178 While there is a separate field for CLUSTER_SIZE its value does 179 not change the behaviour in any observable way, it behaves as if 180 CLUSTER_SIZE is always 8. 181 </doc> 182 183 <gen min="600"/> 184 185 <display> 186 {SY}{SS}{JP}{NAME}.w{CLUSTER_SIZE} #{IMMED} 187 </display> 188 <derived name="CLUSTER_SIZE" type="uint"> 189 <expr> 190 2ULL << {W} 191 </expr> 192 </derived> 193 <pattern low="32" high="36">xxxxx</pattern> <!-- INDEX --> 194 <pattern low="37" high="39">xxx</pattern> <!-- BRTYPE --> 195 <pattern low="45" high="47">xxx</pattern> <!-- src1 --> 196 <pattern low="49" high="51">xx1</pattern> <!-- OPC_HI --> 197 <pattern low="55" high="58">0100</pattern> <!-- OPC --> 198 199 <field name="W" low="52" high="54" type="uint"/> 200 201 <encode> 202 <map name="W">util_logbase2(8) - 1</map> 203 </encode> 204</bitset> 205 206<bitset name="getone" extends="#instruction-cat0-immed"> 207 <pattern low="49" high="51">xx1</pattern> <!-- OPC_HI --> 208 <pattern low="55" high="58">0101</pattern> <!-- OPC --> 209</bitset> 210 211<bitset name="shps" extends="#instruction-cat0-immed"> 212 <doc>SHader Prologue Start</doc> 213 <pattern low="49" high="51">xx1</pattern> <!-- OPC_HI --> 214 <pattern low="55" high="58">0111</pattern> <!-- OPC --> 215</bitset> 216 217<bitset name="#instruction-cat0-branch" extends="#instruction-cat0"> 218 <pattern low="49" high="51">xx0</pattern> <!-- OPC_HI --> 219 <pattern low="55" high="58">0001</pattern> <!-- OPC --> 220</bitset> 221 222<bitset name="brac" extends="#instruction-cat0-branch"> 223 <display> 224 {SY}{SS}{EQ}{JP}{NAME}.{INDEX} #{IMMED} 225 </display> 226 <field name="INDEX" low="32" high="36" type="uint"/> 227 <pattern low="37" high="39">011</pattern> <!-- BRTYPE --> 228 <pattern low="45" high="47">xxx</pattern> <!-- src1 --> 229 <pattern low="52" high="54">xxx</pattern> <!-- src0 --> 230 <encode> 231 <map name="INDEX">src->cat0.idx</map> 232 </encode> 233</bitset> 234 235<bitset name="brax" extends="#instruction-cat0-branch"> 236 <pattern low="32" high="36">xxxxx</pattern> 237 <pattern low="37" high="39">110</pattern> <!-- BRTYPE --> 238 <pattern low="45" high="47">xxx</pattern> <!-- src1 --> 239 <pattern low="52" high="54">xxx</pattern> <!-- src0 --> 240</bitset> 241 242<bitset name="#instruction-cat0-branch-1src" extends="#instruction-cat0-branch"> 243 <display> 244 {SY}{SS}{EQ}{JP}{NAME} {INV1}p0.{COMP1}, #{IMMED} 245 </display> 246 <pattern low="32" high="36">xxxxx</pattern> 247 <pattern low="45" high="47">xxx</pattern> <!-- src1 --> 248 <field name="INV1" pos="52" type="bool" display="!"> 249 <doc>Invert source condition</doc> 250 </field> 251 <field name="COMP1" low="53" high="54" type="#swiz"> 252 <doc>Predicate register (p0.c) component for source</doc> 253 </field> 254</bitset> 255 256<bitset name="br" extends="#instruction-cat0-branch-1src"> 257 <pattern low="37" high="39">000</pattern> <!-- BRTYPE --> 258</bitset> 259 260<bitset name="bany" extends="#instruction-cat0-branch-1src"> 261 <pattern low="37" high="39">100</pattern> <!-- BRTYPE --> 262</bitset> 263 264<bitset name="ball" extends="#instruction-cat0-branch-1src"> 265 <pattern low="37" high="39">101</pattern> <!-- BRTYPE --> 266</bitset> 267 268<bitset name="#instruction-cat0-branch-2src" extends="#instruction-cat0-branch"> 269 <display> 270 {SY}{SS}{EQ}{JP}{NAME} {INV1}p0.{COMP1}, {INV2}p0.{COMP2}, #{IMMED} 271 </display> 272 <pattern low="32" high="36">xxxxx</pattern> 273 <!-- src1: --> 274 <field name="INV2" pos="45" type="bool" display="!"> 275 <doc>Invert source 2 condition</doc> 276 </field> 277 <field name="COMP2" low="46" high="47" type="#swiz"> 278 <doc>Predicate register (p0.c) component for source 2</doc> 279 </field> 280 <!-- src0: --> 281 <field name="INV1" pos="52" type="bool" display="!"> 282 <doc>Invert source 1 condition</doc> 283 </field> 284 <field name="COMP1" low="53" high="54" type="#swiz"> 285 <doc>Predicate register (p0.c) component for source 1</doc> 286 </field> 287</bitset> 288 289<bitset name="brao" extends="#instruction-cat0-branch-2src"> 290 <pattern low="37" high="39">001</pattern> <!-- BRTYPE --> 291</bitset> 292 293<bitset name="braa" extends="#instruction-cat0-branch-2src"> 294 <pattern low="37" high="39">010</pattern> <!-- BRTYPE --> 295</bitset> 296 297<!-- TODO rest of cat0 --> 298 299</isa>