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/third_party/mesa3d/src/amd/compiler/
D	README-ISA.md	8 D.u = abs(S0.i - S1.i) + S2.u. 15 ABS_DIFF (A,B) = (A>B) ? (A-B) : (B-A) 21 `v_sad_u32(-5, 0, 0)` would return `4294967291` (`-5` interpreted as unsigned), 78 > and sent to the texture cache. Any texture or buffer resources and samplers 79 > are also sent immediately. However, write-data is not immediately sent to the 80 > texture cache. 102 ## FLAT, Scratch, Global instructions 126 ## RDNA L0, L1 cache and DLC, GLC bits 128 The old L1 cache was renamed to L0, and a new L1 cache was added to RDNA. The 129 L1 cache is 1 cache per shader array. Some instruction encodings have DLC and [all …]
/third_party/mesa3d/src/amd/common/
D	amd_kernel_code_t.h	17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 28 //---------------------------------------------------------------------------// 30 //---------------------------------------------------------------------------// 66 ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER_WIDTH) - 1) 72 ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_PTR_WIDTH) - 1) 78 ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_QUEUE_PTR_WIDTH) - 1) 84 ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_KERNARG_SEGMENT_PTR_WIDTH) - 1) 90 ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_ID_WIDTH) - 1) 96 ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_FLAT_SCRATCH_INIT_WIDTH) - 1) 102 ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_SIZE_WIDTH) - 1) [all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
D	AMDKernelCodeT.h	1 //===-- AMDGPUKernelCodeT.h - Print AMDGPU assembly code ---------- C++ --===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 9 //===----------------------------------------------------------------------===// 20 //---------------------------------------------------------------------------// 22 //---------------------------------------------------------------------------// 91 …BUFFER = ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_PRIVATE_SEGMENT_BUFFER_WIDTH) - 1) << AMD_CODE_PROPE… 95 …GPR_DISPATCH_PTR = ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_PTR_WIDTH) - 1) << AMD_CODE_PROPE… 99 …AMD_CODE_PROPERTY_ENABLE_SGPR_QUEUE_PTR = ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_QUEUE_PTR_WIDTH) - … 103 …GMENT_PTR = ((1 << AMD_CODE_PROPERTY_ENABLE_SGPR_KERNARG_SEGMENT_PTR_WIDTH) - 1) << AMD_CODE_PROPE… [all …]
D	SIInstrFormats.td	1 //===-- SIInstrFormats.td - SI Instruction Encodings ----------------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 11 //===----------------------------------------------------------------------===// 16 // Low bits - basic encoding information. 43 field bit FLAT = 0; 50 // High bits - other information. 63 // Most sopk treat the immediate as a signed 16-bit, however some 67 // This is an s_store_dword* instruction that requires a cache flush 69 // SMEM instructions like the cache flush ones. [all …]
D	SIMemoryLegalizer.cpp	1 //===- SIMemoryLegalizer.cpp ----------------------------------------------===// 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 7 //===----------------------------------------------------------------------===// 10 /// Memory legalizer - implements memory model. More information can be 12 /// http://llvm.org/docs/AMDGPUUsage.html#memory-model 14 //===----------------------------------------------------------------------===// 47 #define DEBUG_TYPE "si-memory-legalizer" 89 /// The address spaces that can be accessed by a FLAT instruction. 90 FLAT = GLOBAL \| LDS \| SCRATCH, enumerator 105 int BitIdx = AMDGPU::getNamedOperandIdx(MI->getOpcode(), BitName); in enableNamedBit() [all …]
/third_party/mesa3d/docs/relnotes/
D	18.1.6.rst	16 ---------------- 20 580e03328ffefe1fd43b19ab7669f20d931601a1c0a4c0f8b9c65d6e81a06df3 mesa-18.1.6.tar.gz 21 bb7ce759069801804fcfb8152da3457f76cd7b4e0096e4870ff5adcb5c894289 mesa-18.1.6.tar.xz 24 ------------ 29 --------- 31 - `Bug 13728 <https://bugs.freedesktop.org/show_bug.cgi?id=13728>`__ - 34 - `Bug 98699 <https://bugs.freedesktop.org/show_bug.cgi?id=98699>`__ - 36 - `Bug 99730 <https://bugs.freedesktop.org/show_bug.cgi?id=99730>`__ - 39 - `Bug 106382 <https://bugs.freedesktop.org/show_bug.cgi?id=106382>`__ 40 - Shader cache breaks INTEL_DEBUG=shader_time [all …]
D	9.1.1.rst	15 ------------- 19 6508d9882d8dce7106717f365632700c MesaLib-9.1.1.tar.gz 20 6ea2bdc3b7ecfb4257b39814b4182580 MesaLib-9.1.1.tar.bz2 21 3434c0eb47849a08c53cd32833d10d13 MesaLib-9.1.1.zip 24 ------------ 29 --------- 33 - `Bug 30232 <https://bugs.freedesktop.org/show_bug.cgi?id=30232>`__ - 35 - `Bug 32429 <https://bugs.freedesktop.org/show_bug.cgi?id=32429>`__ - 37 - `Bug 38086 <https://bugs.freedesktop.org/show_bug.cgi?id=38086>`__ - 38 Mesa 7.11-devel implementation error: Unexpected program target in [all …]
D	9.1.3.rst	15 ------------- 19 952ccd03547ed72333b64e1746cf8ada MesaLib-9.1.3.tar.bz2 20 26d2f1aa8e9db388d51fcbd163c61fb7 MesaLib-9.1.3.tar.gz 21 7017b7bdf0ebfd39a5c46cee7cf6b567 MesaLib-9.1.3.zip 24 ------------ 29 --------- 33 - `Bug 39251 <https://bugs.freedesktop.org/show_bug.cgi?id=39251>`__ - 36 - `Bug 47478 <https://bugs.freedesktop.org/show_bug.cgi?id=47478>`__ - 39 - `Bug 56416 <https://bugs.freedesktop.org/show_bug.cgi?id=56416>`__ - 42 - `Bug 57436 <https://bugs.freedesktop.org/show_bug.cgi?id=57436>`__ - [all …]
D	20.0.0.rst	`1 Mesa 20.0.0 Release Notes / 2020-02-19 21 --------------- 25 bb6db3e54b608d2536d4000b3de7dd3ae115fc114e8acbb5afff4b3bbed04b34 mesa-20.0.0.tar.xz 28 ------------ 30 - OpenGL 4.6 on radeonsi. 31 - GL_ARB_gl_spirv on radeonsi. 32 - GL_ARB_spirv_extensions on radeonsi. 33 - GL_EXT_direct_state_access for compatibility profile. 34 - VK_AMD_device_coherent_memory on RADV. 35 - VK_AMD_mixed_attachment_samples on RADV. [all …]`
/third_party/mindspore/mindspore-src/source/mindspore/ccsrc/minddata/dataset/engine/cache/
D	cache_service.h	8 * http://www.apache.org/licenses/LICENSE-2.0 31 #include "minddata/dataset/engine/cache/cache_request.h" 32 #include "minddata/dataset/engine/cache/cache_pool.h" 41 /// \brief A cache service for storing/fetching buffers to in memory cache and may spill to disk th… 48 /// \param mem_sz Memory size to be set aside for the in memory cache. 0 means unlimited 50 /// \param generate_id If the cache service should generate row id for buffer that is cached. 51 /// For non-mappable dataset, this should be set to true. 58 /// \brief Main function to cache a row which is in form a series of buffers. 73 /// All needed results are stored in the flat buffer. 81 /// \brief A structure returned from the cache server for statistics request. [all …]
D	cache_fbb.h	`8 * http://www.apache.org/licenses/LICENSE-2.0 25 #include "minddata/dataset/engine/cache/de_tensor_generated.h" 38 /// \brief A function used by BatchFetchRequest to deserialize a flat buffer back to a tensor row.`
D	cache_fbb.cc	8 * http://www.apache.org/licenses/LICENSE-2.0 16 #include "minddata/dataset/engine/cache/cache_fbb.h" 26 auto shape_off = fbb->CreateVector(ts->shape().AsVector()); in SerializeOneTensorMeta() 27 const auto ptr = ts->GetBuffer(); in SerializeOneTensorMeta() 31 auto src = ts->type().value(); in SerializeOneTensorMeta() 37 // Map the type to fill in the flat buffer. in SerializeOneTensorMeta() 81 tensor_sz.push_back(ts_ptr->SizeInBytes()); in SerializeTensorRowHeader() 83 auto column_off = fbb->CreateVector(v); in SerializeTensorRowHeader() 84 auto data_sz_off = fbb->CreateVector(tensor_sz); in SerializeTensorRowHeader() 90 row_builder.add_size_of_this(-1); // fill in later after we call Finish. in SerializeTensorRowHeader() [all …]
D	cache_request.cc	2 * Copyright 2020-2021 Huawei Technologies Co., Ltd 8 * http://www.apache.org/licenses/LICENSE-2.0 16 #include "minddata/dataset/engine/cache/cache_request.h" 26 #include "minddata/dataset/engine/cache/cache_client.h" 27 #include "minddata/dataset/engine/cache/cache_fbb.h" 41 …CHECK_FAIL_RETURN_UNEXPECTED(cc->SupportLocalClient() == support_local_bypass_, "Local bypass mism… in SerializeCacheRowRequest() 46 sz_ += fbb->GetSize(); in SerializeCacheRowRequest() 48 sz_ += ts->SizeInBytes(); in SerializeCacheRowRequest() 62 …auto mem_rq = std::make_shared<AllocateSharedBlockRequest>(rq_.connection_id(), cc->GetClientId(),… in SerializeCacheRowRequest() 63 RETURN_IF_NOT_OK(cc->PushRequest(mem_rq)); in SerializeCacheRowRequest() [all …]
/third_party/vk-gl-cts/external/vulkan-docs/src/chapters/
D	shaders.txt	1 // Copyright 2015-2021 The Khronos Group, Inc. 3 // SPDX-License-Identifier: CC-BY-4.0 14 control and evaluation shaders operating on <<drawing-patch-lists,patches>>, 19 <<pipeline-graphics-subsets-pre-rasterization,pre-rasterization shader 34 Shader variables are associated with execution environment-provided inputs 35 and outputs using _built-in_ decorations in the shader. 40 [[shader-modules]] 44 -- 49 The shader code defining a shader module must: be in the SPIR-V format, as 50 described by the <<spirvenv,Vulkan Environment for SPIR-V>> appendix. [all …]
/third_party/mesa3d/src/gallium/drivers/freedreno/a3xx/
D	fd3_program.c	47 return (!rast->depth_clip_near \|\| in fd3_needs_manual_clipping() 48 util_bitcount(rast->clip_plane_enable) > 6 \|\| in fd3_needs_manual_clipping() 57 const struct ir3_info *si = &so->info; in emit_shader() 62 if (so->type == MESA_SHADER_VERTEX) { in emit_shader() 69 sz = si->sizedwords; in emit_shader() 71 bin = fd_bo_map(so->bo); in emit_shader() 81 CP_LOAD_STATE_0_NUM_UNIT(so->instrlen)); in emit_shader() 86 OUT_RELOC(ring, so->bo, 0, CP_LOAD_STATE_1_STATE_TYPE(ST_SHADER), 0); in emit_shader() 112 vsi = &vp->info; in fd3_program_emit() 113 fsi = &fp->info; in fd3_program_emit() [all …]
/third_party/mesa3d/src/asahi/compiler/
D	agx_pack.c	31 /* Value to patch with will be block->offset / 39 / TODO: how to encode 16-bit coords? / in agx_pack_sample_coords() 81 / Otherwise must be a 16-bit float immediate / in agx_pack_lod() 147 / RA invariant: alignment of half-reg / in agx_pack_alu_dst() 152 (dest.cache ? (1 << 0) : 0) \| in agx_pack_alu_dst() 165 / Flags 0 for an 8-bit immediate / in agx_pack_alu_src() 183 assert(!(src.cache && src.discard)); in agx_pack_alu_src() 185 unsigned hint = src.discard ? 0x3 : src.cache ? 0x2 : 0x1; in agx_pack_alu_src() 206 / Flags 0x4 for an 8-bit immediate */ in agx_pack_cmpsel_src() 225 assert(!(src.cache && src.discard)); in agx_pack_cmpsel_src() [all …]
/third_party/skia/build/fuchsia/
D	update_fuchsia_sdk	4 # Use of this source code is governed by a BSD-style license that can be 10 Downloads both the Fuchsia SDK and Fuchsia-compatible clang 12 the arg-provide \|sdk_dir\| and \|clang_dir\| respectively. This 34 "https://commondatastorage.googleapis.com/chrome-infra-docs/flat" + \ 37 subprocess.call(["cipd", "--version"]) 46 pkg_suffix = pkg_name.replace('/', '-') + ".zip" 48 cipd_cmd = "cipd pkg-fetch " + pkg_name + " -version \"" + version + "\" -out " + \ 49 zip_file.name + " -cache-dir " + cipd_cache_dir 50 unzip_cmd = "unzip -q " + zip_file.name + " -d " + output_dir 57 parser.add_argument("-sdk_dir", type=str, [all …]
/third_party/vk-gl-cts/framework/referencerenderer/
D	design.txt	`2 ------------------------------- 5 - must support arbitrary VA arrays 6 - must support primitive setup reference 7 - must support lines, points 8 - must support instancing 9 - must support vertex shading -> custom position transformations 10 - flat, noperspective shading 11 - multiple render targets 12 - faster shading? move packet loop inside shader 14 - can be extended for tessellation and geometry shading [all …]`
/third_party/skia/third_party/externals/swiftshader/third_party/SPIRV-Tools/tools/sva/
D	yarn.lock	5 "@babel/code-frame@^7.0.0": 7 …resolved "https://registry.yarnpkg.com/@babel/code-frame/-/code-frame-7.5.5.tgz#bc0782f6d69f7b7d49… 8 …integrity sha512-27d4lZoomVyo51VegxI20xZPuSHusqbQag/ztrBC7wegWoQ1nLREPVSKSW8byhTlzTKyNE4ifaTA6lCp7… 14 …resolved "https://registry.yarnpkg.com/@babel/highlight/-/highlight-7.5.0.tgz#56d11312bd9248fa6195… 15 …integrity sha512-7dV4eu9gBxoM0dAnj/BCFDW9LFU0zvTrkq0ugM7pnHEgguOEeOz1so2ZghEdzviYzQEED0r4EAgpsBChK… 19 js-tokens "^4.0.0" 23 …resolved "https://registry.yarnpkg.com/@types/estree/-/estree-0.0.39.tgz#e177e699ee1b8c22d23174caa… 24 …integrity sha512-EYNwp3bU+98cpU4lAWYYL7Zz+2gryWH1qbdDTidVd6hkiR6weksdbMadyXKXNPEkQFhXM+hVO9ZygomHX… 28 …resolved "https://registry.yarnpkg.com/@types/node/-/node-12.7.5.tgz#e19436e7f8e9b4601005d73673b6d… 29 …integrity sha512-9fq4jZVhPNW8r+UYKnxF1e2HkDWOWKM5bC2/7c9wPV835I0aOrVbS/Hw/pWPk2uKrNXQqg9Z959Kz+IYD… [all …]
/third_party/skia/third_party/externals/spirv-tools/tools/sva/
D	yarn.lock	5 "@babel/code-frame@^7.0.0": 7 …resolved "https://registry.yarnpkg.com/@babel/code-frame/-/code-frame-7.5.5.tgz#bc0782f6d69f7b7d49… 8 …integrity sha512-27d4lZoomVyo51VegxI20xZPuSHusqbQag/ztrBC7wegWoQ1nLREPVSKSW8byhTlzTKyNE4ifaTA6lCp7… 14 …resolved "https://registry.yarnpkg.com/@babel/highlight/-/highlight-7.5.0.tgz#56d11312bd9248fa6195… 15 …integrity sha512-7dV4eu9gBxoM0dAnj/BCFDW9LFU0zvTrkq0ugM7pnHEgguOEeOz1so2ZghEdzviYzQEED0r4EAgpsBChK… 19 js-tokens "^4.0.0" 23 …resolved "https://registry.yarnpkg.com/@types/estree/-/estree-0.0.39.tgz#e177e699ee1b8c22d23174caa… 24 …integrity sha512-EYNwp3bU+98cpU4lAWYYL7Zz+2gryWH1qbdDTidVd6hkiR6weksdbMadyXKXNPEkQFhXM+hVO9ZygomHX… 28 …resolved "https://registry.yarnpkg.com/@types/node/-/node-12.7.5.tgz#e19436e7f8e9b4601005d73673b6d… 29 …integrity sha512-9fq4jZVhPNW8r+UYKnxF1e2HkDWOWKM5bC2/7c9wPV835I0aOrVbS/Hw/pWPk2uKrNXQqg9Z959Kz+IYD… [all …]
/third_party/ffmpeg/libavcodec/
D	dsd_tablegen.h	20 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA 36 * Properties of this 96-tap lowpass filter when applied on a signal 41 * () flat response up to 48 kHz 44 * spectrum below 70 kHz is practically alias-free. 49 * should fit into a modern processor's fast cache. 53 * The 2nd half (48 coeffs) of a 96-tap symmetric lowpass filter 59 0.003883043418804416, -0.003284703416210726, -0.008080250212687497, 60 -0.01067241812471033, -0.01139427235000863, -0.0106813877974587, 61 -0.009007905078766049, -0.006828859761015335, -0.004535184322001496, 62 -0.002425035959059578, -0.0006922187080790708, 0.0005700762133516592, [all …]
/third_party/spirv-tools/tools/sva/
D	yarn.lock	5 "@eslint-community/eslint-utils@^4.2.0": 7 …resolved "https://registry.yarnpkg.com/@eslint-community/eslint-utils/-/eslint-utils-4.4.0.tgz#a23… 8 …integrity sha512-1/sA4dwrzBAyeUoQ6oxahHKmrZvsnLCg4RfxW3ZFGGmQkSNQPFNLV9CUEFQP1x9EYXHTo5p6xdhZM1Ne9… 10 eslint-visitor-keys "^3.3.0" 12 "@eslint-community/regexpp@^4.4.0": 14 …resolved "https://registry.yarnpkg.com/@eslint-community/regexpp/-/regexpp-4.5.1.tgz#cdd35dce4fa1a… 15 …integrity sha512-Z5ba73P98O1KUYCCJTUeVpja9RcGoMdncZ6T49FCUl2lN38JtCJ+3WgIDBv0AuY4WChU5PmtJmOCTlN6F… 19 …resolved "https://registry.yarnpkg.com/@eslint/eslintrc/-/eslintrc-2.0.3.tgz#4910db5505f4d503f2777… 20 …integrity sha512-+5gy6OQfk+xx3q0d6jGZZC3f3KzAkXc/IanVxd1is/VIIziRqqt3ongQz0FiTUXqTk0c7aDB3OaFuKnuS… 27 import-fresh "^3.2.1" [all …]
/third_party/mesa3d/docs/
D	envvars.rst	6 but they can sometimes be useful for debugging end-user issues. 9 --------------------------- 15 colon-separated list of paths to search for DRI drivers 32 ------------------------------- 52 following comma-separated list of named flags, which adds extra 73 ``GL_EXT_foo -GL_EXT_bar`` will enable the ``GL_EXT_foo`` extension 79 or before year X will be reported. This is to work-around a bug in 80 some games where the extension string is copied into a fixed-size 82 buffer overrun can cause the game to crash. This is a work-around for 88 - The format should be ``MAJOR.MINOR[FC\|COMPAT]`` [all …]
/third_party/skia/third_party/externals/abseil-cpp/absl/strings/internal/
D	cord_rep_ring.cc	7 // https://www.apache.org/licenses/LICENSE-2.0 43 return rep->IsFlat() \|\| rep->IsExternal(); in IsFlatOrExternal() 48 if (ABSL_PREDICT_FALSE(extra > CordRepRing::kMaxCapacity - n)) { in CheckCapacity() 53 // Creates a flat from the provided string data, allocating up to `extra` 54 // capacity in the returned flat depending on kMaxFlatLength limitations. 59 rep->length = n; in CreateFlat() 60 memcpy(rep->Data(), s, n); in CreateFlat() 65 // Requires all entries to be a FLAT or EXTERNAL node. 67 rep->ForEach(head, tail, [rep](index_type ix) { in UnrefEntries() 68 CordRep* child = rep->entry_child(ix); in UnrefEntries() [all …]
/third_party/skia/third_party/externals/freetype/docs/
D	INSTALL.ANY	`9 --------------------- 13 2.6.1) it is necessary to disable pre-compiled headers. This is 30 -- base components (required) 38 src/base/ftbbox.c -- recommended, see <ftbbox.h> 39 src/base/ftglyph.c -- recommended, see <ftglyph.h> 41 src/base/ftbdf.c -- optional, see <ftbdf.h> 42 src/base/ftbitmap.c -- optional, see <ftbitmap.h> 43 src/base/ftcid.c -- optional, see <ftcid.h> 44 src/base/ftfstype.c -- optional 45 src/base/ftgasp.c -- optional, see <ftgasp.h> [all …]`

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