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/kernel/linux/linux-5.10/Documentation/devicetree/bindings/serial/
Dqcom,msm-uart.txt1 * MSM Serial UART
3 The MSM serial UART hardware is designed for low-speed use cases where a
4 dma-engine isn't needed. From a software perspective it's mostly compatible
5 with the MSM serial UARTDM except that it only supports reading and writing one
9 - compatible: Should contain "qcom,msm-uart"
10 - reg: Should contain UART register location and length.
11 - interrupts: Should contain UART interrupt.
12 - clocks: Should contain the core clock.
13 - clock-names: Should be "core".
17 A uart device at 0xa9c00000 with interrupt 11.
[all …]
Dqcom,msm-uartdm.txt1 * MSM Serial UARTDM
3 The MSM serial UARTDM hardware is designed for high-speed use cases where the
4 transmit and/or receive channels can be offloaded to a dma-engine. From a
5 software perspective it's mostly compatible with the MSM serial UART except
9 - compatible: Should contain at least "qcom,msm-uartdm".
12 "qcom,msm-uartdm-v1.1"
13 "qcom,msm-uartdm-v1.2"
14 "qcom,msm-uartdm-v1.3"
15 "qcom,msm-uartdm-v1.4"
16 - reg: Should contain UART register locations and lengths. The first
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/serial/
Dqcom,msm-uart.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/serial/qcom,msm-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm MSM SoC Serial UART
10 - Bjorn Andersson <andersson@kernel.org>
11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
14 The MSM serial UART hardware is designed for low-speed use cases where a
15 dma-engine isn't needed. From a software perspective it's mostly compatible
16 with the MSM serial UARTDM except that it only supports reading and writing
[all …]
Dqcom,msm-uartdm.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/serial/qcom,msm-uartdm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm MSM Serial UARTDM
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
12 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
15 The MSM serial UARTDM hardware is designed for high-speed use cases where the
16 transmit and/or receive channels can be offloaded to a dma-engine. From a
[all …]
/kernel/linux/linux-6.6/Documentation/devicetree/bindings/soc/qcom/
Dqcom,gsbi.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
12 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
16 representing a serial sub-node device that is mux'd as part of the GSBI
21 devices. These serial devices can be a QCOM UART, I2C controller, spi
26 const: qcom,gsbi-v1.0.0
28 '#address-cells':
[all …]
/kernel/linux/linux-5.10/drivers/tty/serial/
Dmsm_serial.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/dma-mapping.h>
171 struct uart_port uart; member
183 #define UART_TO_MSM(uart_port) container_of(uart_port, struct msm_port, uart)
188 writel_relaxed(val, port->membase + off); in msm_write()
194 return readl_relaxed(port->membase + off); in msm_read()
206 port->uartclk = 1843200; in msm_serial_set_mnd_regs_tcxo()
218 port->uartclk = 1843200; in msm_serial_set_mnd_regs_tcxoby4()
229 if (msm_port->is_uartdm) in msm_serial_set_mnd_regs()
232 if (port->uartclk == 19200000) in msm_serial_set_mnd_regs()
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0
19 comment "Non-8250 serial port support"
26 This selects the ARM(R) AMBA(R) PrimeCell PL010 UART. If you have
37 Say Y here if you wish to use an AMBA PrimeCell UART as the system
53 This selects the ARM(R) AMBA(R) PrimeCell PL011 UART. If you have
65 Say Y here if you wish to use an AMBA PrimeCell UART as the system
89 bool "Early console using RISC-V SBI"
95 Support for early debug console using RISC-V SBI. This enables
101 tristate "BCM1xxx on-chip DUART serial support"
107 the BCM1250 and derived System-On-a-Chip (SOC) devices. Note that
[all …]
Dqcom_geni_serial.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2017-2018, The Linux foundation. All rights reserved.
16 #include <linux/qcom-geni-se.h>
23 /* UART specific GENI registers */
77 /* UART M_CMD OP codes */
81 /* UART S_CMD OP codes */
100 /* UART pin swap value */
200 struct platform_device *pdev = to_platform_device(uport->dev); in qcom_geni_serial_request_port()
203 uport->membase = devm_platform_ioremap_resource(pdev, 0); in qcom_geni_serial_request_port()
204 if (IS_ERR(uport->membase)) in qcom_geni_serial_request_port()
[all …]
/kernel/linux/linux-6.6/drivers/tty/serial/
Dmsm_serial.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/dma-mapping.h>
172 struct uart_port uart; member
186 return container_of(up, struct msm_port, uart); in to_msm_port()
192 writel_relaxed(val, port->membase + off); in msm_write()
198 return readl_relaxed(port->membase + off); in msm_read()
210 port->uartclk = 1843200; in msm_serial_set_mnd_regs_tcxo()
222 port->uartclk = 1843200; in msm_serial_set_mnd_regs_tcxoby4()
233 if (msm_port->is_uartdm) in msm_serial_set_mnd_regs()
236 if (port->uartclk == 19200000) in msm_serial_set_mnd_regs()
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0
19 comment "Non-8250 serial port support"
26 This selects the ARM(R) AMBA(R) PrimeCell PL010 UART. If you have
37 Say Y here if you wish to use an AMBA PrimeCell UART as the system
53 This selects the ARM(R) AMBA(R) PrimeCell PL011 UART. If you have
65 Say Y here if you wish to use an AMBA PrimeCell UART as the system
89 bool "Early console using RISC-V SBI"
95 Support for early debug console using RISC-V SBI. This enables
101 tristate "BCM1xxx on-chip DUART serial support"
107 the BCM1250 and derived System-On-a-Chip (SOC) devices. Note that
[all …]
Dqcom_geni_serial.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2017-2018, The Linux foundation. All rights reserved.
18 #include <linux/soc/qcom/geni-se.h>
24 #include <dt-bindings/interconnect/qcom,icc.h>
26 /* UART specific GENI registers */
68 /* UART M_CMD OP codes */
70 /* UART S_CMD OP codes */
90 /* UART pin swap value */
192 struct platform_device *pdev = to_platform_device(uport->dev); in qcom_geni_serial_request_port()
195 uport->membase = devm_platform_ioremap_resource(pdev, 0); in qcom_geni_serial_request_port()
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/dma/
Dqcom_bam_dma.txt4 - compatible: must be one of the following:
5 * "qcom,bam-v1.4.0" for MSM8974, APQ8074 and APQ8084
6 * "qcom,bam-v1.3.0" for APQ8064, IPQ8064 and MSM8960
7 * "qcom,bam-v1.7.0" for MSM8916
8 - reg: Address range for DMA registers
9 - interrupts: Should contain the one interrupt shared by all channels
10 - #dma-cells: must be <1>, the cell in the dmas property of the client device
12 - clocks: required clock
13 - clock-names: must contain "bam_clk" entry
14 - qcom,ee : indicates the active Execution Environment identifier (0-7) used in
[all …]
/kernel/linux/linux-5.10/Documentation/devicetree/bindings/soc/qcom/
Dqcom,gsbi.txt4 representing a serial sub-node device that is mux'd as part of the GSBI
9 - compatible: Should contain "qcom,gsbi-v1.0.0"
10 - cell-index: Should contain the GSBI index
11 - reg: Address range for GSBI registers
12 - clocks: required clock
13 - clock-names: must contain "iface" entry
14 - qcom,mode : indicates MUX value for configuration of the serial interface.
15 Please reference dt-bindings/soc/qcom,gsbi.h for valid mux values.
18 - qcom,crci : indicates CRCI MUX value for QUP CRCI ports. Please reference
19 dt-bindings/soc/qcom,gsbi.h for valid CRCI mux values.
[all …]
/kernel/linux/linux-6.6/include/uapi/linux/
Dserial_core.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
33 #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
34 #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */
35 #define PORT_AR7 18 /* Texas Instruments AR7 internal UART */
36 #define PORT_U6_16550A 19 /* ST-Ericsson U6xxx internal UART */
37 #define PORT_TEGRA 20 /* NVIDIA Tegra internal UART */
38 #define PORT_XR17D15X 21 /* Exar XR17D15x UART */
39 #define PORT_LPC3220 22 /* NXP LPC32xx SoC "Standard" UART */
43 #define PORT_ALTR_16550_F32 26 /* Altera 16550 UART with 32 FIFOs */
[all …]
/kernel/linux/linux-5.10/include/uapi/linux/
Dserial_core.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
31 #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
32 #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */
33 #define PORT_AR7 18 /* Texas Instruments AR7 internal UART */
34 #define PORT_U6_16550A 19 /* ST-Ericsson U6xxx internal UART */
35 #define PORT_TEGRA 20 /* NVIDIA Tegra internal UART */
36 #define PORT_XR17D15X 21 /* Exar XR17D15x UART */
37 #define PORT_LPC3220 22 /* NXP LPC32xx SoC "Standard" UART */
41 #define PORT_ALTR_16550_F32 26 /* Altera 16550 UART with 32 FIFOs */
[all …]
/kernel/linux/linux-6.6/arch/arm64/boot/dts/qcom/
Dmsm8953.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
4 #include <dt-bindings/clock/qcom,gcc-msm8953.h>
5 #include <dt-bindings/clock/qcom,rpmcc.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/power/qcom-rpmpd.h>
9 #include <dt-bindings/soc/qcom,apr.h>
10 #include <dt-bindings/sound/qcom,q6afe.h>
11 #include <dt-bindings/sound/qcom,q6asm.h>
12 #include <dt-bindings/thermal/thermal.h>
[all …]
Dsdm845.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
12 #include <dt-bindings/clock/qcom,lpass-sdm845.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sdm845.h>
15 #include <dt-bindings/dma/qcom-gpi.h>
16 #include <dt-bindings/firmware/qcom,scm.h>
[all …]
Dapq8016-sbc.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
8 #include "msm8916-pm8916.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
13 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
14 #include <dt-bindings/sound/apq8016-lpass.h>
18 compatible = "qcom,apq8016-sbc", "qcom,apq8016";
[all …]
Dqdu1000.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,qdu1000-gcc.h>
7 #include <dt-bindings/clock/qcom,rpmh.h>
8 #include <dt-bindings/dma/qcom-gpi.h>
9 #include <dt-bindings/interconnect/qcom,qdu1000-rpmh.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/qcom-rpmpd.h>
12 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
15 interrupt-parent = <&intc>;
17 #address-cells = <2>;
[all …]
Dqcm2290.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/clock/qcom,gcc-qcm2290.h>
9 #include <dt-bindings/clock/qcom,rpmcc.h>
10 #include <dt-bindings/dma/qcom-gpi.h>
11 #include <dt-bindings/firmware/qcom,scm.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
17 interrupt-parent = <&intc>;
19 #address-cells = <2>;
[all …]
/kernel/linux/linux-5.10/arch/arm/
DKconfig.debug1 # SPDX-License-Identifier: GPL-2.0
44 once the kernel has booted up - it's a one time check.
96 1 - undefined instruction events
97 2 - system calls
98 4 - invalid data aborts
99 8 - SIGSEGV faults
100 16 - SIGBUS faults
104 bool "Kernel low-level debugging functions (read help!)"
112 UART definition, as specified below. Attempting to boot the kernel
117 prompt "Kernel low-level debugging port"
[all …]
/kernel/linux/linux-6.6/arch/arm/
DKconfig.debug1 # SPDX-License-Identifier: GPL-2.0
44 once the kernel has booted up - it's a one time check.
107 1 - undefined instruction events
108 2 - system calls
109 4 - invalid data aborts
110 8 - SIGSEGV faults
111 16 - SIGBUS faults
115 bool "Kernel low-level debugging functions (read help!)"
123 UART definition, as specified below. Attempting to boot the kernel
128 prompt "Kernel low-level debugging port"
[all …]
/kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/
Dsdm845.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
9 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
10 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
11 #include <dt-bindings/clock/qcom,gpucc-sdm845.h>
12 #include <dt-bindings/clock/qcom,lpass-sdm845.h>
13 #include <dt-bindings/clock/qcom,rpmh.h>
14 #include <dt-bindings/clock/qcom,videocc-sdm845.h>
15 #include <dt-bindings/interconnect/qcom,osm-l3.h>
16 #include <dt-bindings/interconnect/qcom,sdm845.h>
[all …]
Dapq8016-sbc.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include "msm8916-pm8916.dtsi"
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
11 #include <dt-bindings/sound/apq8016-lpass.h>
26 stdout-path = "serial0";
29 camera_vdddo_1v8: camera-vdddo-1v8 {
30 compatible = "regulator-fixed";
[all …]
Dsc7180.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
8 #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
9 #include <dt-bindings/clock/qcom,gcc-sc7180.h>
10 #include <dt-bindings/clock/qcom,gpucc-sc7180.h>
11 #include <dt-bindings/clock/qcom,lpasscorecc-sc7180.h>
12 #include <dt-bindings/clock/qcom,rpmh.h>
13 #include <dt-bindings/clock/qcom,videocc-sc7180.h>
14 #include <dt-bindings/interconnect/qcom,osm-l3.h>
15 #include <dt-bindings/interconnect/qcom,sc7180.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
[all …]

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