| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/net/can/ |
| D | xilinx_can.txt | 2 ---------------------------------------------------------
5 - compatible : Should be:
6 - "xlnx,zynq-can-1.0" for Zynq CAN controllers
7 - "xlnx,axi-can-1.00.a" for Axi CAN controllers
8 - "xlnx,canfd-1.0" for CAN FD controllers
9 - "xlnx,canfd-2.0" for CAN FD 2.0 controllers
10 - reg : Physical base address and size of the controller
12 - interrupts : Property with a value describing the interrupt
14 - clock-names : List of input clock names
15 - "can_clk", "pclk" (For CANPS),
[all …]
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| /kernel/linux/linux-6.6/Documentation/devicetree/bindings/net/can/ |
| D | xilinx,can.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
16 - xlnx,zynq-can-1.0
17 - xlnx,axi-can-1.00.a
18 - xlnx,canfd-1.0
19 - xlnx,canfd-2.0
31 clock-names:
34 power-domains:
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| /kernel/linux/linux-5.10/drivers/mailbox/ |
| D | mailbox.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Mailbox: Common code for Mailbox controllers and users
5 * Copyright (C) 2013-2014 Linaro Ltd.
21 #include "mailbox.h"
31 spin_lock_irqsave(&chan->lock, flags); in add_to_rbuf()
34 if (chan->msg_count == MBOX_TX_QUEUE_LEN) { in add_to_rbuf()
35 spin_unlock_irqrestore(&chan->lock, flags); in add_to_rbuf()
36 return -ENOBUFS; in add_to_rbuf()
39 idx = chan->msg_free; in add_to_rbuf()
40 chan->msg_data[idx] = mssg; in add_to_rbuf()
[all …]
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| D | bcm-pdc-mailbox.c | 1 // SPDX-License-Identifier: GPL-2.0-only
7 * Broadcom PDC Mailbox Driver
9 * offload engines. For example, the PDC driver works with both SPU-M and SPU2
13 * The PDC driver registers with the Linux mailbox framework as a mailbox
15 * a mailbox channel. The PDC driver uses interrupts to determine when data
25 * descriptors from the tx and rx ring, thus processing one response at a time.
42 #include <linux/mailbox/brcm-message.h>
44 #include <linux/dma-direction.h>
45 #include <linux/dma-mapping.h>
55 * Minimum number of ring descriptor entries that must be free to tell mailbox
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| D | mailbox-test.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
50 size_t count, loff_t *ppos) in mbox_test_signal_write() argument
52 struct mbox_test_device *tdev = filp->private_data; in mbox_test_signal_write()
54 if (!tdev->tx_channel) { in mbox_test_signal_write()
55 dev_err(tdev->dev, "Channel cannot do Tx\n"); in mbox_test_signal_write()
56 return -EINVAL; in mbox_test_signal_write()
59 if (count > MBOX_MAX_SIG_LEN) { in mbox_test_signal_write()
60 dev_err(tdev->dev, in mbox_test_signal_write()
62 count, MBOX_MAX_SIG_LEN); in mbox_test_signal_write()
63 return -EINVAL; in mbox_test_signal_write()
[all …]
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| /kernel/linux/linux-6.6/drivers/mailbox/ |
| D | mailbox.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Mailbox: Common code for Mailbox controllers and users
5 * Copyright (C) 2013-2014 Linaro Ltd.
22 #include "mailbox.h"
32 spin_lock_irqsave(&chan->lock, flags); in add_to_rbuf()
35 if (chan->msg_count == MBOX_TX_QUEUE_LEN) { in add_to_rbuf()
36 spin_unlock_irqrestore(&chan->lock, flags); in add_to_rbuf()
37 return -ENOBUFS; in add_to_rbuf()
40 idx = chan->msg_free; in add_to_rbuf()
41 chan->msg_data[idx] = mssg; in add_to_rbuf()
[all …]
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| D | bcm-pdc-mailbox.c | 1 // SPDX-License-Identifier: GPL-2.0-only
7 * Broadcom PDC Mailbox Driver
9 * offload engines. For example, the PDC driver works with both SPU-M and SPU2
13 * The PDC driver registers with the Linux mailbox framework as a mailbox
15 * a mailbox channel. The PDC driver uses interrupts to determine when data
25 * descriptors from the tx and rx ring, thus processing one response at a time.
42 #include <linux/mailbox/brcm-message.h>
44 #include <linux/dma-direction.h>
45 #include <linux/dma-mapping.h>
55 * Minimum number of ring descriptor entries that must be free to tell mailbox
[all …]
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| D | mailbox-test.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
51 size_t count, loff_t *ppos) in mbox_test_signal_write() argument
53 struct mbox_test_device *tdev = filp->private_data; in mbox_test_signal_write()
55 if (!tdev->tx_channel) { in mbox_test_signal_write()
56 dev_err(tdev->dev, "Channel cannot do Tx\n"); in mbox_test_signal_write()
57 return -EINVAL; in mbox_test_signal_write()
60 if (count > MBOX_MAX_SIG_LEN) { in mbox_test_signal_write()
61 dev_err(tdev->dev, in mbox_test_signal_write()
63 count, MBOX_MAX_SIG_LEN); in mbox_test_signal_write()
64 return -EINVAL; in mbox_test_signal_write()
[all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/intel/fm10k/ |
| D | fm10k_pci.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2019 Intel Corporation. */
16 * fm10k_pci_tbl - PCI Device ID Table
36 struct fm10k_intfc *interface = hw->back; in fm10k_read_pci_cfg_word()
39 if (FM10K_REMOVED(hw->hw_addr)) in fm10k_read_pci_cfg_word()
42 pci_read_config_word(interface->pdev, reg, &value); in fm10k_read_pci_cfg_word()
51 u32 __iomem *hw_addr = READ_ONCE(hw->hw_addr); in fm10k_read_reg()
59 struct fm10k_intfc *interface = hw->back; in fm10k_read_reg()
60 struct net_device *netdev = interface->netdev; in fm10k_read_reg()
62 hw->hw_addr = NULL; in fm10k_read_reg()
[all …]
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| D | fm10k_common.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
7 * fm10k_get_bus_info_generic - Generic set PCI bus info
22 hw->bus_caps.width = fm10k_bus_width_pcie_x1; in fm10k_get_bus_info_generic()
25 hw->bus_caps.width = fm10k_bus_width_pcie_x2; in fm10k_get_bus_info_generic()
28 hw->bus_caps.width = fm10k_bus_width_pcie_x4; in fm10k_get_bus_info_generic()
31 hw->bus_caps.width = fm10k_bus_width_pcie_x8; in fm10k_get_bus_info_generic()
34 hw->bus_caps.width = fm10k_bus_width_unknown; in fm10k_get_bus_info_generic()
40 hw->bus_caps.speed = fm10k_bus_speed_2500; in fm10k_get_bus_info_generic()
43 hw->bus_caps.speed = fm10k_bus_speed_5000; in fm10k_get_bus_info_generic()
[all …]
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| D | fm10k_netdev.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2019 Intel Corporation. */
10 * fm10k_setup_tx_resources - allocate Tx resources (Descriptors)
11 * @tx_ring: tx descriptor ring (for a specific queue) to setup
17 struct device *dev = tx_ring->dev; in fm10k_setup_tx_resources()
20 size = sizeof(struct fm10k_tx_buffer) * tx_ring->count; in fm10k_setup_tx_resources()
22 tx_ring->tx_buffer = vzalloc(size); in fm10k_setup_tx_resources()
23 if (!tx_ring->tx_buffer) in fm10k_setup_tx_resources()
26 u64_stats_init(&tx_ring->syncp); in fm10k_setup_tx_resources()
29 tx_ring->size = tx_ring->count * sizeof(struct fm10k_tx_desc); in fm10k_setup_tx_resources()
[all …]
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| /kernel/linux/linux-6.6/drivers/net/ethernet/intel/fm10k/ |
| D | fm10k_pci.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2019 Intel Corporation. */
15 * fm10k_pci_tbl - PCI Device ID Table
35 struct fm10k_intfc *interface = hw->back; in fm10k_read_pci_cfg_word()
38 if (FM10K_REMOVED(hw->hw_addr)) in fm10k_read_pci_cfg_word()
41 pci_read_config_word(interface->pdev, reg, &value); in fm10k_read_pci_cfg_word()
50 u32 __iomem *hw_addr = READ_ONCE(hw->hw_addr); in fm10k_read_reg()
58 struct fm10k_intfc *interface = hw->back; in fm10k_read_reg()
59 struct net_device *netdev = interface->netdev; in fm10k_read_reg()
61 hw->hw_addr = NULL; in fm10k_read_reg()
[all …]
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| D | fm10k_common.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2018 Intel Corporation. */
7 * fm10k_get_bus_info_generic - Generic set PCI bus info
22 hw->bus_caps.width = fm10k_bus_width_pcie_x1; in fm10k_get_bus_info_generic()
25 hw->bus_caps.width = fm10k_bus_width_pcie_x2; in fm10k_get_bus_info_generic()
28 hw->bus_caps.width = fm10k_bus_width_pcie_x4; in fm10k_get_bus_info_generic()
31 hw->bus_caps.width = fm10k_bus_width_pcie_x8; in fm10k_get_bus_info_generic()
34 hw->bus_caps.width = fm10k_bus_width_unknown; in fm10k_get_bus_info_generic()
40 hw->bus_caps.speed = fm10k_bus_speed_2500; in fm10k_get_bus_info_generic()
43 hw->bus_caps.speed = fm10k_bus_speed_5000; in fm10k_get_bus_info_generic()
[all …]
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| D | fm10k_netdev.c | 1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2019 Intel Corporation. */
10 * fm10k_setup_tx_resources - allocate Tx resources (Descriptors)
11 * @tx_ring: tx descriptor ring (for a specific queue) to setup
17 struct device *dev = tx_ring->dev; in fm10k_setup_tx_resources()
20 size = sizeof(struct fm10k_tx_buffer) * tx_ring->count; in fm10k_setup_tx_resources()
22 tx_ring->tx_buffer = vzalloc(size); in fm10k_setup_tx_resources()
23 if (!tx_ring->tx_buffer) in fm10k_setup_tx_resources()
26 u64_stats_init(&tx_ring->syncp); in fm10k_setup_tx_resources()
29 tx_ring->size = tx_ring->count * sizeof(struct fm10k_tx_desc); in fm10k_setup_tx_resources()
[all …]
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| /kernel/linux/linux-5.10/drivers/staging/qlge/ |
| D | qlge_mpi.c | 1 // SPDX-License-Identifier: GPL-2.0
8 /* Un-pause the RISC */ in ql_unpause_mpi_risc()
11 return -EIO; in ql_unpause_mpi_risc()
20 int count; in ql_pause_mpi_risc() local
24 for (count = UDELAY_COUNT; count; count--) { in ql_pause_mpi_risc()
30 return (count == 0) ? -ETIMEDOUT : 0; in ql_pause_mpi_risc()
36 int count; in ql_hard_reset_mpi_risc() local
40 for (count = UDELAY_COUNT; count; count--) { in ql_hard_reset_mpi_risc()
48 return (count == 0) ? -ETIMEDOUT : 0; in ql_hard_reset_mpi_risc()
107 if (qdev->func < qdev->alt_func) in ql_own_firmware()
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| /kernel/linux/linux-6.6/drivers/staging/qlge/ |
| D | qlge_mpi.c | 1 // SPDX-License-Identifier: GPL-2.0
8 /* Un-pause the RISC */ in qlge_unpause_mpi_risc()
11 return -EIO; in qlge_unpause_mpi_risc()
20 int count; in qlge_pause_mpi_risc() local
24 for (count = UDELAY_COUNT; count; count--) { in qlge_pause_mpi_risc()
30 return (count == 0) ? -ETIMEDOUT : 0; in qlge_pause_mpi_risc()
36 int count; in qlge_hard_reset_mpi_risc() local
40 for (count = UDELAY_COUNT; count; count--) { in qlge_hard_reset_mpi_risc()
48 return (count == 0) ? -ETIMEDOUT : 0; in qlge_hard_reset_mpi_risc()
107 if (qdev->func < qdev->alt_func) in qlge_own_firmware()
[all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/marvell/octeontx2/af/ |
| D | mbox.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
34 # error "incorrect mailbox area sizes"
37 #define INTR_MASK(pfvfs) ((pfvfs < 64) ? (BIT_ULL(pfvfs) - 1) : (~0ull))
43 /* Mailbox directions */
69 u64 tx_start; /* Offset of Tx region in mbox memory */
71 u16 tx_size; /* Size of Tx region */
91 u16 next_msgoff; /* Offset of next msg within mailbox region */
119 /* Mailbox message types */
125 /* Generic mbox IDs (range 0x000 - 0x1FF) */ \
133 /* CGX mbox IDs (range 0x200 - 0x3FF) */ \
[all …]
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| /kernel/linux/linux-6.6/drivers/tty/serial/ |
| D | tegra-tcu.c | 1 // SPDX-License-Identifier: GPL-2.0
30 struct mbox_chan *tx, *rx; member
52 unsigned int count) in tegra_tcu_write_one() argument
56 value |= TCU_MBOX_NUM_BYTES(count); in tegra_tcu_write_one()
58 mbox_send_message(tcu->tx, msg); in tegra_tcu_write_one()
59 mbox_flush(tcu->tx, 1000); in tegra_tcu_write_one()
63 unsigned int count) in tegra_tcu_write() argument
69 while (i < count) { in tegra_tcu_write()
93 struct tegra_tcu *tcu = port->private_data; in tegra_tcu_uart_start_tx()
94 struct circ_buf *xmit = &port->state->xmit; in tegra_tcu_uart_start_tx()
[all …]
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| /kernel/linux/linux-5.10/drivers/tty/serial/ |
| D | tegra-tcu.c | 1 // SPDX-License-Identifier: GPL-2.0
31 struct mbox_chan *tx, *rx; member
53 unsigned int count) in tegra_tcu_write_one() argument
57 value |= TCU_MBOX_NUM_BYTES(count); in tegra_tcu_write_one()
59 mbox_send_message(tcu->tx, msg); in tegra_tcu_write_one()
60 mbox_flush(tcu->tx, 1000); in tegra_tcu_write_one()
64 unsigned int count) in tegra_tcu_write() argument
70 while (i < count) { in tegra_tcu_write()
94 struct tegra_tcu *tcu = port->private_data; in tegra_tcu_uart_start_tx()
95 struct circ_buf *xmit = &port->state->xmit; in tegra_tcu_uart_start_tx()
[all …]
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| /kernel/linux/linux-6.6/drivers/net/ethernet/netronome/nfp/ |
| D | nfp_net_ctrl.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2 /* Copyright (C) 2015-2018 Netronome Systems, Inc. */
17 /* 64-bit per app capabilities */
23 * THB-350, 32k needs to be reserved.
51 #define NFP_NET_META_IPSEC 9 /* IPsec SA index for tx and rx */
61 /* Hash type pre-pended when a RSS hash was computed */
74 * %NFP_NET_TXR_MAX: Maximum number of TX rings
80 /* Read/Write config words (0x0000 - 0x002c)
83 * %NFP_NET_CFG_TXRS_ENABLE: Bitmask of enabled TX rings
87 * %NFP_NET_CFG_EXN: MSI-X table entry for exceptions
[all …]
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| /kernel/linux/linux-5.10/drivers/net/ethernet/netronome/nfp/ |
| D | nfp_net_ctrl.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2 /* Copyright (C) 2015-2018 Netronome Systems, Inc. */
22 * THB-350, 32k needs to be reserved.
53 * Hash type pre-pended when a RSS hash was computed
68 * %NFP_NET_TXR_MAX: Maximum number of TX rings
75 * Read/Write config words (0x0000 - 0x002c)
78 * %NFP_NET_CFG_TXRS_ENABLE: Bitmask of enabled TX rings
82 * %NFP_NET_CFG_EXN: MSI-X table entry for exceptions
83 * %NFP_NET_CFG_LSC: MSI-X table entry for link state changes
87 * - define Error details in UPDATE
[all …]
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| /kernel/linux/linux-5.10/drivers/atm/ |
| D | uPD98401.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* drivers/atm/uPD98401.h - NEC uPD98401 (SAR) declarations */
25 #define uPD98401_CHAN_RT 0x02000000 /* RX/TX (0 TX, 1 RX) */
27 #define uPD98401_TX_READY 0x30000000 /* TX ready */
42 #define uPD98401_IA_TGT_CM 0 /* - Control Memory */
43 #define uPD98401_IA_TGT_SAR 1 /* - uPD98401 registers */
44 #define uPD98401_IA_TGT_PHY 3 /* - PHY device */
59 #define uPD98401_AAL5_UINFO 0xffff0000 /* user-supplied information */
110 #define uPD98401_MSH(n) (0x10+(n)) /* Mailbox n Start Address High */
111 #define uPD98401_MSL(n) (0x14+(n)) /* Mailbox n Start Address High */
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| /kernel/linux/linux-6.6/drivers/net/ethernet/marvell/octeontx2/af/ |
| D | mbox.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
34 # error "incorrect mailbox area sizes"
37 #define INTR_MASK(pfvfs) ((pfvfs < 64) ? (BIT_ULL(pfvfs) - 1) : (~0ull))
43 /* Mailbox directions */
70 u64 tx_start; /* Offset of Tx region in mbox memory */
72 u16 tx_size; /* Size of Tx region */
92 u16 next_msgoff; /* Offset of next msg within mailbox region */
127 /* Mailbox message types */
133 /* Generic mbox IDs (range 0x000 - 0x1FF) */ \
146 /* CGX mbox IDs (range 0x200 - 0x3FF) */ \
[all …]
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| /kernel/linux/linux-6.6/drivers/dma/ |
| D | bcm-sba-raid.c | 1 // SPDX-License-Identifier: GPL-2.0-only
11 * SoC specific ring manager driver is implemented as a mailbox controller
19 * hardware devices for achieving high through-put.
22 * except submitting request to SBA hardware device via mailbox channels.
24 * mailbox channel provided by Broadcom SoC specific ring manager driver.
32 #include <linux/dma-mapping.h>
36 #include <linux/mailbox/brcm-message.h>
85 #define to_sba_request(tx) \ argument
86 container_of(tx, struct sba_request, tx)
113 struct dma_async_tx_descriptor tx; member
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| /kernel/linux/linux-5.10/drivers/dma/ |
| D | bcm-sba-raid.c | 21 * SoC specific ring manager driver is implemented as a mailbox controller
29 * hardware devices for achieving high through-put.
32 * except submitting request to SBA hardware device via mailbox channels.
34 * mailbox channel provided by Broadcom SoC specific ring manager driver.
42 #include <linux/dma-mapping.h>
46 #include <linux/mailbox/brcm-message.h>
93 #define to_sba_request(tx) \ argument
94 container_of(tx, struct sba_request, tx)
121 struct dma_async_tx_descriptor tx; member
146 /* Maibox client and Mailbox channels */
[all …]
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