1# Copyright (c) 2021-2022 Huawei Device Co., Ltd. 2# Licensed under the Apache License, Version 2.0 (the "License"); 3# you may not use this file except in compliance with the License. 4# You may obtain a copy of the License at 5# 6# http://www.apache.org/licenses/LICENSE-2.0 7# 8# Unless required by applicable law or agreed to in writing, software 9# distributed under the License is distributed on an "AS IS" BASIS, 10# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 11# See the License for the specific language governing permissions and 12# limitations under the License. 13 14doc: | 15 opcode 16 Opcode of the instruction 17 18 signature 19 Describes signature of the instruction. Properties of the operands are separated by '-' symbol. 20 For info about operand tokens see the 'legend' section 21 22 Note: any check instructions might be eliminated by optimizer, thus operand checks (nc, zc, bc, ngc) qualifiers have 23 not mandatory meaning. 24 25 base 26 C++ base that represent this opcode. In far future if we managed to generate also instruction classes, 27 this field become redundant 28 29 flags 30 Properties of the instruction, such as: arithmetic, binop, throw, etc 31 32 modes 33 Modes which the instruction can be used in 34 35templates: 36 # Templates aim to reduce boilerplate in instruction description. 37 # Templates are denoted by a '$' symbol in the first character of the string. 38 verify_unary: 39 - equal_common_types 40 - float_src_eq_dst_size 41 - integer_src_ge_dst_size 42 verify_binary_int: 43 - equal_common_types 44 - integer_src_ge_dst_size 45 verify_binary: 46 - equal_common_types 47 - integer_src_ge_dst_size 48 - float_src_eq_dst_size 49 50instructions: 51 - opcode: Compare 52 base: CompareInst 53 signature: [d-bool, real, real] 54 flags: [acc_read, acc_write, ifcvt] 55 description: Compare two integer or reference values according to condition code(for reference only CC_EQ). 56 57 - opcode: Cmp 58 base: CmpInst 59 signature: [d-int, number, number] 60 flags: [acc_read, acc_write, ifcvt] 61 description: Compare two float or integer values. 62 63 - opcode: CompareAnyType 64 base: CompareAnyTypeInst 65 signature: [d-bool, any] 66 flags: [acc_read, acc_write, ifcvt] 67 description: Compare any type value and type. 68 69 - opcode: CastAnyTypeValue 70 base: CastAnyTypeValueInst 71 signature: [d-real, any] 72 flags: [acc_read, acc_write] 73 description: Cast any dynamic type value to compiler type value. 74 75 - opcode: CastValueToAnyType 76 base: CastValueToAnyTypeInst 77 signature: [d-any, real] 78 flags: [acc_read, acc_write, no_cse] 79 description: Cast compiler type value to any dynamic type value. 80 81 - opcode: Constant 82 base: ConstantInst 83 signature: [d-i32-i64-f32-f64] 84 flags: [no_cse, ifcvt] 85 description: Constant value. 86 verification: 87 - start_block_instruction 88 89 - opcode: Parameter 90 base: ParameterInst 91 signature: [d-real-any] 92 flags: [no_cse, no_hoist] 93 description: Method's parameter. 94 verification: 95 - start_block_instruction 96 97 - opcode: LoadString 98 base: LoadFromPool 99 signature: [d-ref, save_state] 100 flags: [load, can_throw, no_hoist, no_cse, require_state, runtime_call, acc_write] 101 description: Load string from pool. 102 103 - opcode: Return 104 base: FixedInputsInst1 105 signature: [real-any] 106 flags: [cf, no_dce, no_hoist, no_cse, barrier, acc_read, terminator] 107 description: Return value from method. 108 109 - opcode: Intrinsic 110 base: IntrinsicInst 111 signature: [d-real-void, real-dyn] 112 flags: [no_dce, no_hoist, no_cse, barrier, require_state, runtime_call] 113 description: Call runtime intrinsics directly. 114 115 ############################################################################## 116 # Special pseudo instructions 117 # 118 - opcode: Phi 119 base: PhiInst 120 signature: [d-real-ref, real-ref-dyn] 121 flags: [no_cse, no_hoist] 122 description: Phi instruction 123 124 - opcode: SpillFill 125 base: SpillFillInst 126 signature: [] 127 flags: [no_cse, no_dce] 128 description: Pseudo instruction that inserted by Register Allocator. 129 130 - opcode: SaveState 131 base: SaveStateInst 132 signature: [d-real-pseudo, real-dyn] 133 flags: [no_hoist, no_cse] 134 description: >- 135 Contains information about virtual registers that must be saved before leaving compiled code. Constructed for all 136 call instructions and all instructions that can throw. 137 138 - opcode: If 139 base: IfInst 140 signature: [real, real] 141 flags: [cf, no_dce, no_hoist, no_cse, barrier, low_level, acc_read] 142 description: Performs compare and jump. 143 144 - opcode: IfImm 145 base: IfImmInst 146 signature: [real] 147 flags: [cf, no_dce, no_hoist, no_cse, barrier, acc_read] 148 description: Performs compare with immediate and jump. 149 150 - opcode: Try 151 base: TryInst 152 signature: [] 153 flags: [no_dce, no_hoist, no_cse, barrier] 154 modes: [jit_aot, bytecode_opt] 155 description: Pseudo instruction, inserted in the beginning of try-block. 156 157 - opcode: CatchPhi 158 base: CatchPhiInst 159 signature: [d-real-ref, real-ref-dyn] 160 flags: [no_hoist, no_cse] 161 modes: [jit_aot, bytecode_opt] 162 description: >- 163 Pseudo instruction, which is inserted in the Catch handler basic block, and defines virtual registers at each throwing 164 instruction of the appropriate try-block. 165 166types: 167 - name: i8 168 - name: i16 169 - name: i32 170 - name: i64 171 - name: u8 172 - name: u16 173 - name: u32 174 - name: u64 175 - name: f32 176 - name: f64 177 - name: bool 178 - name: ref 179 - name: ptr 180 - name: void 181 - name: any 182 183arch_info: 184- name: arm64 185 regs_count: 32 186 temp_regs: [16, 17, 20] 187 fp_regs_count: 32 188 fp_temp_regs: [30, 31] 189 190- name: arm32 191 regs_count: 16 192 temp_regs: [8, 9, 12] 193 fp_regs_count: 32 194 fp_temp_regs: [14, 15] 195 196- name: x86_64 197 regs_count: 16 198 temp_regs: [12, 13, 14] 199 fp_regs_count: 16 200 fp_temp_regs: [13, 14, 15] 201 202legend: 203 "Operand tokens": 204 d: operand is a destination, operand is a source when 'd' is not specified 205 i8: signed 8-bit integer 206 i16: signed 16-bit integer 207 i32: signed 32-bit integer 208 i64: signed 64-bit integer 209 u8: unsigned 8-bit integer 210 u16: unsigned 16-bit integer 211 u32: unsigned 32-bit integer 212 u64: unsigned 64-bit integer 213 f32: single precision float 214 f64: double precision float 215 bool: boolean type 216 ref: object reference type 217 ptr: pointer type 218 void: void type 219 int: type union of [bool, i8, i16, i32, i64, u8, u16, u32, u64] 220 float: type union of [f32, f64] 221 number: type union of [int, float] 222 real: type union of [number, ref] 223 any: the type is not statically defined(For dynamic languages) 224 pseudo: pseudo destination - instruction doesn't actually write to the register 225 zc: zero check - input must be the ZeroCheck instruction 226 bc: bounds check - input must be the BoundsCheck instruction 227 nc: null check - input must be the NullCheck instruction 228 ngc: negative check - input should be the NegativeCheck instruction 229 save_state: definition of the given input must be SaveState instruction 230 dyn: dynamic operands, means that operand can repeat zero or more times 231 232verification: 233 equal_type_classes: | 234 Type classes of instruction's operands are equal. Type classes are int, float, ref (see operand_tokens for info) 235 float_src_eq_dst_size: | 236 If instrucion's type is float then size of source operands shall be equal to size of destination. 237 integer_src_ge_dst_size: | 238 If instrucion's type is integer then size of source operands shall be greater than or equal to size of destination. 239 start_block_instruction: | 240 Instruction can only reside in start basic block. 241 242flags: 243 cf: Instruction affects control flow 244 terminator: Execution will be terminated at the given instruction 245 load: Instruction loads from memory 246 store: Instruction stores into memory 247 can_throw: Instruction can throw exception 248 call: Call instruction. 249 is_check: Instruction has runtime-checks and has `can_throw` flag 250 no_dce: Instruction that can't be deleted on DCE 251 no_cse: Instruction has unique vn class and CSE can't be applied 252 no_dst: Instruction has no destination operand 253 pseudo_dst: Instruction has pseudo destination operand, i.e. it doesn't affect on dataflow 254 implicit_runtime_call: Instruction may call runtime before loading source, which can be moved by GC during that call 255 low_level: Low level instruction 256 no_hoist: Instruction can't be hoisted 257 barrier: Instruction is a barrier for scheduling 258 ref_special: Instruction which can not be moved throught runtime calls 259 ifcvt: Instruction can be used in if-conversion 260 require_state: Instruction may call runtime, thus, it requires SaveState in the inputs 261 runtime_call: Instruction must call runtime 262 commutative: Instruction is commutative(Add, OR, And e.t.c.) 263 alloc: Instruction that allocates a new object on the heap 264 acc_read: Read the accumulator register 265 acc_write: Write the accumulator register 266 heap_inv: Invalidates heap 267 mem_barrier: we need encode memory barrier after the instruction(for return.void before) 268 native: Instruction is used to generate unmanaged (native) code 269 can_deoptimize: deoptimization may occur with jump to the interpreter 270 271modes: 272 jit_aot: JIT or AOT compiler 273 bytecode_opt: Bytecode optimizer 274 irtoc: Ir-To-Code tool 275