1 /*
2 * Copyright (c) 2021 Huawei Device Co., Ltd.
3 * Licensed under the Apache License, Version 2.0 (the "License");
4 * you may not use this file except in compliance with the License.
5 * You may obtain a copy of the License at
6 *
7 * http://www.apache.org/licenses/LICENSE-2.0
8 *
9 * Unless required by applicable law or agreed to in writing, software
10 * distributed under the License is distributed on an "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 * See the License for the specific language governing permissions and
13 * limitations under the License.
14 */
15
16 #include "register_test.h"
17
18 #include <bitset>
19
20 using namespace testing::ext;
21 namespace OHOS {
22 namespace Developtools {
23 namespace HiPerf {
24 class RegisterTest : public testing::Test {
25 public:
26 static void SetUpTestCase(void);
27 static void TearDownTestCase(void);
28 void SetUp();
29 void TearDown();
30 };
31
SetUpTestCase()32 void RegisterTest::SetUpTestCase() {}
33
TearDownTestCase()34 void RegisterTest::TearDownTestCase() {}
35
SetUp()36 void RegisterTest::SetUp() {}
37
TearDown()38 void RegisterTest::TearDown() {}
39
40
41 /**
42 * @tc.name: GetSupportedRegMask
43 * @tc.desc:
44 * @tc.type: FUNC
45 */
46 HWTEST_F(RegisterTest, GetSupportedRegMask, TestSize.Level1)
47 {
48 EXPECT_NE(GetSupportedRegMask(ArchType::ARCH_X86), GetSupportedRegMask(ArchType::ARCH_X86_64));
49 EXPECT_NE(GetSupportedRegMask(ArchType::ARCH_ARM), GetSupportedRegMask(ArchType::ARCH_ARM64));
50 EXPECT_EQ(GetSupportedRegMask(static_cast<ArchType>(100)),
51 std::numeric_limits<uint64_t>::max());
52 EXPECT_EQ(GetSupportedRegMask(static_cast<ArchType>(-1)), std::numeric_limits<uint64_t>::max());
53
54 std::bitset<64> regMasker;
55 regMasker = GetSupportedRegMask(ArchType::ARCH_X86);
56 EXPECT_EQ(regMasker.count(), PERF_REG_X86_32_MAX);
57
58 regMasker = GetSupportedRegMask(ArchType::ARCH_X86_64);
59 // dont support PERF_REG_X86_DS,PERF_REG_X86_ES,PERF_REG_X86_FS,PERF_REG_X86_GS
60 EXPECT_EQ(regMasker.count(), PERF_REG_X86_64_MAX - 4u);
61
62 regMasker = GetSupportedRegMask(ArchType::ARCH_ARM);
63 EXPECT_EQ(regMasker.count(), PERF_REG_ARM_MAX);
64
65 regMasker = GetSupportedRegMask(ArchType::ARCH_ARM64);
66 EXPECT_EQ(regMasker.count(), PERF_REG_ARM64_MAX);
67 }
68
69 /**
70 * @tc.name: RegisterGetIP
71 * @tc.desc:
72 * @tc.type: FUNC
73 */
74 HWTEST_F(RegisterTest, RegisterGetIP, TestSize.Level1)
75 {
76 EXPECT_EQ(RegisterGetIP(ArchType::ARCH_X86), PERF_REG_X86_IP);
77 EXPECT_EQ(RegisterGetIP(ArchType::ARCH_X86_64), PERF_REG_X86_IP);
78 EXPECT_EQ(RegisterGetIP(ArchType::ARCH_ARM), PERF_REG_ARM_PC);
79 EXPECT_EQ(RegisterGetIP(ArchType::ARCH_ARM64), PERF_REG_ARM64_PC);
80 EXPECT_EQ(RegisterGetIP(ArchType::ARCH_UNKNOWN), std::numeric_limits<size_t>::max());
81 }
82
83 /**
84 * @tc.name: RegisterGetSP
85 * @tc.desc:
86 * @tc.type: FUNC
87 */
88 HWTEST_F(RegisterTest, RegisterGetSP, TestSize.Level1)
89 {
90 #if defined(target_cpu_x86_64)
91 EXPECT_EQ(RegisterGetSP(ArchType::ARCH_X86_64), PERF_REG_X86_IP);
92 #elif defined(target_cpu_arm)
93 EXPECT_EQ(RegisterGetSP(ArchType::ARCH_ARM), PERF_REG_ARM_SP);
94 #elif defined(target_cpu_arm64)
95 EXPECT_EQ(RegisterGetSP(ArchType::ARCH_ARM64), PERF_REG_ARM64_SP);
96 #endif
97 }
98
99 /**
100 * @tc.name: RegisterGetValue
101 * @tc.desc:
102 * @tc.type: FUNC
103 */
104 HWTEST_F(RegisterTest, RegisterGetValue, TestSize.Level1)
105 {
106 uint64_t value = 0;
107 const u64 registers[4] = {1, 2, 3, 4};
108
109 EXPECT_EQ(RegisterGetValue(value, registers, 0, sizeof(registers)), true);
110 EXPECT_EQ(RegisterGetValue(value, registers, sizeof(registers), sizeof(registers)), false);
111 EXPECT_EQ(RegisterGetValue(value, registers, -1, sizeof(registers)), false);
112
113 for (unsigned i = 0; i < sizeof(registers); i++) {
114 RegisterGetValue(value, registers, i, sizeof(registers));
115 EXPECT_EQ(value, registers[i]);
116 }
117 }
118
119 /**
120 * @tc.name: RegisterGetSPValue
121 * @tc.desc:
122 * @tc.type: FUNC
123 */
124 HWTEST_F(RegisterTest, RegisterGetSPValue, TestSize.Level1)
125 {
126 uint64_t value = 0;
127 uint64_t value2 = 0;
128 u64 registers[PERF_REG_ARM64_MAX] = {1, 2, 3, 4};
129 size_t sp = RegisterGetSP(BUILD_ARCH_TYPE);
130 registers[sp] = 0x1234;
131
132 EXPECT_EQ(RegisterGetValue(value, registers, sp, sizeof(registers)),
133 RegisterGetSPValue(value2, BUILD_ARCH_TYPE, registers, sizeof(registers)));
134
135 EXPECT_EQ(value, value2);
136 }
137
138 /**
139 * @tc.name: RegisterGetIPValue
140 * @tc.desc:
141 * @tc.type: FUNC
142 */
143 HWTEST_F(RegisterTest, RegisterGetIPValue, TestSize.Level1)
144 {
145 uint64_t value = 0;
146 uint64_t value2 = 0;
147 u64 registers[PERF_REG_ARM64_MAX] = {1, 2, 3, 4};
148 size_t ip = RegisterGetIP(BUILD_ARCH_TYPE);
149 registers[ip] = 0x1234;
150
151 EXPECT_EQ(RegisterGetValue(value, registers, ip, sizeof(registers)),
152 RegisterGetIPValue(value2, BUILD_ARCH_TYPE, registers, sizeof(registers)));
153
154 EXPECT_EQ(value, value2);
155 }
156
157 /**
158 * @tc.name: RegisterGetName
159 * @tc.desc:
160 * @tc.type: FUNC
161 */
162 HWTEST_F(RegisterTest, RegisterGetName, TestSize.Level1)
163 {
164 for (unsigned i = 0; i < PERF_REG_ARM64_MAX; i++) {
165 EXPECT_EQ(RegisterGetName(i).empty(), false);
166 }
167 }
168
169 /**
170 * @tc.name: GetArchName
171 * @tc.desc:
172 * @tc.type: FUNC
173 */
174 HWTEST_F(RegisterTest, GetArchName, TestSize.Level1)
175 {
176 RegisterGetSP(ArchType::ARCH_ARM);
177 EXPECT_STREQ(GetArchName(ArchType::ARCH_ARM).c_str(), "ARM");
178 RegisterGetSP(ArchType::ARCH_ARM64);
179 EXPECT_STREQ(GetArchName(ArchType::ARCH_ARM64).c_str(), "ARM64");
180 RegisterGetSP(ArchType::ARCH_X86);
181 EXPECT_STREQ(GetArchName(ArchType::ARCH_X86).c_str(), "X86_32");
182 RegisterGetSP(ArchType::ARCH_X86_64);
183 EXPECT_STREQ(GetArchName(ArchType::ARCH_X86_64).c_str(), "X86_64");
184 RegisterGetSP(ArchType::ARCH_UNKNOWN);
185 EXPECT_STREQ(GetArchName(ArchType::ARCH_UNKNOWN).c_str(), "Unsupport");
186 }
187 } // namespace HiPerf
188 } // namespace Developtools
189 } // namespace OHOS
190